115 	struct lpass_variant *v = drvdata->variant;  in sc7280_lpass_alloc_dma_channel()  local
122 						   v->rdma_channels);  in sc7280_lpass_alloc_dma_channel()
124 			if (chan >= v->rdma_channels)  in sc7280_lpass_alloc_dma_channel()
128 						  v->wrdma_channel_start +  in sc7280_lpass_alloc_dma_channel()
129 						  v->wrdma_channels,  in sc7280_lpass_alloc_dma_channel()
130 						  v->wrdma_channel_start);  in sc7280_lpass_alloc_dma_channel()
132 			if (chan >= v->wrdma_channel_start + v->wrdma_channels)  in sc7280_lpass_alloc_dma_channel()
139 					   v->hdmi_rdma_channels);  in sc7280_lpass_alloc_dma_channel()
140 		if (chan >= v->hdmi_rdma_channels)  in sc7280_lpass_alloc_dma_channel()
146 					   v->rxtx_rdma_channels);  in sc7280_lpass_alloc_dma_channel()
147 		if (chan >= v->rxtx_rdma_channels)  in sc7280_lpass_alloc_dma_channel()
152 					  v->rxtx_wrdma_channel_start +  in sc7280_lpass_alloc_dma_channel()
153 					  v->rxtx_wrdma_channels,  in sc7280_lpass_alloc_dma_channel()
154 					  v->rxtx_wrdma_channel_start);  in sc7280_lpass_alloc_dma_channel()
155 		if (chan >= v->rxtx_wrdma_channel_start + v->rxtx_wrdma_channels)  in sc7280_lpass_alloc_dma_channel()
161 					  v->va_wrdma_channel_start +  in sc7280_lpass_alloc_dma_channel()
162 					  v->va_wrdma_channels,  in sc7280_lpass_alloc_dma_channel()
163 					  v->va_wrdma_channel_start);  in sc7280_lpass_alloc_dma_channel()
164 		if (chan >= v->va_wrdma_channel_start + v->va_wrdma_channels)  in sc7280_lpass_alloc_dma_channel()
248 	.rdma_channels			= 5,
258 	.wrdma_channel_start		= 5,
265 	.rxtx_wrdma_channel_start	= 5,
269 	.va_wrdma_channel_start		= 5,
285 	.rdma_dyncclk			= REG_FIELD_ID(0xC000, 21, 21, 5, 0x1000),
286 	.rdma_bursten			= REG_FIELD_ID(0xC000, 20, 20, 5, 0x1000),
287 	.rdma_wpscnt			= REG_FIELD_ID(0xC000, 16, 19, 5, 0x1000),
288 	.rdma_intf			= REG_FIELD_ID(0xC000, 12, 15, 5, 0x1000),
289 	.rdma_fifowm			= REG_FIELD_ID(0xC000, 1, 5, 5, 0x1000),
290 	.rdma_enable			= REG_FIELD_ID(0xC000, 0, 0, 5, 0x1000),
296 	.wrdma_fifowm			= REG_FIELD_ID(0x18000, 1, 5, 4, 0x1000),
310 	.rxtx_rdma_codec_pack		= REG_FIELD_ID(0xC050, 29, 29, 5, 0x1000),
313 	.rxtx_wrdma_enable		= REG_FIELD_ID(0x18000, 0, 0, 5, 0x1000),
314 	.rxtx_wrdma_fifowm		= REG_FIELD_ID(0x18000, 1, 11, 5, 0x1000),
315 	.rxtx_wrdma_intf		= REG_FIELD_ID(0x18000, 12, 16, 5, 0x1000),
316 	.rxtx_wrdma_wpscnt		= REG_FIELD_ID(0x18000, 17, 20, 5, 0x1000),
317 	.rxtx_wrdma_bursten		= REG_FIELD_ID(0x18000, 21, 21, 5, 0x1000),
318 	.rxtx_wrdma_dyncclk		= REG_FIELD_ID(0x18000, 22, 22, 5, 0x1000),
320 	.rxtx_wrdma_codec_ch		= REG_FIELD_ID(0x18050, 0, 7, 5, 0x1000),
321 	.rxtx_wrdma_codec_intf		= REG_FIELD_ID(0x18050, 16, 19, 5, 0x1000),
322 	.rxtx_wrdma_codec_fs_delay	= REG_FIELD_ID(0x18050, 21, 24, 5, 0x1000),
323 	.rxtx_wrdma_codec_fs_sel	= REG_FIELD_ID(0x18050, 25, 27, 5, 0x1000),
324 	.rxtx_wrdma_codec_pack		= REG_FIELD_ID(0x18050, 29, 29, 5, 0x1000),
325 	.rxtx_wrdma_codec_enable	= REG_FIELD_ID(0x18050, 30, 30, 5, 0x1000),
327 	.va_wrdma_enable		= REG_FIELD_ID(0x18000, 0, 0, 5, 0x1000),
328 	.va_wrdma_fifowm		= REG_FIELD_ID(0x18000, 1, 11, 5, 0x1000),
329 	.va_wrdma_intf			= REG_FIELD_ID(0x18000, 12, 16, 5, 0x1000),
330 	.va_wrdma_wpscnt		= REG_FIELD_ID(0x18000, 17, 20, 5, 0x1000),
331 	.va_wrdma_bursten		= REG_FIELD_ID(0x18000, 21, 21, 5, 0x1000),
332 	.va_wrdma_dyncclk		= REG_FIELD_ID(0x18000, 22, 22, 5, 0x1000),
334 	.va_wrdma_codec_ch		= REG_FIELD_ID(0x18050, 0, 7, 5, 0x1000),
335 	.va_wrdma_codec_intf		= REG_FIELD_ID(0x18050, 16, 19, 5, 0x1000),
336 	.va_wrdma_codec_fs_delay	= REG_FIELD_ID(0x18050, 21, 24, 5, 0x1000),
337 	.va_wrdma_codec_fs_sel		= REG_FIELD_ID(0x18050, 25, 27, 5, 0x1000),
338 	.va_wrdma_codec_pack		= REG_FIELD_ID(0x18050, 29, 29, 5, 0x1000),
339 	.va_wrdma_codec_enable		= REG_FIELD_ID(0x18050, 30, 30, 5, 0x1000),
361 	.hdmi_rdma_fifowm		= REG_FIELD_ID(0x64000, 1, 5, 4, 0x1000),
368 	.layout_sp			= REG_FIELD(0x6101c, 5, 8),
388 	.hw_usr_sel			= REG_FIELD(0x61038, 5, 6),