Lines Matching full:switch
89 switch (rate) { in adda_dl_rate_transform()
123 switch (rate) { in adda_ul_rate_transform()
146 SOC_DAPM_SINGLE_AUTODISABLE("DL1_CH1 Switch", AFE_CONN3, I_DL1_CH1, 1, 0),
147 SOC_DAPM_SINGLE_AUTODISABLE("DL12_CH1 Switch", AFE_CONN3, I_DL12_CH1, 1, 0),
148 SOC_DAPM_SINGLE_AUTODISABLE("DL2_CH1 Switch", AFE_CONN3, I_DL2_CH1, 1, 0),
149 SOC_DAPM_SINGLE_AUTODISABLE("DL3_CH1 Switch", AFE_CONN3, I_DL3_CH1, 1, 0),
150 SOC_DAPM_SINGLE_AUTODISABLE("DL4_CH1 Switch", AFE_CONN3_1, I_DL4_CH1, 1, 0),
151 SOC_DAPM_SINGLE_AUTODISABLE("DL5_CH1 Switch", AFE_CONN3_1, I_DL5_CH1, 1, 0),
152 SOC_DAPM_SINGLE_AUTODISABLE("DL6_CH1 Switch", AFE_CONN3_1, I_DL6_CH1, 1, 0),
153 SOC_DAPM_SINGLE_AUTODISABLE("DL8_CH1 Switch", AFE_CONN3_1, I_DL8_CH1, 1, 0),
154 SOC_DAPM_SINGLE_AUTODISABLE("ADDA_UL_CH2 Switch", AFE_CONN3,
156 SOC_DAPM_SINGLE_AUTODISABLE("ADDA_UL_CH1 Switch", AFE_CONN3,
158 SOC_DAPM_SINGLE_AUTODISABLE("GAIN1_OUT_CH1 Switch", AFE_CONN3,
160 SOC_DAPM_SINGLE_AUTODISABLE("PCM_1_CAP_CH1 Switch", AFE_CONN3,
162 SOC_DAPM_SINGLE_AUTODISABLE("PCM_2_CAP_CH1 Switch", AFE_CONN3,
164 SOC_DAPM_SINGLE_AUTODISABLE("SRC_1_OUT_CH1 Switch", AFE_CONN3_1,
166 SOC_DAPM_SINGLE_AUTODISABLE("SRC_2_OUT_CH1 Switch", AFE_CONN3_1,
171 SOC_DAPM_SINGLE_AUTODISABLE("DL1_CH1 Switch", AFE_CONN4, I_DL1_CH1, 1, 0),
172 SOC_DAPM_SINGLE_AUTODISABLE("DL1_CH2 Switch", AFE_CONN4, I_DL1_CH2, 1, 0),
173 SOC_DAPM_SINGLE_AUTODISABLE("DL12_CH2 Switch", AFE_CONN4, I_DL12_CH2, 1, 0),
174 SOC_DAPM_SINGLE_AUTODISABLE("DL2_CH1 Switch", AFE_CONN4, I_DL2_CH1, 1, 0),
175 SOC_DAPM_SINGLE_AUTODISABLE("DL2_CH2 Switch", AFE_CONN4, I_DL2_CH2, 1, 0),
176 SOC_DAPM_SINGLE_AUTODISABLE("DL3_CH1 Switch", AFE_CONN4, I_DL3_CH1, 1, 0),
177 SOC_DAPM_SINGLE_AUTODISABLE("DL3_CH2 Switch", AFE_CONN4, I_DL3_CH2, 1, 0),
178 SOC_DAPM_SINGLE_AUTODISABLE("DL4_CH2 Switch", AFE_CONN4_1, I_DL4_CH2, 1, 0),
179 SOC_DAPM_SINGLE_AUTODISABLE("DL5_CH2 Switch", AFE_CONN4_1, I_DL5_CH2, 1, 0),
180 SOC_DAPM_SINGLE_AUTODISABLE("DL6_CH2 Switch", AFE_CONN4_1, I_DL6_CH2, 1, 0),
181 SOC_DAPM_SINGLE_AUTODISABLE("DL8_CH2 Switch", AFE_CONN4_1, I_DL8_CH2, 1, 0),
182 SOC_DAPM_SINGLE_AUTODISABLE("ADDA_UL_CH2 Switch", AFE_CONN4,
184 SOC_DAPM_SINGLE_AUTODISABLE("ADDA_UL_CH1 Switch", AFE_CONN4,
186 SOC_DAPM_SINGLE_AUTODISABLE("GAIN1_OUT_CH2 Switch", AFE_CONN4,
188 SOC_DAPM_SINGLE_AUTODISABLE("PCM_1_CAP_CH2 Switch", AFE_CONN4,
190 SOC_DAPM_SINGLE_AUTODISABLE("PCM_2_CAP_CH2 Switch", AFE_CONN4,
192 SOC_DAPM_SINGLE_AUTODISABLE("SRC_1_OUT_CH2 Switch", AFE_CONN4_1,
194 SOC_DAPM_SINGLE_AUTODISABLE("SRC_2_OUT_CH2 Switch", AFE_CONN4_1,
212 switch (id) { in mtk_adda_ul_src_dmic()
253 switch (event) { in mtk_adda_ul_event()
290 switch (event) { in mtk_adda_pad_top_event()
314 switch (event) { in mtk_adda_mtkaif_cfg_event()
394 switch (event) { in mtk_adda_dl_event()
446 SOC_SINGLE_BOOL_EXT("MTKAIF_DMIC Switch", 0,
575 {"ADDA_DL_CH1", "DL1_CH1 Switch", "DL1"},
576 {"ADDA_DL_CH2", "DL1_CH1 Switch", "DL1"},
577 {"ADDA_DL_CH2", "DL1_CH2 Switch", "DL1"},
579 {"ADDA_DL_CH1", "DL12_CH1 Switch", "DL12"},
580 {"ADDA_DL_CH2", "DL12_CH2 Switch", "DL12"},
582 {"ADDA_DL_CH1", "DL6_CH1 Switch", "DL6"},
583 {"ADDA_DL_CH2", "DL6_CH2 Switch", "DL6"},
585 {"ADDA_DL_CH1", "DL8_CH1 Switch", "DL8"},
586 {"ADDA_DL_CH2", "DL8_CH2 Switch", "DL8"},
588 {"ADDA_DL_CH1", "DL2_CH1 Switch", "DL2"},
589 {"ADDA_DL_CH2", "DL2_CH1 Switch", "DL2"},
590 {"ADDA_DL_CH2", "DL2_CH2 Switch", "DL2"},
592 {"ADDA_DL_CH1", "DL3_CH1 Switch", "DL3"},
593 {"ADDA_DL_CH2", "DL3_CH1 Switch", "DL3"},
594 {"ADDA_DL_CH2", "DL3_CH2 Switch", "DL3"},
596 {"ADDA_DL_CH1", "DL4_CH1 Switch", "DL4"},
597 {"ADDA_DL_CH2", "DL4_CH2 Switch", "DL4"},
599 {"ADDA_DL_CH1", "DL5_CH1 Switch", "DL5"},
600 {"ADDA_DL_CH2", "DL5_CH2 Switch", "DL5"},
734 switch (id) { in mtk_dai_adda_hw_params()
763 switch (id) { in mtk_dai_adda_hw_params()