Lines Matching +full:ssi +full:- +full:all

1 // SPDX-License-Identifier: GPL-2.0
3 // Freescale SSI ALSA SoC Digital Audio Interface (DAI) driver
7 // Copyright 2007-2010 Freescale Semiconductor, Inc.
9 // Some notes why imx-pcm-fiq is used instead of DMA on some boards:
11 // The i.MX SSI core has some nasty limitations in AC97 mode. While most
13 // one FIFO which combines all valid receive slots. We cannot even select
16 // we receive in our (PCM-) data stream. The only chance we have is to
43 #include <linux/dma/imx-dma.h>
53 #include "imx-pcm.h"
55 /* Define RX and TX to index ssi->regvals array; Can be 0 or 1 only */
60 * FSLSSI_I2S_FORMATS: audio formats supported by the SSI
62 * The SSI has a limitation in that the samples must be in the same byte
65 * order. The STX is a shift register, so all the bits need to be aligned
66 * (bit-endianness must match byte-endianness). Processors typically write
68 * written in. So if the host CPU is big-endian, then only big-endian
91 * - SSI inputs external bit clock and outputs frame sync clock -- CBM_CFS
92 * - Also have NB_NF to mark these two clocks will not be inverted
201 bool imx21regs; /* imx21-class SSI - no SACC{ST,EN,DIS} regs */
207 * struct fsl_ssi - per-SSI private data
209 * @irq: IRQ of this SSI
215 * @synchronous: Use synchronous mode - both of TX and RX use STCK and SFCK
220 * @fifo_depth: Depth of the SSI FIFOs
225 * @baudclk: Clock source to generate bit and frame-sync clocks
231 * @ssi_phys: physical address of the SSI registers
237 * @card_idx: The index of SSI to register a sound card for PowerPC or
241 * @dev: Pointer to &pdev->dev
301 * 1) SSI in earlier SoCS has critical bits in control registers that
302 * cannot be changed after SSI starts running -- a software reset
306 * DMA bits changing when SSI is running, so set offline_config.
308 * SSI is running (SSIEN); For these versions, DMA needs to be
309 * configured before SSI sends DMA request to avoid an undefined
344 { .compatible = "fsl,mpc8610-ssi", .data = &fsl_ssi_mpc8610 },
345 { .compatible = "fsl,imx51-ssi", .data = &fsl_ssi_imx51 },
346 { .compatible = "fsl,imx35-ssi", .data = &fsl_ssi_imx35 },
347 { .compatible = "fsl,imx21-ssi", .data = &fsl_ssi_imx21 },
352 static bool fsl_ssi_is_ac97(struct fsl_ssi *ssi) in fsl_ssi_is_ac97() argument
354 return (ssi->dai_fmt & SND_SOC_DAIFMT_FORMAT_MASK) == in fsl_ssi_is_ac97()
358 static bool fsl_ssi_is_i2s_clock_provider(struct fsl_ssi *ssi) in fsl_ssi_is_i2s_clock_provider() argument
360 return (ssi->dai_fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) == in fsl_ssi_is_i2s_clock_provider()
364 static bool fsl_ssi_is_i2s_bc_fp(struct fsl_ssi *ssi) in fsl_ssi_is_i2s_bc_fp() argument
366 return (ssi->dai_fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) == in fsl_ssi_is_i2s_bc_fp()
371 * fsl_ssi_isr - Interrupt handler to gather states
377 struct fsl_ssi *ssi = dev_id; in fsl_ssi_isr() local
378 struct regmap *regs = ssi->regs; in fsl_ssi_isr()
383 sisr2 = sisr & ssi->soc->sisr_write_mask; in fsl_ssi_isr()
388 fsl_ssi_dbg_isr(&ssi->dbg_stats, sisr); in fsl_ssi_isr()
394 * fsl_ssi_config_enable - Set SCR, SIER, STCR and SRCR registers with
396 * @ssi: SSI context
400 * 1) For offline_config SoCs, enable all necessary bits of both streams
404 static void fsl_ssi_config_enable(struct fsl_ssi *ssi, bool tx) in fsl_ssi_config_enable() argument
406 struct fsl_ssi_regvals *vals = ssi->regvals; in fsl_ssi_config_enable()
411 regmap_update_bits(ssi->regs, REG_SSI_SOR, in fsl_ssi_config_enable()
416 * the previous stream started. So skip all SxCR and SIER settings in fsl_ssi_config_enable()
419 if (ssi->soc->offline_config && ssi->streams) in fsl_ssi_config_enable()
422 if (ssi->soc->offline_config) { in fsl_ssi_config_enable()
424 * Online reconfiguration not supported, so enable all bits for in fsl_ssi_config_enable()
438 regmap_update_bits(ssi->regs, REG_SSI_SRCR, srcr, srcr); in fsl_ssi_config_enable()
439 regmap_update_bits(ssi->regs, REG_SSI_STCR, stcr, stcr); in fsl_ssi_config_enable()
440 regmap_update_bits(ssi->regs, REG_SSI_SIER, sier, sier); in fsl_ssi_config_enable()
449 if (ssi->use_dma && tx) { in fsl_ssi_config_enable()
453 /* Enable SSI first to send TX DMA request */ in fsl_ssi_config_enable()
454 regmap_update_bits(ssi->regs, REG_SSI_SCR, in fsl_ssi_config_enable()
457 /* Busy wait until TX FIFO not empty -- DMA working */ in fsl_ssi_config_enable()
459 regmap_read(ssi->regs, REG_SSI_SFCSR, &sfcsr); in fsl_ssi_config_enable()
462 } while (--try); in fsl_ssi_config_enable()
464 /* FIFO still empty -- something might be wrong */ in fsl_ssi_config_enable()
466 dev_warn(ssi->dev, "Timeout waiting TX FIFO filling\n"); in fsl_ssi_config_enable()
468 /* Enable all remaining bits in SCR */ in fsl_ssi_config_enable()
469 regmap_update_bits(ssi->regs, REG_SSI_SCR, in fsl_ssi_config_enable()
473 ssi->streams |= BIT(dir); in fsl_ssi_config_enable()
497 * fsl_ssi_config_disable - Unset SCR, SIER, STCR and SRCR registers
499 * @ssi: SSI context
503 * 1) For offline_config SoCs, to avoid online reconfigurations, disable all
507 static void fsl_ssi_config_disable(struct fsl_ssi *ssi, bool tx) in fsl_ssi_config_disable() argument
516 aactive = ssi->streams & BIT(adir); in fsl_ssi_config_disable()
518 vals = &ssi->regvals[dir]; in fsl_ssi_config_disable()
521 avals = &ssi->regvals[adir]; in fsl_ssi_config_disable()
527 scr = ssi_excl_shared_bits(vals->scr, avals->scr, aactive); in fsl_ssi_config_disable()
530 regmap_update_bits(ssi->regs, REG_SSI_SCR, scr, 0); in fsl_ssi_config_disable()
533 ssi->streams &= ~BIT(dir); in fsl_ssi_config_disable()
539 if (ssi->soc->offline_config && aactive) in fsl_ssi_config_disable()
542 if (ssi->soc->offline_config) { in fsl_ssi_config_disable()
543 /* Now there is only current stream active, disable all bits */ in fsl_ssi_config_disable()
544 srcr = vals->srcr | avals->srcr; in fsl_ssi_config_disable()
545 stcr = vals->stcr | avals->stcr; in fsl_ssi_config_disable()
546 sier = vals->sier | avals->sier; in fsl_ssi_config_disable()
552 sier = ssi_excl_shared_bits(vals->sier, avals->sier, aactive); in fsl_ssi_config_disable()
553 srcr = ssi_excl_shared_bits(vals->srcr, avals->srcr, aactive); in fsl_ssi_config_disable()
554 stcr = ssi_excl_shared_bits(vals->stcr, avals->stcr, aactive); in fsl_ssi_config_disable()
558 regmap_update_bits(ssi->regs, REG_SSI_SRCR, srcr, 0); in fsl_ssi_config_disable()
559 regmap_update_bits(ssi->regs, REG_SSI_STCR, stcr, 0); in fsl_ssi_config_disable()
560 regmap_update_bits(ssi->regs, REG_SSI_SIER, sier, 0); in fsl_ssi_config_disable()
564 regmap_update_bits(ssi->regs, REG_SSI_SOR, in fsl_ssi_config_disable()
568 static void fsl_ssi_tx_ac97_saccst_setup(struct fsl_ssi *ssi) in fsl_ssi_tx_ac97_saccst_setup() argument
570 struct regmap *regs = ssi->regs; in fsl_ssi_tx_ac97_saccst_setup()
572 /* no SACC{ST,EN,DIS} regs on imx21-class SSI */ in fsl_ssi_tx_ac97_saccst_setup()
573 if (!ssi->soc->imx21regs) { in fsl_ssi_tx_ac97_saccst_setup()
574 /* Disable all channel slots */ in fsl_ssi_tx_ac97_saccst_setup()
576 /* Enable slots 3 & 4 -- PCM Playback Left & Right channels */ in fsl_ssi_tx_ac97_saccst_setup()
582 * fsl_ssi_setup_regvals - Cache critical bits of SIER, SRCR, STCR and
584 * @ssi: SSI context
586 static void fsl_ssi_setup_regvals(struct fsl_ssi *ssi) in fsl_ssi_setup_regvals() argument
588 struct fsl_ssi_regvals *vals = ssi->regvals; in fsl_ssi_setup_regvals()
598 if (fsl_ssi_is_ac97(ssi)) in fsl_ssi_setup_regvals()
601 if (ssi->use_dual_fifo) { in fsl_ssi_setup_regvals()
606 if (ssi->use_dma) { in fsl_ssi_setup_regvals()
615 static void fsl_ssi_setup_ac97(struct fsl_ssi *ssi) in fsl_ssi_setup_ac97() argument
617 struct regmap *regs = ssi->regs; in fsl_ssi_setup_ac97()
623 /* Enable AC97 mode and startup the SSI */ in fsl_ssi_setup_ac97()
638 struct fsl_ssi *ssi = snd_soc_dai_get_drvdata(asoc_rtd_to_cpu(rtd, 0)); in fsl_ssi_startup() local
641 ret = clk_prepare_enable(ssi->clk); in fsl_ssi_startup()
649 * period. But SSI would still access fifo1 with an invalid data. in fsl_ssi_startup()
651 if (ssi->use_dual_fifo || ssi->use_dyna_fifo) in fsl_ssi_startup()
652 snd_pcm_hw_constraint_step(substream->runtime, 0, in fsl_ssi_startup()
662 struct fsl_ssi *ssi = snd_soc_dai_get_drvdata(asoc_rtd_to_cpu(rtd, 0)); in fsl_ssi_shutdown() local
664 clk_disable_unprepare(ssi->clk); in fsl_ssi_shutdown()
668 * fsl_ssi_set_bclk - Configure Digital Audio Interface bit clock
673 * Notes: This function can be only called when using SSI as DAI master
677 * (In 2-channel I2S Master mode, slot_width is fixed 32)
683 bool tx2, tx = substream->stream == SNDRV_PCM_STREAM_PLAYBACK; in fsl_ssi_set_bclk()
684 struct fsl_ssi *ssi = snd_soc_dai_get_drvdata(dai); in fsl_ssi_set_bclk() local
685 struct regmap *regs = ssi->regs; in fsl_ssi_set_bclk()
697 if (ssi->slots) in fsl_ssi_set_bclk()
698 slots = ssi->slots; in fsl_ssi_set_bclk()
699 if (ssi->slot_width) in fsl_ssi_set_bclk()
700 slot_width = ssi->slot_width; in fsl_ssi_set_bclk()
704 (ssi->i2s_net & SSI_SCR_I2S_MODE_MASK) == SSI_SCR_I2S_MODE_MASTER) in fsl_ssi_set_bclk()
710 /* Don't apply it to any non-baudclk circumstance */ in fsl_ssi_set_bclk()
711 if (IS_ERR(ssi->baudclk)) in fsl_ssi_set_bclk()
712 return -EINVAL; in fsl_ssi_set_bclk()
718 if (freq * 5 > clk_get_rate(ssi->clk)) { in fsl_ssi_set_bclk()
719 dev_err(dai->dev, "bitclk > ipgclk / 5\n"); in fsl_ssi_set_bclk()
720 return -EINVAL; in fsl_ssi_set_bclk()
723 baudclk_is_used = ssi->baudclk_streams & ~(BIT(substream->stream)); in fsl_ssi_set_bclk()
735 clkrate = clk_get_rate(ssi->baudclk); in fsl_ssi_set_bclk()
737 clkrate = clk_round_rate(ssi->baudclk, tmprate); in fsl_ssi_set_bclk()
745 sub = freq - afreq; in fsl_ssi_set_bclk()
747 sub = afreq - freq; in fsl_ssi_set_bclk()
768 dev_err(dai->dev, "failed to handle the required sysclk\n"); in fsl_ssi_set_bclk()
769 return -EINVAL; in fsl_ssi_set_bclk()
776 tx2 = tx || ssi->synchronous; in fsl_ssi_set_bclk()
780 ret = clk_set_rate(ssi->baudclk, baudrate); in fsl_ssi_set_bclk()
782 dev_err(dai->dev, "failed to set baudclk rate\n"); in fsl_ssi_set_bclk()
783 return -EINVAL; in fsl_ssi_set_bclk()
791 * fsl_ssi_hw_params - Configure SSI based on PCM hardware parameters
797 * 1) SxCCR.WL bits are critical bits that require SSI to be temporarily
800 * safe to re-configure them when both two streams start running.
802 * fsl_ssi_set_bclk() if SSI is the DAI clock master.
808 bool tx2, tx = substream->stream == SNDRV_PCM_STREAM_PLAYBACK; in fsl_ssi_hw_params()
809 struct fsl_ssi *ssi = snd_soc_dai_get_drvdata(dai); in fsl_ssi_hw_params() local
810 struct fsl_ssi_regvals *vals = ssi->regvals; in fsl_ssi_hw_params()
811 struct regmap *regs = ssi->regs; in fsl_ssi_hw_params()
817 if (fsl_ssi_is_i2s_clock_provider(ssi)) { in fsl_ssi_hw_params()
823 if (!(ssi->baudclk_streams & BIT(substream->stream))) { in fsl_ssi_hw_params()
824 ret = clk_prepare_enable(ssi->baudclk); in fsl_ssi_hw_params()
828 ssi->baudclk_streams |= BIT(substream->stream); in fsl_ssi_hw_params()
833 * SSI is properly configured if it is enabled and running in in fsl_ssi_hw_params()
838 if (ssi->streams && ssi->synchronous) in fsl_ssi_hw_params()
841 if (!fsl_ssi_is_ac97(ssi)) { in fsl_ssi_hw_params()
843 * Keep the ssi->i2s_net intact while having a local variable in fsl_ssi_hw_params()
845 * ssi->i2s_net will lose the settings for regular use cases. in fsl_ssi_hw_params()
847 u8 i2s_net = ssi->i2s_net; in fsl_ssi_hw_params()
849 /* Normal + Network mode to send 16-bit data in 32-bit frames */ in fsl_ssi_hw_params()
850 if (fsl_ssi_is_i2s_bc_fp(ssi) && sample_size == 16) in fsl_ssi_hw_params()
861 /* In synchronous mode, the SSI uses STCCR for capture */ in fsl_ssi_hw_params()
862 tx2 = tx || ssi->synchronous; in fsl_ssi_hw_params()
865 if (ssi->use_dyna_fifo) { in fsl_ssi_hw_params()
867 ssi->audio_config[0].n_fifos_dst = 1; in fsl_ssi_hw_params()
868 ssi->audio_config[1].n_fifos_src = 1; in fsl_ssi_hw_params()
874 ssi->audio_config[0].n_fifos_dst = 2; in fsl_ssi_hw_params()
875 ssi->audio_config[1].n_fifos_src = 2; in fsl_ssi_hw_params()
881 ssi->dma_params_tx.peripheral_config = &ssi->audio_config[0]; in fsl_ssi_hw_params()
882 ssi->dma_params_tx.peripheral_size = sizeof(ssi->audio_config[0]); in fsl_ssi_hw_params()
883 ssi->dma_params_rx.peripheral_config = &ssi->audio_config[1]; in fsl_ssi_hw_params()
884 ssi->dma_params_rx.peripheral_size = sizeof(ssi->audio_config[1]); in fsl_ssi_hw_params()
894 struct fsl_ssi *ssi = snd_soc_dai_get_drvdata(asoc_rtd_to_cpu(rtd, 0)); in fsl_ssi_hw_free() local
896 if (fsl_ssi_is_i2s_clock_provider(ssi) && in fsl_ssi_hw_free()
897 ssi->baudclk_streams & BIT(substream->stream)) { in fsl_ssi_hw_free()
898 clk_disable_unprepare(ssi->baudclk); in fsl_ssi_hw_free()
899 ssi->baudclk_streams &= ~BIT(substream->stream); in fsl_ssi_hw_free()
905 static int _fsl_ssi_set_dai_fmt(struct fsl_ssi *ssi, unsigned int fmt) in _fsl_ssi_set_dai_fmt() argument
910 ssi->dai_fmt = fmt; in _fsl_ssi_set_dai_fmt()
919 ssi->i2s_net = SSI_SCR_NET; in _fsl_ssi_set_dai_fmt()
924 if (IS_ERR(ssi->baudclk)) { in _fsl_ssi_set_dai_fmt()
925 dev_err(ssi->dev, in _fsl_ssi_set_dai_fmt()
927 return -EINVAL; in _fsl_ssi_set_dai_fmt()
931 ssi->i2s_net |= SSI_SCR_I2S_MODE_MASTER; in _fsl_ssi_set_dai_fmt()
934 ssi->i2s_net |= SSI_SCR_I2S_MODE_SLAVE; in _fsl_ssi_set_dai_fmt()
937 return -EINVAL; in _fsl_ssi_set_dai_fmt()
940 slots = ssi->slots ? : 2; in _fsl_ssi_set_dai_fmt()
941 regmap_update_bits(ssi->regs, REG_SSI_STCCR, in _fsl_ssi_set_dai_fmt()
943 regmap_update_bits(ssi->regs, REG_SSI_SRCCR, in _fsl_ssi_set_dai_fmt()
966 return -EINVAL; in _fsl_ssi_set_dai_fmt()
969 scr |= ssi->i2s_net; in _fsl_ssi_set_dai_fmt()
990 return -EINVAL; in _fsl_ssi_set_dai_fmt()
1008 return -EINVAL; in _fsl_ssi_set_dai_fmt()
1015 if (ssi->synchronous || fsl_ssi_is_ac97(ssi)) { in _fsl_ssi_set_dai_fmt()
1023 regmap_update_bits(ssi->regs, REG_SSI_STCR, mask, stcr); in _fsl_ssi_set_dai_fmt()
1024 regmap_update_bits(ssi->regs, REG_SSI_SRCR, mask, srcr); in _fsl_ssi_set_dai_fmt()
1028 regmap_update_bits(ssi->regs, REG_SSI_SCR, mask, scr); in _fsl_ssi_set_dai_fmt()
1034 * fsl_ssi_set_dai_fmt - Configure Digital Audio Interface (DAI) Format
1040 struct fsl_ssi *ssi = snd_soc_dai_get_drvdata(dai); in fsl_ssi_set_dai_fmt() local
1043 if (fsl_ssi_is_ac97(ssi)) in fsl_ssi_set_dai_fmt()
1046 return _fsl_ssi_set_dai_fmt(ssi, fmt); in fsl_ssi_set_dai_fmt()
1050 * fsl_ssi_set_dai_tdm_slot - Set TDM slot number and slot width
1060 struct fsl_ssi *ssi = snd_soc_dai_get_drvdata(dai); in fsl_ssi_set_dai_tdm_slot() local
1061 struct regmap *regs = ssi->regs; in fsl_ssi_set_dai_tdm_slot()
1066 dev_err(dai->dev, "invalid slot width: %d\n", slot_width); in fsl_ssi_set_dai_tdm_slot()
1067 return -EINVAL; in fsl_ssi_set_dai_tdm_slot()
1071 if (ssi->i2s_net && slots < 2) { in fsl_ssi_set_dai_tdm_slot()
1072 dev_err(dai->dev, "slot number should be >= 2 in I2S or NET\n"); in fsl_ssi_set_dai_tdm_slot()
1073 return -EINVAL; in fsl_ssi_set_dai_tdm_slot()
1083 /* Temporarily enable SSI to allow SxMSKs to be configurable */ in fsl_ssi_set_dai_tdm_slot()
1092 ssi->slot_width = slot_width; in fsl_ssi_set_dai_tdm_slot()
1093 ssi->slots = slots; in fsl_ssi_set_dai_tdm_slot()
1099 * fsl_ssi_trigger - Start or stop SSI and corresponding DMA transaction.
1105 * means the SSI completely controls the flow of data.
1111 struct fsl_ssi *ssi = snd_soc_dai_get_drvdata(asoc_rtd_to_cpu(rtd, 0)); in fsl_ssi_trigger() local
1112 bool tx = substream->stream == SNDRV_PCM_STREAM_PLAYBACK; in fsl_ssi_trigger()
1125 if (tx && fsl_ssi_is_ac97(ssi)) in fsl_ssi_trigger()
1126 fsl_ssi_tx_ac97_saccst_setup(ssi); in fsl_ssi_trigger()
1127 fsl_ssi_config_enable(ssi, tx); in fsl_ssi_trigger()
1133 fsl_ssi_config_disable(ssi, tx); in fsl_ssi_trigger()
1137 return -EINVAL; in fsl_ssi_trigger()
1145 struct fsl_ssi *ssi = snd_soc_dai_get_drvdata(dai); in fsl_ssi_dai_probe() local
1147 if (ssi->soc->imx && ssi->use_dma) in fsl_ssi_dai_probe()
1148 snd_soc_dai_init_dma_data(dai, &ssi->dma_params_tx, in fsl_ssi_dai_probe()
1149 &ssi->dma_params_rx); in fsl_ssi_dai_probe()
1167 .stream_name = "CPU-Playback",
1174 .stream_name = "CPU-Capture",
1184 .name = "fsl-ssi",
1203 /* 16-bit capture is broken (errata ERR003778) */
1214 struct regmap *regs = fsl_ac97_data->regs; in fsl_ssi_ac97_write()
1222 mutex_lock(&fsl_ac97_data->ac97_reg_lock); in fsl_ssi_ac97_write()
1224 ret = clk_prepare_enable(fsl_ac97_data->clk); in fsl_ssi_ac97_write()
1241 clk_disable_unprepare(fsl_ac97_data->clk); in fsl_ssi_ac97_write()
1244 mutex_unlock(&fsl_ac97_data->ac97_reg_lock); in fsl_ssi_ac97_write()
1250 struct regmap *regs = fsl_ac97_data->regs; in fsl_ssi_ac97_read()
1256 mutex_lock(&fsl_ac97_data->ac97_reg_lock); in fsl_ssi_ac97_read()
1258 ret = clk_prepare_enable(fsl_ac97_data->clk); in fsl_ssi_ac97_read()
1274 clk_disable_unprepare(fsl_ac97_data->clk); in fsl_ssi_ac97_read()
1277 mutex_unlock(&fsl_ac97_data->ac97_reg_lock); in fsl_ssi_ac97_read()
1287 * fsl_ssi_hw_init - Initialize SSI registers
1288 * @ssi: SSI context
1290 static int fsl_ssi_hw_init(struct fsl_ssi *ssi) in fsl_ssi_hw_init() argument
1292 u32 wm = ssi->fifo_watermark; in fsl_ssi_hw_init()
1295 fsl_ssi_setup_regvals(ssi); in fsl_ssi_hw_init()
1298 regmap_write(ssi->regs, REG_SSI_SFCSR, in fsl_ssi_hw_init()
1303 if (ssi->use_dual_fifo) in fsl_ssi_hw_init()
1304 regmap_update_bits(ssi->regs, REG_SSI_SCR, in fsl_ssi_hw_init()
1308 if (fsl_ssi_is_ac97(ssi)) { in fsl_ssi_hw_init()
1309 _fsl_ssi_set_dai_fmt(ssi, ssi->dai_fmt); in fsl_ssi_hw_init()
1310 fsl_ssi_setup_ac97(ssi); in fsl_ssi_hw_init()
1317 * fsl_ssi_hw_clean - Clear SSI registers
1318 * @ssi: SSI context
1320 static void fsl_ssi_hw_clean(struct fsl_ssi *ssi) in fsl_ssi_hw_clean() argument
1323 if (fsl_ssi_is_ac97(ssi)) { in fsl_ssi_hw_clean()
1325 regmap_update_bits(ssi->regs, REG_SSI_SCR, in fsl_ssi_hw_clean()
1328 regmap_write(ssi->regs, REG_SSI_SACNT, 0); in fsl_ssi_hw_clean()
1330 regmap_write(ssi->regs, REG_SSI_SOR, 0); in fsl_ssi_hw_clean()
1331 /* Disable SSI -- software reset */ in fsl_ssi_hw_clean()
1332 regmap_update_bits(ssi->regs, REG_SSI_SCR, SSI_SCR_SSIEN, 0); in fsl_ssi_hw_clean()
1337 * Make every character in a string lower-case
1348 struct fsl_ssi *ssi, void __iomem *iomem) in fsl_ssi_imx_probe() argument
1350 struct device *dev = &pdev->dev; in fsl_ssi_imx_probe()
1354 if (ssi->has_ipg_clk_name) in fsl_ssi_imx_probe()
1355 ssi->clk = devm_clk_get(dev, "ipg"); in fsl_ssi_imx_probe()
1357 ssi->clk = devm_clk_get(dev, NULL); in fsl_ssi_imx_probe()
1358 if (IS_ERR(ssi->clk)) { in fsl_ssi_imx_probe()
1359 ret = PTR_ERR(ssi->clk); in fsl_ssi_imx_probe()
1365 if (!ssi->has_ipg_clk_name) { in fsl_ssi_imx_probe()
1366 ret = clk_prepare_enable(ssi->clk); in fsl_ssi_imx_probe()
1374 ssi->baudclk = devm_clk_get(dev, "baud"); in fsl_ssi_imx_probe()
1375 if (IS_ERR(ssi->baudclk)) in fsl_ssi_imx_probe()
1377 PTR_ERR(ssi->baudclk)); in fsl_ssi_imx_probe()
1379 ssi->dma_params_tx.maxburst = ssi->dma_maxburst; in fsl_ssi_imx_probe()
1380 ssi->dma_params_rx.maxburst = ssi->dma_maxburst; in fsl_ssi_imx_probe()
1381 ssi->dma_params_tx.addr = ssi->ssi_phys + REG_SSI_STX0; in fsl_ssi_imx_probe()
1382 ssi->dma_params_rx.addr = ssi->ssi_phys + REG_SSI_SRX0; in fsl_ssi_imx_probe()
1385 if (ssi->use_dual_fifo || ssi->use_dyna_fifo) { in fsl_ssi_imx_probe()
1386 ssi->dma_params_tx.maxburst &= ~0x1; in fsl_ssi_imx_probe()
1387 ssi->dma_params_rx.maxburst &= ~0x1; in fsl_ssi_imx_probe()
1390 if (!ssi->use_dma) { in fsl_ssi_imx_probe()
1392 * Some boards use an incompatible codec. Use imx-fiq-pcm-audio in fsl_ssi_imx_probe()
1395 ssi->fiq_params.irq = ssi->irq; in fsl_ssi_imx_probe()
1396 ssi->fiq_params.base = iomem; in fsl_ssi_imx_probe()
1397 ssi->fiq_params.dma_params_rx = &ssi->dma_params_rx; in fsl_ssi_imx_probe()
1398 ssi->fiq_params.dma_params_tx = &ssi->dma_params_tx; in fsl_ssi_imx_probe()
1400 ret = imx_pcm_fiq_init(pdev, &ssi->fiq_params); in fsl_ssi_imx_probe()
1412 if (!ssi->has_ipg_clk_name) in fsl_ssi_imx_probe()
1413 clk_disable_unprepare(ssi->clk); in fsl_ssi_imx_probe()
1418 static void fsl_ssi_imx_clean(struct platform_device *pdev, struct fsl_ssi *ssi) in fsl_ssi_imx_clean() argument
1420 if (!ssi->use_dma) in fsl_ssi_imx_clean()
1422 if (!ssi->has_ipg_clk_name) in fsl_ssi_imx_clean()
1423 clk_disable_unprepare(ssi->clk); in fsl_ssi_imx_clean()
1426 static int fsl_ssi_probe_from_dt(struct fsl_ssi *ssi) in fsl_ssi_probe_from_dt() argument
1428 struct device *dev = ssi->dev; in fsl_ssi_probe_from_dt()
1429 struct device_node *np = dev->of_node; in fsl_ssi_probe_from_dt()
1435 ret = of_property_match_string(np, "clock-names", "ipg"); in fsl_ssi_probe_from_dt()
1437 ssi->has_ipg_clk_name = ret >= 0; in fsl_ssi_probe_from_dt()
1441 if (sprop && !strcmp(sprop, "ac97-slave")) { in fsl_ssi_probe_from_dt()
1442 ssi->dai_fmt = FSLSSI_AC97_DAIFMT; in fsl_ssi_probe_from_dt()
1444 ret = of_property_read_u32(np, "cell-index", &ssi->card_idx); in fsl_ssi_probe_from_dt()
1446 dev_err(dev, "failed to get SSI index property\n"); in fsl_ssi_probe_from_dt()
1447 return -EINVAL; in fsl_ssi_probe_from_dt()
1449 strcpy(ssi->card_name, "ac97-codec"); in fsl_ssi_probe_from_dt()
1450 } else if (!of_find_property(np, "fsl,ssi-asynchronous", NULL)) { in fsl_ssi_probe_from_dt()
1457 * in the SSI synchronous mode however it does not have to in fsl_ssi_probe_from_dt()
1460 ssi->synchronous = true; in fsl_ssi_probe_from_dt()
1464 ssi->use_dma = !of_property_read_bool(np, "fsl,fiq-stream-filter"); in fsl_ssi_probe_from_dt()
1467 iprop = of_get_property(np, "fsl,fifo-depth", NULL); in fsl_ssi_probe_from_dt()
1469 ssi->fifo_depth = be32_to_cpup(iprop); in fsl_ssi_probe_from_dt()
1471 ssi->fifo_depth = 8; in fsl_ssi_probe_from_dt()
1475 if (ssi->use_dma && !ret && dmas[2] == IMX_DMATYPE_SSI_DUAL) in fsl_ssi_probe_from_dt()
1476 ssi->use_dual_fifo = true; in fsl_ssi_probe_from_dt()
1478 if (ssi->use_dma && !ret && dmas[2] == IMX_DMATYPE_MULTI_SAI) in fsl_ssi_probe_from_dt()
1479 ssi->use_dyna_fifo = true; in fsl_ssi_probe_from_dt()
1488 if (!ssi->card_name[0] && of_get_property(np, "codec-handle", NULL)) { in fsl_ssi_probe_from_dt()
1497 snprintf(ssi->card_name, sizeof(ssi->card_name), in fsl_ssi_probe_from_dt()
1498 "snd-soc-%s", sprop); in fsl_ssi_probe_from_dt()
1499 make_lowercase(ssi->card_name); in fsl_ssi_probe_from_dt()
1500 ssi->card_idx = 0; in fsl_ssi_probe_from_dt()
1509 struct device *dev = &pdev->dev; in fsl_ssi_probe()
1510 struct fsl_ssi *ssi; in fsl_ssi_probe() local
1515 ssi = devm_kzalloc(dev, sizeof(*ssi), GFP_KERNEL); in fsl_ssi_probe()
1516 if (!ssi) in fsl_ssi_probe()
1517 return -ENOMEM; in fsl_ssi_probe()
1519 ssi->dev = dev; in fsl_ssi_probe()
1520 ssi->soc = of_device_get_match_data(&pdev->dev); in fsl_ssi_probe()
1523 ret = fsl_ssi_probe_from_dt(ssi); in fsl_ssi_probe()
1527 if (fsl_ssi_is_ac97(ssi)) { in fsl_ssi_probe()
1528 memcpy(&ssi->cpu_dai_drv, &fsl_ssi_ac97_dai, in fsl_ssi_probe()
1530 fsl_ac97_data = ssi; in fsl_ssi_probe()
1532 memcpy(&ssi->cpu_dai_drv, &fsl_ssi_dai_template, in fsl_ssi_probe()
1535 ssi->cpu_dai_drv.name = dev_name(dev); in fsl_ssi_probe()
1540 ssi->ssi_phys = res->start; in fsl_ssi_probe()
1542 if (ssi->soc->imx21regs) { in fsl_ssi_probe()
1543 /* No SACC{ST,EN,DIS} regs in imx21-class SSI */ in fsl_ssi_probe()
1549 if (ssi->has_ipg_clk_name) in fsl_ssi_probe()
1550 ssi->regs = devm_regmap_init_mmio_clk(dev, "ipg", iomem, in fsl_ssi_probe()
1553 ssi->regs = devm_regmap_init_mmio(dev, iomem, &regconfig); in fsl_ssi_probe()
1554 if (IS_ERR(ssi->regs)) { in fsl_ssi_probe()
1556 return PTR_ERR(ssi->regs); in fsl_ssi_probe()
1559 ssi->irq = platform_get_irq(pdev, 0); in fsl_ssi_probe()
1560 if (ssi->irq < 0) in fsl_ssi_probe()
1561 return ssi->irq; in fsl_ssi_probe()
1564 if (ssi->synchronous && !fsl_ssi_is_ac97(ssi)) { in fsl_ssi_probe()
1565 ssi->cpu_dai_drv.symmetric_rate = 1; in fsl_ssi_probe()
1566 ssi->cpu_dai_drv.symmetric_channels = 1; in fsl_ssi_probe()
1567 ssi->cpu_dai_drv.symmetric_sample_bits = 1; in fsl_ssi_probe()
1571 * Configure TX and RX DMA watermarks -- when to send a DMA request in fsl_ssi_probe()
1576 switch (ssi->fifo_depth) { in fsl_ssi_probe()
1579 * Set to 8 as a balanced configuration -- When TX FIFO has 8 in fsl_ssi_probe()
1586 ssi->fifo_watermark = 8; in fsl_ssi_probe()
1587 ssi->dma_maxburst = 8; in fsl_ssi_probe()
1592 ssi->fifo_watermark = ssi->fifo_depth - 2; in fsl_ssi_probe()
1593 ssi->dma_maxburst = ssi->fifo_depth - 2; in fsl_ssi_probe()
1597 dev_set_drvdata(dev, ssi); in fsl_ssi_probe()
1599 if (ssi->soc->imx) { in fsl_ssi_probe()
1600 ret = fsl_ssi_imx_probe(pdev, ssi, iomem); in fsl_ssi_probe()
1605 if (fsl_ssi_is_ac97(ssi)) { in fsl_ssi_probe()
1606 mutex_init(&ssi->ac97_reg_lock); in fsl_ssi_probe()
1615 &ssi->cpu_dai_drv, 1); in fsl_ssi_probe()
1621 if (ssi->use_dma) { in fsl_ssi_probe()
1622 ret = devm_request_irq(dev, ssi->irq, fsl_ssi_isr, 0, in fsl_ssi_probe()
1623 dev_name(dev), ssi); in fsl_ssi_probe()
1625 dev_err(dev, "failed to claim irq %u\n", ssi->irq); in fsl_ssi_probe()
1630 fsl_ssi_debugfs_create(&ssi->dbg_stats, dev); in fsl_ssi_probe()
1632 /* Initially configures SSI registers */ in fsl_ssi_probe()
1633 fsl_ssi_hw_init(ssi); in fsl_ssi_probe()
1636 if (ssi->card_name[0]) { in fsl_ssi_probe()
1639 * Do not set SSI dev as the parent of AC97 CODEC device since in fsl_ssi_probe()
1641 * CODEC has the same DT node as the SSI, so it may bypass the in fsl_ssi_probe()
1642 * dai_probe() of SSI and then cause NULL DMA data pointers. in fsl_ssi_probe()
1644 if (fsl_ssi_is_ac97(ssi)) in fsl_ssi_probe()
1647 ssi->card_pdev = platform_device_register_data(parent, in fsl_ssi_probe()
1648 ssi->card_name, ssi->card_idx, NULL, 0); in fsl_ssi_probe()
1649 if (IS_ERR(ssi->card_pdev)) { in fsl_ssi_probe()
1650 ret = PTR_ERR(ssi->card_pdev); in fsl_ssi_probe()
1652 ssi->card_name, ret); in fsl_ssi_probe()
1660 fsl_ssi_debugfs_remove(&ssi->dbg_stats); in fsl_ssi_probe()
1662 if (fsl_ssi_is_ac97(ssi)) in fsl_ssi_probe()
1665 if (fsl_ssi_is_ac97(ssi)) in fsl_ssi_probe()
1666 mutex_destroy(&ssi->ac97_reg_lock); in fsl_ssi_probe()
1668 if (ssi->soc->imx) in fsl_ssi_probe()
1669 fsl_ssi_imx_clean(pdev, ssi); in fsl_ssi_probe()
1676 struct fsl_ssi *ssi = dev_get_drvdata(&pdev->dev); in fsl_ssi_remove() local
1678 fsl_ssi_debugfs_remove(&ssi->dbg_stats); in fsl_ssi_remove()
1680 if (ssi->card_pdev) in fsl_ssi_remove()
1681 platform_device_unregister(ssi->card_pdev); in fsl_ssi_remove()
1683 /* Clean up SSI registers */ in fsl_ssi_remove()
1684 fsl_ssi_hw_clean(ssi); in fsl_ssi_remove()
1686 if (ssi->soc->imx) in fsl_ssi_remove()
1687 fsl_ssi_imx_clean(pdev, ssi); in fsl_ssi_remove()
1689 if (fsl_ssi_is_ac97(ssi)) { in fsl_ssi_remove()
1691 mutex_destroy(&ssi->ac97_reg_lock); in fsl_ssi_remove()
1700 struct fsl_ssi *ssi = dev_get_drvdata(dev); in fsl_ssi_suspend() local
1701 struct regmap *regs = ssi->regs; in fsl_ssi_suspend()
1703 regmap_read(regs, REG_SSI_SFCSR, &ssi->regcache_sfcsr); in fsl_ssi_suspend()
1704 regmap_read(regs, REG_SSI_SACNT, &ssi->regcache_sacnt); in fsl_ssi_suspend()
1714 struct fsl_ssi *ssi = dev_get_drvdata(dev); in fsl_ssi_resume() local
1715 struct regmap *regs = ssi->regs; in fsl_ssi_resume()
1722 ssi->regcache_sfcsr); in fsl_ssi_resume()
1723 regmap_write(regs, REG_SSI_SACNT, ssi->regcache_sacnt); in fsl_ssi_resume()
1735 .name = "fsl-ssi-dai",
1745 MODULE_ALIAS("platform:fsl-ssi-dai");
1747 MODULE_DESCRIPTION("Freescale Synchronous Serial Interface (SSI) ASoC Driver");