Lines Matching +full:use +full:- +full:internal +full:- +full:divider

1 // SPDX-License-Identifier: GPL-2.0
11 #include <linux/dma-mapping.h>
14 #include <linux/dma/imx-dma.h>
26 dev_err(&asrc->pdev->dev, "Pair %c: " fmt, 'A' + index, ##__VA_ARGS__)
29 dev_dbg(&asrc->pdev->dev, "Pair %c: " fmt, 'A' + index, ##__VA_ARGS__)
32 dev_warn(&asrc->pdev->dev, "Pair %c: " fmt, 'A' + index, ##__VA_ARGS__)
110 * According to RM, the divider range is 1 ~ 8,
114 1, 2, 4, 8, 16, 32, 64, 128, /* divider = 1 */
115 2, 4, 8, 16, 32, 64, 128, 256, /* divider = 2 */
116 3, 6, 12, 24, 48, 96, 192, 384, /* divider = 3 */
117 4, 8, 16, 32, 64, 128, 256, 512, /* divider = 4 */
118 5, 10, 20, 40, 80, 160, 320, 640, /* divider = 5 */
119 6, 12, 24, 48, 96, 192, 384, 768, /* divider = 6 */
120 7, 14, 28, 56, 112, 224, 448, 896, /* divider = 7 */
121 8, 16, 32, 64, 128, 256, 512, 1024, /* divider = 8 */
125 * Check if the divider is available for internal ratio mode
159 * fsl_asrc_sel_proc - Select the pre-processing and post-processing options
162 * @pre_proc: return value for pre-processing option
163 * @post_proc: return value for post-processing option
192 /* Condition for selection of post-processing */ in fsl_asrc_sel_proc()
206 * fsl_asrc_request_pair - Request ASRC pair
210 * It assigns pair by the order of A->C->B because allocation of pair B,
211 * within range [ANCA, ANCA+ANCB-1], depends on the channels of pair A
217 struct fsl_asrc *asrc = pair->asrc; in fsl_asrc_request_pair()
218 struct device *dev = &asrc->pdev->dev; in fsl_asrc_request_pair()
222 spin_lock_irqsave(&asrc->lock, lock_flags); in fsl_asrc_request_pair()
225 if (asrc->pair[i] != NULL) in fsl_asrc_request_pair()
236 ret = -EBUSY; in fsl_asrc_request_pair()
237 } else if (asrc->channel_avail < channels) { in fsl_asrc_request_pair()
239 ret = -EINVAL; in fsl_asrc_request_pair()
241 asrc->channel_avail -= channels; in fsl_asrc_request_pair()
242 asrc->pair[index] = pair; in fsl_asrc_request_pair()
243 pair->channels = channels; in fsl_asrc_request_pair()
244 pair->index = index; in fsl_asrc_request_pair()
247 spin_unlock_irqrestore(&asrc->lock, lock_flags); in fsl_asrc_request_pair()
253 * fsl_asrc_release_pair - Release ASRC pair
260 struct fsl_asrc *asrc = pair->asrc; in fsl_asrc_release_pair()
261 enum asrc_pair_index index = pair->index; in fsl_asrc_release_pair()
265 regmap_update_bits(asrc->regmap, REG_ASRCTR, in fsl_asrc_release_pair()
268 spin_lock_irqsave(&asrc->lock, lock_flags); in fsl_asrc_release_pair()
270 asrc->channel_avail += pair->channels; in fsl_asrc_release_pair()
271 asrc->pair[index] = NULL; in fsl_asrc_release_pair()
272 pair->error = 0; in fsl_asrc_release_pair()
274 spin_unlock_irqrestore(&asrc->lock, lock_flags); in fsl_asrc_release_pair()
278 * fsl_asrc_set_watermarks- configure input and output thresholds
285 struct fsl_asrc *asrc = pair->asrc; in fsl_asrc_set_watermarks()
286 enum asrc_pair_index index = pair->index; in fsl_asrc_set_watermarks()
288 regmap_update_bits(asrc->regmap, REG_ASRMCR(index), in fsl_asrc_set_watermarks()
298 * fsl_asrc_cal_asrck_divisor - Calculate the total divisor between asrck clock rate and sample rate
300 * @div: divider
302 * It follows the formula clk_rate = samplerate * (2 ^ prescaler) * divider
312 return ((div - 1) << ASRCDRi_AxCPi_WIDTH) | ps; in fsl_asrc_cal_asrck_divisor()
316 * fsl_asrc_set_ideal_ratio - Calculate and set the ratio for Ideal Ratio mode only
321 * The ratio is a 32-bit fixed point value with 26 fractional bits.
326 struct fsl_asrc *asrc = pair->asrc; in fsl_asrc_set_ideal_ratio()
327 enum asrc_pair_index index = pair->index; in fsl_asrc_set_ideal_ratio()
333 return -EINVAL; in fsl_asrc_set_ideal_ratio()
348 ratio |= 1 << (IDEAL_RATIO_DECIMAL_DEPTH - i); in fsl_asrc_set_ideal_ratio()
349 inrate -= outrate; in fsl_asrc_set_ideal_ratio()
355 regmap_write(asrc->regmap, REG_ASRIDRL(index), ratio); in fsl_asrc_set_ideal_ratio()
356 regmap_write(asrc->regmap, REG_ASRIDRH(index), ratio >> 24); in fsl_asrc_set_ideal_ratio()
362 * fsl_asrc_config_pair - Configure the assigned ASRC pair
374 * clock rate aligning with the output sample rate; For a use case requiring
379 struct fsl_asrc_pair_priv *pair_priv = pair->private; in fsl_asrc_config_pair()
380 struct asrc_config *config = pair_priv->config; in fsl_asrc_config_pair()
381 struct fsl_asrc *asrc = pair->asrc; in fsl_asrc_config_pair()
382 struct fsl_asrc_priv *asrc_priv = asrc->private; in fsl_asrc_config_pair()
383 enum asrc_pair_index index = pair->index; in fsl_asrc_config_pair()
396 return -EINVAL; in fsl_asrc_config_pair()
400 if (config->channel_num < 1 || config->channel_num > 10) { in fsl_asrc_config_pair()
401 pair_err("does not support %d channels\n", config->channel_num); in fsl_asrc_config_pair()
402 return -EINVAL; in fsl_asrc_config_pair()
405 switch (snd_pcm_format_width(config->input_format)) { in fsl_asrc_config_pair()
417 config->input_format); in fsl_asrc_config_pair()
418 return -EINVAL; in fsl_asrc_config_pair()
421 switch (snd_pcm_format_width(config->output_format)) { in fsl_asrc_config_pair()
430 config->output_format); in fsl_asrc_config_pair()
431 return -EINVAL; in fsl_asrc_config_pair()
434 inrate = config->input_sample_rate; in fsl_asrc_config_pair()
435 outrate = config->output_sample_rate; in fsl_asrc_config_pair()
436 ideal = config->inclk == INCLK_NONE; in fsl_asrc_config_pair()
445 return -EINVAL; in fsl_asrc_config_pair()
454 return -EINVAL; in fsl_asrc_config_pair()
461 return -EINVAL; in fsl_asrc_config_pair()
465 clk_index[IN] = asrc_priv->clk_map[IN][config->inclk]; in fsl_asrc_config_pair()
466 clk_index[OUT] = asrc_priv->clk_map[OUT][config->outclk]; in fsl_asrc_config_pair()
469 clk = asrc_priv->asrck_clk[clk_index[ideal ? OUT : IN]]; in fsl_asrc_config_pair()
475 * The divider range is [1, 1024], defined by the hardware. For non- in fsl_asrc_config_pair()
479 * matter, as long as we keep the divider within its valid range. in fsl_asrc_config_pair()
484 return -EINVAL; in fsl_asrc_config_pair()
489 clk = asrc_priv->asrck_clk[clk_index[OUT]]; in fsl_asrc_config_pair()
496 /* Output divider has the same limitation as the input one */ in fsl_asrc_config_pair()
500 return -EINVAL; in fsl_asrc_config_pair()
506 channels = config->channel_num; in fsl_asrc_config_pair()
508 if (asrc_priv->soc->channel_bits < 4) in fsl_asrc_config_pair()
512 regmap_update_bits(asrc->regmap, REG_ASRCNCR, in fsl_asrc_config_pair()
513 ASRCNCR_ANCi_MASK(index, asrc_priv->soc->channel_bits), in fsl_asrc_config_pair()
514 ASRCNCR_ANCi(index, channels, asrc_priv->soc->channel_bits)); in fsl_asrc_config_pair()
517 regmap_update_bits(asrc->regmap, REG_ASRCTR, in fsl_asrc_config_pair()
519 regmap_update_bits(asrc->regmap, REG_ASRCTR, in fsl_asrc_config_pair()
523 regmap_update_bits(asrc->regmap, REG_ASRCSR, in fsl_asrc_config_pair()
533 regmap_update_bits(asrc->regmap, REG_ASRCDR(index), in fsl_asrc_config_pair()
539 regmap_update_bits(asrc->regmap, REG_ASRMCR1(index), in fsl_asrc_config_pair()
545 regmap_update_bits(asrc->regmap, REG_ASRMCR(index), in fsl_asrc_config_pair()
556 /* Clear ASTSx bit to use Ideal Ratio mode */ in fsl_asrc_config_pair()
557 regmap_update_bits(asrc->regmap, REG_ASRCTR, in fsl_asrc_config_pair()
561 regmap_update_bits(asrc->regmap, REG_ASRCTR, in fsl_asrc_config_pair()
567 /* Apply configurations for pre- and post-processing */ in fsl_asrc_config_pair()
568 regmap_update_bits(asrc->regmap, REG_ASRCFG, in fsl_asrc_config_pair()
577 * fsl_asrc_start_pair - Start the assigned ASRC pair
584 struct fsl_asrc *asrc = pair->asrc; in fsl_asrc_start_pair()
585 enum asrc_pair_index index = pair->index; in fsl_asrc_start_pair()
589 regmap_update_bits(asrc->regmap, REG_ASRCTR, in fsl_asrc_start_pair()
595 regmap_read(asrc->regmap, REG_ASRCFG, &reg); in fsl_asrc_start_pair()
597 } while (!reg && --retry); in fsl_asrc_start_pair()
604 regmap_read(asrc->regmap, REG_ASRCNCR, &reg); in fsl_asrc_start_pair()
605 for (i = 0; i < pair->channels * 4; i++) in fsl_asrc_start_pair()
606 regmap_write(asrc->regmap, REG_ASRDI(index), 0); in fsl_asrc_start_pair()
609 regmap_write(asrc->regmap, REG_ASRIER, ASRIER_AOLIE); in fsl_asrc_start_pair()
613 * fsl_asrc_stop_pair - Stop the assigned ASRC pair
618 struct fsl_asrc *asrc = pair->asrc; in fsl_asrc_stop_pair()
619 enum asrc_pair_index index = pair->index; in fsl_asrc_stop_pair()
622 regmap_update_bits(asrc->regmap, REG_ASRCTR, in fsl_asrc_stop_pair()
627 * fsl_asrc_get_dma_channel- Get DMA channel according to the pair and direction.
634 struct fsl_asrc *asrc = pair->asrc; in fsl_asrc_get_dma_channel()
635 enum asrc_pair_index index = pair->index; in fsl_asrc_get_dma_channel()
640 return dma_request_slave_channel(&asrc->pdev->dev, name); in fsl_asrc_get_dma_channel()
647 struct fsl_asrc_priv *asrc_priv = asrc->private; in fsl_asrc_dai_startup()
650 if (asrc_priv->soc->channel_bits == 3) in fsl_asrc_dai_startup()
651 snd_pcm_hw_constraint_step(substream->runtime, 0, in fsl_asrc_dai_startup()
655 return snd_pcm_hw_constraint_list(substream->runtime, 0, in fsl_asrc_dai_startup()
659 /* Select proper clock source for internal ratio mode */
665 struct fsl_asrc_pair_priv *pair_priv = pair->private; in fsl_asrc_select_clk()
666 struct asrc_config *config = pair_priv->config; in fsl_asrc_select_clk()
674 /* Select proper clock source for internal ratio mode */ in fsl_asrc_select_clk()
677 clk_index = asrc_priv->clk_map[j][i]; in fsl_asrc_select_clk()
678 clk_rate = clk_get_rate(asrc_priv->asrck_clk[clk_index]); in fsl_asrc_select_clk()
693 config->inclk = select_clk[IN]; in fsl_asrc_select_clk()
694 config->outclk = select_clk[OUT]; in fsl_asrc_select_clk()
702 struct fsl_asrc_priv *asrc_priv = asrc->private; in fsl_asrc_dai_hw_params()
703 struct snd_pcm_runtime *runtime = substream->runtime; in fsl_asrc_dai_hw_params()
704 struct fsl_asrc_pair *pair = runtime->private_data; in fsl_asrc_dai_hw_params()
705 struct fsl_asrc_pair_priv *pair_priv = pair->private; in fsl_asrc_dai_hw_params()
713 dev_err(dai->dev, "fail to request asrc pair\n"); in fsl_asrc_dai_hw_params()
717 pair_priv->config = &config; in fsl_asrc_dai_hw_params()
719 config.pair = pair->index; in fsl_asrc_dai_hw_params()
722 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { in fsl_asrc_dai_hw_params()
724 config.output_format = asrc->asrc_format; in fsl_asrc_dai_hw_params()
726 config.output_sample_rate = asrc->asrc_rate; in fsl_asrc_dai_hw_params()
728 config.input_format = asrc->asrc_format; in fsl_asrc_dai_hw_params()
730 config.input_sample_rate = asrc->asrc_rate; in fsl_asrc_dai_hw_params()
740 dev_err(dai->dev, "fail to config asrc pair\n"); in fsl_asrc_dai_hw_params()
750 struct snd_pcm_runtime *runtime = substream->runtime; in fsl_asrc_dai_hw_free()
751 struct fsl_asrc_pair *pair = runtime->private_data; in fsl_asrc_dai_hw_free()
762 struct snd_pcm_runtime *runtime = substream->runtime; in fsl_asrc_dai_trigger()
763 struct fsl_asrc_pair *pair = runtime->private_data; in fsl_asrc_dai_trigger()
777 return -EINVAL; in fsl_asrc_dai_trigger()
794 snd_soc_dai_init_dma_data(dai, &asrc->dma_params_tx, in fsl_asrc_dai_probe()
795 &asrc->dma_params_rx); in fsl_asrc_dai_probe()
807 .stream_name = "ASRC-Playback",
817 .stream_name = "ASRC-Capture",
972 * fsl_asrc_init - Initialize ASRC registers with a default configuration
979 /* Halt ASRC internal FP when input FIFO needs data for pair A, B, C */ in fsl_asrc_init()
980 regmap_write(asrc->regmap, REG_ASRCTR, ASRCTR_ASRCEN); in fsl_asrc_init()
983 regmap_write(asrc->regmap, REG_ASRIER, 0x0); in fsl_asrc_init()
986 regmap_write(asrc->regmap, REG_ASRPM1, 0x7fffff); in fsl_asrc_init()
987 regmap_write(asrc->regmap, REG_ASRPM2, 0x255555); in fsl_asrc_init()
988 regmap_write(asrc->regmap, REG_ASRPM3, 0xff7280); in fsl_asrc_init()
989 regmap_write(asrc->regmap, REG_ASRPM4, 0xff7280); in fsl_asrc_init()
990 regmap_write(asrc->regmap, REG_ASRPM5, 0xff7280); in fsl_asrc_init()
993 regmap_update_bits(asrc->regmap, REG_ASRTFR1, in fsl_asrc_init()
1001 ipg_rate = clk_get_rate(asrc->ipg_clk); in fsl_asrc_init()
1002 regmap_write(asrc->regmap, REG_ASR76K, ipg_rate / 76000); in fsl_asrc_init()
1003 return regmap_write(asrc->regmap, REG_ASR56K, ipg_rate / 56000); in fsl_asrc_init()
1007 * fsl_asrc_isr- Interrupt handler for ASRC
1014 struct device *dev = &asrc->pdev->dev; in fsl_asrc_isr()
1018 regmap_read(asrc->regmap, REG_ASRSTR, &status); in fsl_asrc_isr()
1021 regmap_write(asrc->regmap, REG_ASRSTR, ASRSTR_AOLE); in fsl_asrc_isr()
1024 * We here use dev_dbg() for all exceptions because ASRC itself does in fsl_asrc_isr()
1029 if (!asrc->pair[index]) in fsl_asrc_isr()
1033 asrc->pair[index]->error |= ASRC_TASK_Q_OVERLOAD; in fsl_asrc_isr()
1038 asrc->pair[index]->error |= ASRC_OUTPUT_TASK_OVERLOAD; in fsl_asrc_isr()
1043 asrc->pair[index]->error |= ASRC_INPUT_TASK_OVERLOAD; in fsl_asrc_isr()
1048 asrc->pair[index]->error |= ASRC_OUTPUT_BUFFER_OVERFLOW; in fsl_asrc_isr()
1053 asrc->pair[index]->error |= ASRC_INPUT_BUFFER_UNDERRUN; in fsl_asrc_isr()
1071 struct device_node *np = pdev->dev.of_node; in fsl_asrc_probe()
1082 asrc = devm_kzalloc(&pdev->dev, sizeof(*asrc), GFP_KERNEL); in fsl_asrc_probe()
1084 return -ENOMEM; in fsl_asrc_probe()
1086 asrc_priv = devm_kzalloc(&pdev->dev, sizeof(*asrc_priv), GFP_KERNEL); in fsl_asrc_probe()
1088 return -ENOMEM; in fsl_asrc_probe()
1090 asrc->pdev = pdev; in fsl_asrc_probe()
1091 asrc->private = asrc_priv; in fsl_asrc_probe()
1098 asrc->paddr = res->start; in fsl_asrc_probe()
1100 asrc->regmap = devm_regmap_init_mmio(&pdev->dev, regs, &fsl_asrc_regmap_config); in fsl_asrc_probe()
1101 if (IS_ERR(asrc->regmap)) { in fsl_asrc_probe()
1102 dev_err(&pdev->dev, "failed to init regmap\n"); in fsl_asrc_probe()
1103 return PTR_ERR(asrc->regmap); in fsl_asrc_probe()
1110 ret = devm_request_irq(&pdev->dev, irq, fsl_asrc_isr, 0, in fsl_asrc_probe()
1111 dev_name(&pdev->dev), asrc); in fsl_asrc_probe()
1113 dev_err(&pdev->dev, "failed to claim irq %u: %d\n", irq, ret); in fsl_asrc_probe()
1117 asrc->mem_clk = devm_clk_get(&pdev->dev, "mem"); in fsl_asrc_probe()
1118 if (IS_ERR(asrc->mem_clk)) { in fsl_asrc_probe()
1119 dev_err(&pdev->dev, "failed to get mem clock\n"); in fsl_asrc_probe()
1120 return PTR_ERR(asrc->mem_clk); in fsl_asrc_probe()
1123 asrc->ipg_clk = devm_clk_get(&pdev->dev, "ipg"); in fsl_asrc_probe()
1124 if (IS_ERR(asrc->ipg_clk)) { in fsl_asrc_probe()
1125 dev_err(&pdev->dev, "failed to get ipg clock\n"); in fsl_asrc_probe()
1126 return PTR_ERR(asrc->ipg_clk); in fsl_asrc_probe()
1129 asrc->spba_clk = devm_clk_get(&pdev->dev, "spba"); in fsl_asrc_probe()
1130 if (IS_ERR(asrc->spba_clk)) in fsl_asrc_probe()
1131 dev_warn(&pdev->dev, "failed to get spba clock\n"); in fsl_asrc_probe()
1135 asrc_priv->asrck_clk[i] = devm_clk_get(&pdev->dev, tmp); in fsl_asrc_probe()
1136 if (IS_ERR(asrc_priv->asrck_clk[i])) { in fsl_asrc_probe()
1137 dev_err(&pdev->dev, "failed to get %s clock\n", tmp); in fsl_asrc_probe()
1138 return PTR_ERR(asrc_priv->asrck_clk[i]); in fsl_asrc_probe()
1142 asrc_priv->soc = of_device_get_match_data(&pdev->dev); in fsl_asrc_probe()
1143 asrc->use_edma = asrc_priv->soc->use_edma; in fsl_asrc_probe()
1144 asrc->get_dma_channel = fsl_asrc_get_dma_channel; in fsl_asrc_probe()
1145 asrc->request_pair = fsl_asrc_request_pair; in fsl_asrc_probe()
1146 asrc->release_pair = fsl_asrc_release_pair; in fsl_asrc_probe()
1147 asrc->get_fifo_addr = fsl_asrc_get_fifo_addr; in fsl_asrc_probe()
1148 asrc->pair_priv_size = sizeof(struct fsl_asrc_pair_priv); in fsl_asrc_probe()
1150 if (of_device_is_compatible(np, "fsl,imx35-asrc")) { in fsl_asrc_probe()
1151 asrc_priv->clk_map[IN] = input_clk_map_imx35; in fsl_asrc_probe()
1152 asrc_priv->clk_map[OUT] = output_clk_map_imx35; in fsl_asrc_probe()
1153 } else if (of_device_is_compatible(np, "fsl,imx53-asrc")) { in fsl_asrc_probe()
1154 asrc_priv->clk_map[IN] = input_clk_map_imx53; in fsl_asrc_probe()
1155 asrc_priv->clk_map[OUT] = output_clk_map_imx53; in fsl_asrc_probe()
1156 } else if (of_device_is_compatible(np, "fsl,imx8qm-asrc") || in fsl_asrc_probe()
1157 of_device_is_compatible(np, "fsl,imx8qxp-asrc")) { in fsl_asrc_probe()
1158 ret = of_property_read_u32(np, "fsl,asrc-clk-map", &map_idx); in fsl_asrc_probe()
1160 dev_err(&pdev->dev, "failed to get clk map index\n"); in fsl_asrc_probe()
1165 dev_err(&pdev->dev, "unsupported clk map index\n"); in fsl_asrc_probe()
1166 return -EINVAL; in fsl_asrc_probe()
1168 if (of_device_is_compatible(np, "fsl,imx8qm-asrc")) { in fsl_asrc_probe()
1169 asrc_priv->clk_map[IN] = clk_map_imx8qm[map_idx]; in fsl_asrc_probe()
1170 asrc_priv->clk_map[OUT] = clk_map_imx8qm[map_idx]; in fsl_asrc_probe()
1172 asrc_priv->clk_map[IN] = clk_map_imx8qxp[map_idx]; in fsl_asrc_probe()
1173 asrc_priv->clk_map[OUT] = clk_map_imx8qxp[map_idx]; in fsl_asrc_probe()
1177 asrc->channel_avail = 10; in fsl_asrc_probe()
1179 ret = of_property_read_u32(np, "fsl,asrc-rate", in fsl_asrc_probe()
1180 &asrc->asrc_rate); in fsl_asrc_probe()
1182 dev_err(&pdev->dev, "failed to get output rate\n"); in fsl_asrc_probe()
1186 ret = of_property_read_u32(np, "fsl,asrc-format", &asrc_fmt); in fsl_asrc_probe()
1187 asrc->asrc_format = (__force snd_pcm_format_t)asrc_fmt; in fsl_asrc_probe()
1189 ret = of_property_read_u32(np, "fsl,asrc-width", &width); in fsl_asrc_probe()
1191 dev_err(&pdev->dev, "failed to decide output format\n"); in fsl_asrc_probe()
1197 asrc->asrc_format = SNDRV_PCM_FORMAT_S16_LE; in fsl_asrc_probe()
1200 asrc->asrc_format = SNDRV_PCM_FORMAT_S24_LE; in fsl_asrc_probe()
1203 dev_warn(&pdev->dev, in fsl_asrc_probe()
1204 "unsupported width, use default S24_LE\n"); in fsl_asrc_probe()
1205 asrc->asrc_format = SNDRV_PCM_FORMAT_S24_LE; in fsl_asrc_probe()
1210 if (!(FSL_ASRC_FORMATS & pcm_format_to_bits(asrc->asrc_format))) { in fsl_asrc_probe()
1211 dev_warn(&pdev->dev, "unsupported width, use default S24_LE\n"); in fsl_asrc_probe()
1212 asrc->asrc_format = SNDRV_PCM_FORMAT_S24_LE; in fsl_asrc_probe()
1216 spin_lock_init(&asrc->lock); in fsl_asrc_probe()
1217 pm_runtime_enable(&pdev->dev); in fsl_asrc_probe()
1218 if (!pm_runtime_enabled(&pdev->dev)) { in fsl_asrc_probe()
1219 ret = fsl_asrc_runtime_resume(&pdev->dev); in fsl_asrc_probe()
1224 ret = pm_runtime_resume_and_get(&pdev->dev); in fsl_asrc_probe()
1230 dev_err(&pdev->dev, "failed to init asrc %d\n", ret); in fsl_asrc_probe()
1234 ret = pm_runtime_put_sync(&pdev->dev); in fsl_asrc_probe()
1235 if (ret < 0 && ret != -ENOSYS) in fsl_asrc_probe()
1238 ret = devm_snd_soc_register_component(&pdev->dev, &fsl_asrc_component, in fsl_asrc_probe()
1241 dev_err(&pdev->dev, "failed to register ASoC DAI\n"); in fsl_asrc_probe()
1248 if (!pm_runtime_status_suspended(&pdev->dev)) in fsl_asrc_probe()
1249 fsl_asrc_runtime_suspend(&pdev->dev); in fsl_asrc_probe()
1251 pm_runtime_disable(&pdev->dev); in fsl_asrc_probe()
1257 pm_runtime_disable(&pdev->dev); in fsl_asrc_remove()
1258 if (!pm_runtime_status_suspended(&pdev->dev)) in fsl_asrc_remove()
1259 fsl_asrc_runtime_suspend(&pdev->dev); in fsl_asrc_remove()
1267 struct fsl_asrc_priv *asrc_priv = asrc->private; in fsl_asrc_runtime_resume()
1272 ret = clk_prepare_enable(asrc->mem_clk); in fsl_asrc_runtime_resume()
1275 ret = clk_prepare_enable(asrc->ipg_clk); in fsl_asrc_runtime_resume()
1278 if (!IS_ERR(asrc->spba_clk)) { in fsl_asrc_runtime_resume()
1279 ret = clk_prepare_enable(asrc->spba_clk); in fsl_asrc_runtime_resume()
1284 ret = clk_prepare_enable(asrc_priv->asrck_clk[i]); in fsl_asrc_runtime_resume()
1290 regmap_read(asrc->regmap, REG_ASRCTR, &asrctr); in fsl_asrc_runtime_resume()
1291 regmap_update_bits(asrc->regmap, REG_ASRCTR, in fsl_asrc_runtime_resume()
1295 regcache_cache_only(asrc->regmap, false); in fsl_asrc_runtime_resume()
1296 regcache_mark_dirty(asrc->regmap); in fsl_asrc_runtime_resume()
1297 regcache_sync(asrc->regmap); in fsl_asrc_runtime_resume()
1299 regmap_update_bits(asrc->regmap, REG_ASRCFG, in fsl_asrc_runtime_resume()
1301 ASRCFG_PREMODi_ALL_MASK, asrc_priv->regcache_cfg); in fsl_asrc_runtime_resume()
1304 regmap_update_bits(asrc->regmap, REG_ASRCTR, in fsl_asrc_runtime_resume()
1310 regmap_read(asrc->regmap, REG_ASRCFG, &reg); in fsl_asrc_runtime_resume()
1312 } while ((reg != ((asrctr >> ASRCTR_ASRCEi_SHIFT(0)) & 0x7)) && --retry); in fsl_asrc_runtime_resume()
1328 for (i--; i >= 0; i--) in fsl_asrc_runtime_resume()
1329 clk_disable_unprepare(asrc_priv->asrck_clk[i]); in fsl_asrc_runtime_resume()
1330 if (!IS_ERR(asrc->spba_clk)) in fsl_asrc_runtime_resume()
1331 clk_disable_unprepare(asrc->spba_clk); in fsl_asrc_runtime_resume()
1333 clk_disable_unprepare(asrc->ipg_clk); in fsl_asrc_runtime_resume()
1335 clk_disable_unprepare(asrc->mem_clk); in fsl_asrc_runtime_resume()
1342 struct fsl_asrc_priv *asrc_priv = asrc->private; in fsl_asrc_runtime_suspend()
1345 regmap_read(asrc->regmap, REG_ASRCFG, in fsl_asrc_runtime_suspend()
1346 &asrc_priv->regcache_cfg); in fsl_asrc_runtime_suspend()
1348 regcache_cache_only(asrc->regmap, true); in fsl_asrc_runtime_suspend()
1351 clk_disable_unprepare(asrc_priv->asrck_clk[i]); in fsl_asrc_runtime_suspend()
1352 if (!IS_ERR(asrc->spba_clk)) in fsl_asrc_runtime_suspend()
1353 clk_disable_unprepare(asrc->spba_clk); in fsl_asrc_runtime_suspend()
1354 clk_disable_unprepare(asrc->ipg_clk); in fsl_asrc_runtime_suspend()
1355 clk_disable_unprepare(asrc->mem_clk); in fsl_asrc_runtime_suspend()
1387 { .compatible = "fsl,imx35-asrc", .data = &fsl_asrc_imx35_data },
1388 { .compatible = "fsl,imx53-asrc", .data = &fsl_asrc_imx53_data },
1389 { .compatible = "fsl,imx8qm-asrc", .data = &fsl_asrc_imx8qm_data },
1390 { .compatible = "fsl,imx8qxp-asrc", .data = &fsl_asrc_imx8qxp_data },
1399 .name = "fsl-asrc",
1408 MODULE_ALIAS("platform:fsl-asrc");