Lines Matching +full:dbvdd +full:- +full:supply
1 // SPDX-License-Identifier: GPL-2.0-only
3 * wm0010.c -- WM0010 DSP Driver
101 struct regulator *dbvdd; member
156 /* Called with wm0010->lock held */
164 spin_lock_irqsave(&wm0010->irq_lock, flags); in wm0010_halt()
165 state = wm0010->state; in wm0010_halt()
166 spin_unlock_irqrestore(&wm0010->irq_lock, flags); in wm0010_halt()
177 gpio_set_value_cansleep(wm0010->gpio_reset, in wm0010_halt()
178 wm0010->gpio_reset_value); in wm0010_halt()
180 regulator_disable(wm0010->dbvdd); in wm0010_halt()
181 regulator_bulk_disable(ARRAY_SIZE(wm0010->core_supplies), in wm0010_halt()
182 wm0010->core_supplies); in wm0010_halt()
186 spin_lock_irqsave(&wm0010->irq_lock, flags); in wm0010_halt()
187 wm0010->state = WM0010_POWER_OFF; in wm0010_halt()
188 spin_unlock_irqrestore(&wm0010->irq_lock, flags); in wm0010_halt()
199 /* Called with wm0010->lock held */
205 spin_lock_irqsave(&wm0010->irq_lock, flags); in wm0010_mark_boot_failure()
206 state = wm0010->state; in wm0010_mark_boot_failure()
207 spin_unlock_irqrestore(&wm0010->irq_lock, flags); in wm0010_mark_boot_failure()
209 dev_err(wm0010->dev, "Failed to transition from `%s' state to `%s' state\n", in wm0010_mark_boot_failure()
212 wm0010->boot_failed = true; in wm0010_mark_boot_failure()
218 struct snd_soc_component *component = xfer->component; in wm0010_boot_xfer_complete()
220 u32 *out32 = xfer->t.rx_buf; in wm0010_boot_xfer_complete()
223 if (xfer->m.status != 0) { in wm0010_boot_xfer_complete()
224 dev_err(component->dev, "SPI transfer failed: %d\n", in wm0010_boot_xfer_complete()
225 xfer->m.status); in wm0010_boot_xfer_complete()
227 if (xfer->done) in wm0010_boot_xfer_complete()
228 complete(xfer->done); in wm0010_boot_xfer_complete()
232 for (i = 0; i < xfer->t.len / 4; i++) { in wm0010_boot_xfer_complete()
233 dev_dbg(component->dev, "%d: %04x\n", i, out32[i]); in wm0010_boot_xfer_complete()
237 dev_err(component->dev, in wm0010_boot_xfer_complete()
243 if (wm0010->state < WM0010_STAGE2) in wm0010_boot_xfer_complete()
245 dev_err(component->dev, in wm0010_boot_xfer_complete()
251 dev_dbg(component->dev, "Stage2 loader running\n"); in wm0010_boot_xfer_complete()
255 dev_dbg(component->dev, "CODE_HDR packet received\n"); in wm0010_boot_xfer_complete()
259 dev_dbg(component->dev, "CODE_DATA packet received\n"); in wm0010_boot_xfer_complete()
263 dev_dbg(component->dev, "Download complete\n"); in wm0010_boot_xfer_complete()
267 dev_dbg(component->dev, "Application start\n"); in wm0010_boot_xfer_complete()
271 dev_dbg(component->dev, "PLL packet received\n"); in wm0010_boot_xfer_complete()
272 wm0010->pll_running = true; in wm0010_boot_xfer_complete()
276 dev_err(component->dev, "Device reports image too long\n"); in wm0010_boot_xfer_complete()
281 dev_err(component->dev, "Device reports bad SPI packet\n"); in wm0010_boot_xfer_complete()
286 dev_err(component->dev, "Device reports SPI read overflow\n"); in wm0010_boot_xfer_complete()
291 dev_err(component->dev, "Device reports SPI underclock\n"); in wm0010_boot_xfer_complete()
296 dev_err(component->dev, "Device reports bad header packet\n"); in wm0010_boot_xfer_complete()
301 dev_err(component->dev, "Device reports invalid packet type\n"); in wm0010_boot_xfer_complete()
306 dev_err(component->dev, "Device reports data before header error\n"); in wm0010_boot_xfer_complete()
311 dev_err(component->dev, "Device reports invalid PLL packet\n"); in wm0010_boot_xfer_complete()
315 dev_err(component->dev, "Device reports packet alignment error\n"); in wm0010_boot_xfer_complete()
320 dev_err(component->dev, "Unrecognised return 0x%x\n", in wm0010_boot_xfer_complete()
326 if (wm0010->boot_failed) in wm0010_boot_xfer_complete()
330 if (xfer->done) in wm0010_boot_xfer_complete()
331 complete(xfer->done); in wm0010_boot_xfer_complete()
344 struct spi_device *spi = to_spi_device(component->dev); in wm0010_firmware_load()
359 ret = request_firmware(&fw, name, component->dev); in wm0010_firmware_load()
361 dev_err(component->dev, "Failed to request application(%s): %d\n", in wm0010_firmware_load()
366 rec = (const struct dfw_binrec *)fw->data; in wm0010_firmware_load()
367 inforec = (const struct dfw_inforec *)rec->data; in wm0010_firmware_load()
369 dsp = inforec->dsp_target; in wm0010_firmware_load()
370 wm0010->boot_failed = false; in wm0010_firmware_load()
372 return -EINVAL; in wm0010_firmware_load()
375 if (rec->command != DFW_CMD_INFO) { in wm0010_firmware_load()
376 dev_err(component->dev, "First record not INFO\r\n"); in wm0010_firmware_load()
377 ret = -EINVAL; in wm0010_firmware_load()
381 if (inforec->info_version != INFO_VERSION) { in wm0010_firmware_load()
382 dev_err(component->dev, in wm0010_firmware_load()
384 inforec->info_version); in wm0010_firmware_load()
385 ret = -EINVAL; in wm0010_firmware_load()
389 dev_dbg(component->dev, "Version v%02d INFO record found\r\n", in wm0010_firmware_load()
390 inforec->info_version); in wm0010_firmware_load()
394 dev_err(component->dev, "Not a WM0010 firmware file.\r\n"); in wm0010_firmware_load()
395 ret = -EINVAL; in wm0010_firmware_load()
400 offset += ((rec->length) + 8); in wm0010_firmware_load()
401 rec = (void *)&rec->data[rec->length]; in wm0010_firmware_load()
403 while (offset < fw->size) { in wm0010_firmware_load()
404 dev_dbg(component->dev, in wm0010_firmware_load()
406 rec->command, rec->length); in wm0010_firmware_load()
407 len = rec->length + 8; in wm0010_firmware_load()
411 ret = -ENOMEM; in wm0010_firmware_load()
415 xfer->component = component; in wm0010_firmware_load()
416 list_add_tail(&xfer->list, &xfer_list); in wm0010_firmware_load()
420 ret = -ENOMEM; in wm0010_firmware_load()
423 xfer->t.rx_buf = out; in wm0010_firmware_load()
427 ret = -ENOMEM; in wm0010_firmware_load()
430 xfer->t.tx_buf = img; in wm0010_firmware_load()
432 byte_swap_64((u64 *)&rec->command, img, len); in wm0010_firmware_load()
434 spi_message_init(&xfer->m); in wm0010_firmware_load()
435 xfer->m.complete = wm0010_boot_xfer_complete; in wm0010_firmware_load()
436 xfer->m.context = xfer; in wm0010_firmware_load()
437 xfer->t.len = len; in wm0010_firmware_load()
438 xfer->t.bits_per_word = 8; in wm0010_firmware_load()
440 if (!wm0010->pll_running) { in wm0010_firmware_load()
441 xfer->t.speed_hz = wm0010->sysclk / 6; in wm0010_firmware_load()
443 xfer->t.speed_hz = wm0010->max_spi_freq; in wm0010_firmware_load()
445 if (wm0010->board_max_spi_speed && in wm0010_firmware_load()
446 (wm0010->board_max_spi_speed < wm0010->max_spi_freq)) in wm0010_firmware_load()
447 xfer->t.speed_hz = wm0010->board_max_spi_speed; in wm0010_firmware_load()
451 wm0010->max_spi_freq = xfer->t.speed_hz; in wm0010_firmware_load()
453 spi_message_add_tail(&xfer->t, &xfer->m); in wm0010_firmware_load()
455 offset += ((rec->length) + 8); in wm0010_firmware_load()
456 rec = (void *)&rec->data[rec->length]; in wm0010_firmware_load()
458 if (offset >= fw->size) { in wm0010_firmware_load()
459 dev_dbg(component->dev, "All transfers scheduled\n"); in wm0010_firmware_load()
460 xfer->done = &done; in wm0010_firmware_load()
463 ret = spi_async(spi, &xfer->m); in wm0010_firmware_load()
465 dev_err(component->dev, "Write failed: %d\n", ret); in wm0010_firmware_load()
469 if (wm0010->boot_failed) { in wm0010_firmware_load()
470 dev_dbg(component->dev, "Boot fail!\n"); in wm0010_firmware_load()
471 ret = -EINVAL; in wm0010_firmware_load()
484 kfree(xfer->t.rx_buf); in wm0010_firmware_load()
485 kfree(xfer->t.tx_buf); in wm0010_firmware_load()
486 list_del(&xfer->list); in wm0010_firmware_load()
497 struct spi_device *spi = to_spi_device(component->dev); in wm0010_stage2_load()
507 ret = request_firmware(&fw, "wm0010_stage2.bin", component->dev); in wm0010_stage2_load()
509 dev_err(component->dev, "Failed to request stage2 loader: %d\n", in wm0010_stage2_load()
514 dev_dbg(component->dev, "Downloading %zu byte stage 2 loader\n", fw->size); in wm0010_stage2_load()
517 img = kmemdup(&fw->data[0], fw->size, GFP_KERNEL | GFP_DMA); in wm0010_stage2_load()
519 ret = -ENOMEM; in wm0010_stage2_load()
523 out = kzalloc(fw->size, GFP_KERNEL | GFP_DMA); in wm0010_stage2_load()
525 ret = -ENOMEM; in wm0010_stage2_load()
533 t.len = fw->size; in wm0010_stage2_load()
535 t.speed_hz = wm0010->sysclk / 10; in wm0010_stage2_load()
538 dev_dbg(component->dev, "Starting initial download at %dHz\n", in wm0010_stage2_load()
543 dev_err(component->dev, "Initial download failed: %d\n", ret); in wm0010_stage2_load()
548 for (i = 0; i < fw->size; i++) { in wm0010_stage2_load()
550 dev_err(component->dev, "Boot ROM error: %x in %d\n", in wm0010_stage2_load()
553 ret = -EBUSY; in wm0010_stage2_load()
569 struct spi_device *spi = to_spi_device(component->dev); in wm0010_boot()
581 spin_lock_irqsave(&wm0010->irq_lock, flags); in wm0010_boot()
582 if (wm0010->state != WM0010_POWER_OFF) in wm0010_boot()
583 dev_warn(wm0010->dev, "DSP already powered up!\n"); in wm0010_boot()
584 spin_unlock_irqrestore(&wm0010->irq_lock, flags); in wm0010_boot()
586 if (wm0010->sysclk > 26000000) { in wm0010_boot()
587 dev_err(component->dev, "Max DSP clock frequency is 26MHz\n"); in wm0010_boot()
588 ret = -ECANCELED; in wm0010_boot()
592 mutex_lock(&wm0010->lock); in wm0010_boot()
593 wm0010->pll_running = false; in wm0010_boot()
595 dev_dbg(component->dev, "max_spi_freq: %d\n", wm0010->max_spi_freq); in wm0010_boot()
597 ret = regulator_bulk_enable(ARRAY_SIZE(wm0010->core_supplies), in wm0010_boot()
598 wm0010->core_supplies); in wm0010_boot()
600 dev_err(&spi->dev, "Failed to enable core supplies: %d\n", in wm0010_boot()
602 mutex_unlock(&wm0010->lock); in wm0010_boot()
606 ret = regulator_enable(wm0010->dbvdd); in wm0010_boot()
608 dev_err(&spi->dev, "Failed to enable DBVDD: %d\n", ret); in wm0010_boot()
613 gpio_set_value_cansleep(wm0010->gpio_reset, !wm0010->gpio_reset_value); in wm0010_boot()
614 spin_lock_irqsave(&wm0010->irq_lock, flags); in wm0010_boot()
615 wm0010->state = WM0010_OUT_OF_RESET; in wm0010_boot()
616 spin_unlock_irqrestore(&wm0010->irq_lock, flags); in wm0010_boot()
618 if (!wait_for_completion_timeout(&wm0010->boot_completion, in wm0010_boot()
620 dev_err(component->dev, "Failed to get interrupt from DSP\n"); in wm0010_boot()
622 spin_lock_irqsave(&wm0010->irq_lock, flags); in wm0010_boot()
623 wm0010->state = WM0010_BOOTROM; in wm0010_boot()
624 spin_unlock_irqrestore(&wm0010->irq_lock, flags); in wm0010_boot()
630 if (!wait_for_completion_timeout(&wm0010->boot_completion, in wm0010_boot()
632 dev_err(component->dev, "Failed to get interrupt from DSP loader.\n"); in wm0010_boot()
634 spin_lock_irqsave(&wm0010->irq_lock, flags); in wm0010_boot()
635 wm0010->state = WM0010_STAGE2; in wm0010_boot()
636 spin_unlock_irqrestore(&wm0010->irq_lock, flags); in wm0010_boot()
639 if (wm0010->max_spi_freq) { in wm0010_boot()
644 pll_rec.length = (sizeof(pll_rec) - 8); in wm0010_boot()
647 pll_rec.clkctrl1 = wm0010->pll_clkctrl1; in wm0010_boot()
649 ret = -ENOMEM; in wm0010_boot()
659 /* We need to re-order for 0010 */ in wm0010_boot()
668 t.speed_hz = wm0010->sysclk / 6; in wm0010_boot()
673 dev_err(component->dev, "First PLL write failed: %d\n", ret); in wm0010_boot()
680 dev_err(component->dev, "Second PLL write failed: %d\n", ret); in wm0010_boot()
689 dev_dbg(component->dev, "PLL packet received\n"); in wm0010_boot()
690 wm0010->pll_running = true; in wm0010_boot()
699 dev_dbg(component->dev, "Not enabling DSP PLL."); in wm0010_boot()
706 spin_lock_irqsave(&wm0010->irq_lock, flags); in wm0010_boot()
707 wm0010->state = WM0010_FIRMWARE; in wm0010_boot()
708 spin_unlock_irqrestore(&wm0010->irq_lock, flags); in wm0010_boot()
710 mutex_unlock(&wm0010->lock); in wm0010_boot()
721 mutex_unlock(&wm0010->lock); in wm0010_boot()
725 mutex_unlock(&wm0010->lock); in wm0010_boot()
726 regulator_bulk_disable(ARRAY_SIZE(wm0010->core_supplies), in wm0010_boot()
727 wm0010->core_supplies); in wm0010_boot()
746 mutex_lock(&wm0010->lock); in wm0010_set_bias_level()
748 mutex_unlock(&wm0010->lock); in wm0010_set_bias_level()
764 wm0010->sysclk = freq; in wm0010_set_sysclk()
766 if (freq < pll_clock_map[ARRAY_SIZE(pll_clock_map)-1].max_sysclk) { in wm0010_set_sysclk()
767 wm0010->max_spi_freq = 0; in wm0010_set_sysclk()
771 wm0010->max_spi_freq = pll_clock_map[i].max_pll_spi_speed; in wm0010_set_sysclk()
772 wm0010->pll_clkctrl1 = pll_clock_map[i].pll_clkctrl1; in wm0010_set_sysclk()
801 .name = "wm0010-sdi1",
818 .name = "wm0010-sdi2",
840 switch (wm0010->state) { in wm0010_irq()
844 spin_lock(&wm0010->irq_lock); in wm0010_irq()
845 complete(&wm0010->boot_completion); in wm0010_irq()
846 spin_unlock(&wm0010->irq_lock); in wm0010_irq()
859 wm0010->component = component; in wm0010_probe()
872 wm0010 = devm_kzalloc(&spi->dev, sizeof(*wm0010), in wm0010_spi_probe()
875 return -ENOMEM; in wm0010_spi_probe()
877 mutex_init(&wm0010->lock); in wm0010_spi_probe()
878 spin_lock_init(&wm0010->irq_lock); in wm0010_spi_probe()
881 wm0010->dev = &spi->dev; in wm0010_spi_probe()
883 if (dev_get_platdata(&spi->dev)) in wm0010_spi_probe()
884 memcpy(&wm0010->pdata, dev_get_platdata(&spi->dev), in wm0010_spi_probe()
885 sizeof(wm0010->pdata)); in wm0010_spi_probe()
887 init_completion(&wm0010->boot_completion); in wm0010_spi_probe()
889 wm0010->core_supplies[0].supply = "AVDD"; in wm0010_spi_probe()
890 wm0010->core_supplies[1].supply = "DCVDD"; in wm0010_spi_probe()
891 ret = devm_regulator_bulk_get(wm0010->dev, ARRAY_SIZE(wm0010->core_supplies), in wm0010_spi_probe()
892 wm0010->core_supplies); in wm0010_spi_probe()
894 dev_err(wm0010->dev, "Failed to obtain core supplies: %d\n", in wm0010_spi_probe()
899 wm0010->dbvdd = devm_regulator_get(wm0010->dev, "DBVDD"); in wm0010_spi_probe()
900 if (IS_ERR(wm0010->dbvdd)) { in wm0010_spi_probe()
901 ret = PTR_ERR(wm0010->dbvdd); in wm0010_spi_probe()
902 dev_err(wm0010->dev, "Failed to obtain DBVDD: %d\n", ret); in wm0010_spi_probe()
906 if (wm0010->pdata.gpio_reset) { in wm0010_spi_probe()
907 wm0010->gpio_reset = wm0010->pdata.gpio_reset; in wm0010_spi_probe()
909 if (wm0010->pdata.reset_active_high) in wm0010_spi_probe()
910 wm0010->gpio_reset_value = 1; in wm0010_spi_probe()
912 wm0010->gpio_reset_value = 0; in wm0010_spi_probe()
914 if (wm0010->gpio_reset_value) in wm0010_spi_probe()
919 ret = devm_gpio_request_one(wm0010->dev, wm0010->gpio_reset, in wm0010_spi_probe()
922 dev_err(wm0010->dev, in wm0010_spi_probe()
928 dev_err(wm0010->dev, "No reset GPIO configured\n"); in wm0010_spi_probe()
929 return -EINVAL; in wm0010_spi_probe()
932 wm0010->state = WM0010_POWER_OFF; in wm0010_spi_probe()
934 irq = spi->irq; in wm0010_spi_probe()
935 if (wm0010->pdata.irq_flags) in wm0010_spi_probe()
936 trigger = wm0010->pdata.irq_flags; in wm0010_spi_probe()
944 dev_err(wm0010->dev, "Failed to request IRQ %d: %d\n", in wm0010_spi_probe()
948 wm0010->irq = irq; in wm0010_spi_probe()
952 dev_err(wm0010->dev, "Failed to set IRQ %d as wake source: %d\n", in wm0010_spi_probe()
957 if (spi->max_speed_hz) in wm0010_spi_probe()
958 wm0010->board_max_spi_speed = spi->max_speed_hz; in wm0010_spi_probe()
960 wm0010->board_max_spi_speed = 0; in wm0010_spi_probe()
962 ret = devm_snd_soc_register_component(&spi->dev, in wm0010_spi_probe()
975 gpio_set_value_cansleep(wm0010->gpio_reset, in wm0010_spi_remove()
976 wm0010->gpio_reset_value); in wm0010_spi_remove()
978 irq_set_irq_wake(wm0010->irq, 0); in wm0010_spi_remove()
980 if (wm0010->irq) in wm0010_spi_remove()
981 free_irq(wm0010->irq, wm0010); in wm0010_spi_remove()