Lines Matching refs:SOC_SINGLE_S8_TLV
3977 SOC_SINGLE_S8_TLV("RX0 Digital Volume", WCD934X_CDC_RX0_RX_VOL_CTL,
3979 SOC_SINGLE_S8_TLV("RX1 Digital Volume", WCD934X_CDC_RX1_RX_VOL_CTL,
3981 SOC_SINGLE_S8_TLV("RX2 Digital Volume", WCD934X_CDC_RX2_RX_VOL_CTL,
3983 SOC_SINGLE_S8_TLV("RX3 Digital Volume", WCD934X_CDC_RX3_RX_VOL_CTL,
3985 SOC_SINGLE_S8_TLV("RX4 Digital Volume", WCD934X_CDC_RX4_RX_VOL_CTL,
3987 SOC_SINGLE_S8_TLV("RX7 Digital Volume", WCD934X_CDC_RX7_RX_VOL_CTL,
3989 SOC_SINGLE_S8_TLV("RX8 Digital Volume", WCD934X_CDC_RX8_RX_VOL_CTL,
3991 SOC_SINGLE_S8_TLV("RX0 Mix Digital Volume",
3994 SOC_SINGLE_S8_TLV("RX1 Mix Digital Volume",
3997 SOC_SINGLE_S8_TLV("RX2 Mix Digital Volume",
4000 SOC_SINGLE_S8_TLV("RX3 Mix Digital Volume",
4003 SOC_SINGLE_S8_TLV("RX4 Mix Digital Volume",
4006 SOC_SINGLE_S8_TLV("RX7 Mix Digital Volume",
4009 SOC_SINGLE_S8_TLV("RX8 Mix Digital Volume",
4013 SOC_SINGLE_S8_TLV("DEC0 Volume", WCD934X_CDC_TX0_TX_VOL_CTL,
4015 SOC_SINGLE_S8_TLV("DEC1 Volume", WCD934X_CDC_TX1_TX_VOL_CTL,
4017 SOC_SINGLE_S8_TLV("DEC2 Volume", WCD934X_CDC_TX2_TX_VOL_CTL,
4019 SOC_SINGLE_S8_TLV("DEC3 Volume", WCD934X_CDC_TX3_TX_VOL_CTL,
4021 SOC_SINGLE_S8_TLV("DEC4 Volume", WCD934X_CDC_TX4_TX_VOL_CTL,
4023 SOC_SINGLE_S8_TLV("DEC5 Volume", WCD934X_CDC_TX5_TX_VOL_CTL,
4025 SOC_SINGLE_S8_TLV("DEC6 Volume", WCD934X_CDC_TX6_TX_VOL_CTL,
4027 SOC_SINGLE_S8_TLV("DEC7 Volume", WCD934X_CDC_TX7_TX_VOL_CTL,
4029 SOC_SINGLE_S8_TLV("DEC8 Volume", WCD934X_CDC_TX8_TX_VOL_CTL,
4032 SOC_SINGLE_S8_TLV("IIR0 INP0 Volume",
4035 SOC_SINGLE_S8_TLV("IIR0 INP1 Volume",
4038 SOC_SINGLE_S8_TLV("IIR0 INP2 Volume",
4041 SOC_SINGLE_S8_TLV("IIR0 INP3 Volume",
4044 SOC_SINGLE_S8_TLV("IIR1 INP0 Volume",
4047 SOC_SINGLE_S8_TLV("IIR1 INP1 Volume",
4050 SOC_SINGLE_S8_TLV("IIR1 INP2 Volume",
4053 SOC_SINGLE_S8_TLV("IIR1 INP3 Volume",