Lines Matching +full:left +full:- +full:right
1 // SPDX-License-Identifier: GPL-2.0-only
16 * ---------------------------------------
17 * MONO_LOUT -> N/A | MONO_LOUT -> N/A
18 * | IN1L -> LINE1L
19 * | IN1R -> LINE1R
20 * | IN2L -> LINE2L
21 * | IN2R -> LINE2R
22 * | MIC3L/R -> N/A
25 * ---------------------------------------
88 /* Output Common-Mode Voltage */
158 (struct soc_mixer_control *)kcontrol->private_value; in snd_soc_dapm_put_volsw_aic3x()
159 unsigned int reg = mc->reg; in snd_soc_dapm_put_volsw_aic3x()
160 unsigned int shift = mc->shift; in snd_soc_dapm_put_volsw_aic3x()
161 int max = mc->max; in snd_soc_dapm_put_volsw_aic3x()
162 unsigned int mask = (1 << fls(max)) - 1; in snd_soc_dapm_put_volsw_aic3x()
163 unsigned int invert = mc->invert; in snd_soc_dapm_put_volsw_aic3x()
168 val = (ucontrol->value.integer.value[0] & mask); in snd_soc_dapm_put_volsw_aic3x()
177 val = mask - val; in snd_soc_dapm_put_volsw_aic3x()
208 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); in mic_bias_event()
216 aic3x->micbias_vg << MICBIAS_LEVEL_SHIFT); in mic_bias_event()
238 "differential of HPLOUT", "constant VCM", "single-ended" };
243 "differential of HPROUT", "constant VCM", "single-ended",
249 "single-ended", "differential" };
269 "-5.5dB", "-8dB", "-10dB", "-12dB",
270 "-14dB", "-17dB", "-20dB", "-24dB" };
301 * DAC digital volumes. From -63.5 to 0 dB in 0.5 dB steps
303 static DECLARE_TLV_DB_SCALE(dac_tlv, -6350, 50, 0);
307 * Output stage volumes. From -78.3 to 0 dB. Muted below -78.3 dB.
310 * Define dB scale so that it is mostly correct for range about -55 to 0 dB
312 * so much). This setting shows -50 dB (actual is -50.3 dB) for register
313 * value 100 and -58.5 dB (actual is -78.3 dB) for register value 117.
315 static DECLARE_TLV_DB_SCALE(output_stage_tlv, -5900, 50, 1);
327 * only for swapped L-to-R and R-to-L routes. See below stereo controls
328 * for direct L-to-L and R-to-R routes.
330 SOC_SINGLE_TLV("Left Line Mixer PGAR Bypass Volume",
332 SOC_SINGLE_TLV("Left Line Mixer DACR1 Playback Volume",
335 SOC_SINGLE_TLV("Right Line Mixer PGAL Bypass Volume",
337 SOC_SINGLE_TLV("Right Line Mixer DACL1 Playback Volume",
340 SOC_SINGLE_TLV("Left HP Mixer PGAR Bypass Volume",
342 SOC_SINGLE_TLV("Left HP Mixer DACR1 Playback Volume",
345 SOC_SINGLE_TLV("Right HP Mixer PGAL Bypass Volume",
347 SOC_SINGLE_TLV("Right HP Mixer DACL1 Playback Volume",
350 SOC_SINGLE_TLV("Left HPCOM Mixer PGAR Bypass Volume",
352 SOC_SINGLE_TLV("Left HPCOM Mixer DACR1 Playback Volume",
355 SOC_SINGLE_TLV("Right HPCOM Mixer PGAL Bypass Volume",
357 SOC_SINGLE_TLV("Right HPCOM Mixer DACL1 Playback Volume",
360 /* Stereo output controls for direct L-to-L and R-to-R routes */
401 SOC_ENUM("Left AGC Target level", aic3x_lagc_level_enum),
402 SOC_ENUM("Right AGC Target level", aic3x_ragc_level_enum),
403 SOC_ENUM("Left AGC Attack time", aic3x_lagc_attack_enum),
404 SOC_ENUM("Right AGC Attack time", aic3x_ragc_attack_enum),
405 SOC_ENUM("Left AGC Decay time", aic3x_lagc_decay_enum),
406 SOC_ENUM("Right AGC Decay time", aic3x_ragc_decay_enum),
408 /* De-emphasis */
409 SOC_DOUBLE("De-emphasis Switch", AIC3X_CODEC_DFILT_CTRL, 2, 0, 0x01, 0),
416 SOC_ENUM("ADC HPF Cut-off", aic3x_adc_hpf_enum),
419 SOC_ENUM("Output Driver Power-On time", aic3x_poweron_time_enum),
420 SOC_ENUM("Output Driver Ramp-up step", aic3x_rampup_step_enum),
427 * only for swapped L-to-R and R-to-L routes. See below stereo controls
428 * for direct L-to-L and R-to-R routes.
430 SOC_SINGLE_TLV("Left Line Mixer Line2R Bypass Volume",
433 SOC_SINGLE_TLV("Right Line Mixer Line2L Bypass Volume",
436 SOC_SINGLE_TLV("Left HP Mixer Line2R Bypass Volume",
439 SOC_SINGLE_TLV("Right HP Mixer Line2L Bypass Volume",
442 SOC_SINGLE_TLV("Left HPCOM Mixer Line2R Bypass Volume",
445 SOC_SINGLE_TLV("Right HPCOM Mixer Line2L Bypass Volume",
448 /* Stereo output controls for direct L-to-L and R-to-R routes */
480 * Class-D amplifier gain. From 0 to 18 dB in 6 dB steps
485 SOC_DOUBLE_TLV("Class-D Playback Volume", CLASSD_CTRL, 6, 4, 3, 0, classd_amp_tlv);
487 /* Left DAC Mux */
491 /* Right DAC Mux */
495 /* Left HPCOM Mux */
499 /* Right HPCOM Mux */
503 /* Left Line Mixer */
514 /* Right Line Mixer */
535 /* Left HP Mixer */
546 /* Right HP Mixer */
557 /* Left HPCOM Mixer */
568 /* Right HPCOM Mixer */
579 /* Left PGA Mixer */
588 /* Right PGA Mixer */
597 /* Left PGA Mixer for tlv320aic3104 */
605 /* Right PGA Mixer for tlv320aic3104 */
613 /* Left Line1 Mux */
619 /* Right Line1 Mux */
625 /* Left Line2 Mux */
629 /* Right Line2 Mux */
634 /* Left DAC to Left Outputs */
635 SND_SOC_DAPM_DAC("Left DAC", "Left Playback", DAC_PWR, 7, 0),
636 SND_SOC_DAPM_MUX("Left DAC Mux", SND_SOC_NOPM, 0, 0,
638 SND_SOC_DAPM_MUX("Left HPCOM Mux", SND_SOC_NOPM, 0, 0,
640 SND_SOC_DAPM_PGA("Left Line Out", LLOPM_CTRL, 0, 0, NULL, 0),
641 SND_SOC_DAPM_PGA("Left HP Out", HPLOUT_CTRL, 0, 0, NULL, 0),
642 SND_SOC_DAPM_PGA("Left HP Com", HPLCOM_CTRL, 0, 0, NULL, 0),
644 /* Right DAC to Right Outputs */
645 SND_SOC_DAPM_DAC("Right DAC", "Right Playback", DAC_PWR, 6, 0),
646 SND_SOC_DAPM_MUX("Right DAC Mux", SND_SOC_NOPM, 0, 0,
648 SND_SOC_DAPM_MUX("Right HPCOM Mux", SND_SOC_NOPM, 0, 0,
650 SND_SOC_DAPM_PGA("Right Line Out", RLOPM_CTRL, 0, 0, NULL, 0),
651 SND_SOC_DAPM_PGA("Right HP Out", HPROUT_CTRL, 0, 0, NULL, 0),
652 SND_SOC_DAPM_PGA("Right HP Com", HPRCOM_CTRL, 0, 0, NULL, 0),
654 /* Inputs to Left ADC */
655 SND_SOC_DAPM_ADC("Left ADC", "Left Capture", LINE1L_2_LADC_CTRL, 2, 0),
656 SND_SOC_DAPM_MUX("Left Line1L Mux", SND_SOC_NOPM, 0, 0,
658 SND_SOC_DAPM_MUX("Left Line1R Mux", SND_SOC_NOPM, 0, 0,
661 /* Inputs to Right ADC */
662 SND_SOC_DAPM_ADC("Right ADC", "Right Capture",
664 SND_SOC_DAPM_MUX("Right Line1L Mux", SND_SOC_NOPM, 0, 0,
666 SND_SOC_DAPM_MUX("Right Line1R Mux", SND_SOC_NOPM, 0, 0,
695 /* Inputs to Left ADC */
696 SND_SOC_DAPM_MIXER("Left PGA Mixer", SND_SOC_NOPM, 0, 0,
699 SND_SOC_DAPM_MUX("Left Line2L Mux", SND_SOC_NOPM, 0, 0,
702 /* Inputs to Right ADC */
703 SND_SOC_DAPM_MIXER("Right PGA Mixer", SND_SOC_NOPM, 0, 0,
706 SND_SOC_DAPM_MUX("Right Line2R Mux", SND_SOC_NOPM, 0, 0,
731 SND_SOC_DAPM_MIXER("Left Line Mixer", SND_SOC_NOPM, 0, 0,
734 SND_SOC_DAPM_MIXER("Right Line Mixer", SND_SOC_NOPM, 0, 0,
737 SND_SOC_DAPM_MIXER("Left HP Mixer", SND_SOC_NOPM, 0, 0,
740 SND_SOC_DAPM_MIXER("Right HP Mixer", SND_SOC_NOPM, 0, 0,
743 SND_SOC_DAPM_MIXER("Left HPCOM Mixer", SND_SOC_NOPM, 0, 0,
746 SND_SOC_DAPM_MIXER("Right HPCOM Mixer", SND_SOC_NOPM, 0, 0,
758 /* Inputs to Left ADC */
759 SND_SOC_DAPM_MIXER("Left PGA Mixer", SND_SOC_NOPM, 0, 0,
763 /* Inputs to Right ADC */
764 SND_SOC_DAPM_MIXER("Right PGA Mixer", SND_SOC_NOPM, 0, 0,
769 SND_SOC_DAPM_MIXER("Left Line Mixer", SND_SOC_NOPM, 0, 0,
771 ARRAY_SIZE(aic3x_left_line_mixer_controls) - 2),
772 SND_SOC_DAPM_MIXER("Right Line Mixer", SND_SOC_NOPM, 0, 0,
774 ARRAY_SIZE(aic3x_right_line_mixer_controls) - 2),
775 SND_SOC_DAPM_MIXER("Left HP Mixer", SND_SOC_NOPM, 0, 0,
777 ARRAY_SIZE(aic3x_left_hp_mixer_controls) - 2),
778 SND_SOC_DAPM_MIXER("Right HP Mixer", SND_SOC_NOPM, 0, 0,
780 ARRAY_SIZE(aic3x_right_hp_mixer_controls) - 2),
781 SND_SOC_DAPM_MIXER("Left HPCOM Mixer", SND_SOC_NOPM, 0, 0,
783 ARRAY_SIZE(aic3x_left_hpcom_mixer_controls) - 2),
784 SND_SOC_DAPM_MIXER("Right HPCOM Mixer", SND_SOC_NOPM, 0, 0,
786 ARRAY_SIZE(aic3x_right_hpcom_mixer_controls) - 2),
804 /* Class-D outputs */
805 SND_SOC_DAPM_PGA("Left Class-D Out", CLASSD_CTRL, 3, 0, NULL, 0),
806 SND_SOC_DAPM_PGA("Right Class-D Out", CLASSD_CTRL, 2, 0, NULL, 0),
813 /* Left Input */
814 {"Left Line1L Mux", "single-ended", "LINE1L"},
815 {"Left Line1L Mux", "differential", "LINE1L"},
816 {"Left Line1R Mux", "single-ended", "LINE1R"},
817 {"Left Line1R Mux", "differential", "LINE1R"},
819 {"Left PGA Mixer", "Line1L Switch", "Left Line1L Mux"},
820 {"Left PGA Mixer", "Line1R Switch", "Left Line1R Mux"},
822 {"Left ADC", NULL, "Left PGA Mixer"},
824 /* Right Input */
825 {"Right Line1R Mux", "single-ended", "LINE1R"},
826 {"Right Line1R Mux", "differential", "LINE1R"},
827 {"Right Line1L Mux", "single-ended", "LINE1L"},
828 {"Right Line1L Mux", "differential", "LINE1L"},
830 {"Right PGA Mixer", "Line1L Switch", "Right Line1L Mux"},
831 {"Right PGA Mixer", "Line1R Switch", "Right Line1R Mux"},
833 {"Right ADC", NULL, "Right PGA Mixer"},
835 /* Left DAC Output */
836 {"Left DAC Mux", "DAC_L1", "Left DAC"},
837 {"Left DAC Mux", "DAC_L2", "Left DAC"},
838 {"Left DAC Mux", "DAC_L3", "Left DAC"},
840 /* Right DAC Output */
841 {"Right DAC Mux", "DAC_R1", "Right DAC"},
842 {"Right DAC Mux", "DAC_R2", "Right DAC"},
843 {"Right DAC Mux", "DAC_R3", "Right DAC"},
845 /* Left Line Output */
846 {"Left Line Mixer", "PGAL Bypass Switch", "Left PGA Mixer"},
847 {"Left Line Mixer", "DACL1 Switch", "Left DAC Mux"},
848 {"Left Line Mixer", "PGAR Bypass Switch", "Right PGA Mixer"},
849 {"Left Line Mixer", "DACR1 Switch", "Right DAC Mux"},
851 {"Left Line Out", NULL, "Left Line Mixer"},
852 {"Left Line Out", NULL, "Left DAC Mux"},
853 {"LLOUT", NULL, "Left Line Out"},
855 /* Right Line Output */
856 {"Right Line Mixer", "PGAL Bypass Switch", "Left PGA Mixer"},
857 {"Right Line Mixer", "DACL1 Switch", "Left DAC Mux"},
858 {"Right Line Mixer", "PGAR Bypass Switch", "Right PGA Mixer"},
859 {"Right Line Mixer", "DACR1 Switch", "Right DAC Mux"},
861 {"Right Line Out", NULL, "Right Line Mixer"},
862 {"Right Line Out", NULL, "Right DAC Mux"},
863 {"RLOUT", NULL, "Right Line Out"},
865 /* Left HP Output */
866 {"Left HP Mixer", "PGAL Bypass Switch", "Left PGA Mixer"},
867 {"Left HP Mixer", "DACL1 Switch", "Left DAC Mux"},
868 {"Left HP Mixer", "PGAR Bypass Switch", "Right PGA Mixer"},
869 {"Left HP Mixer", "DACR1 Switch", "Right DAC Mux"},
871 {"Left HP Out", NULL, "Left HP Mixer"},
872 {"Left HP Out", NULL, "Left DAC Mux"},
873 {"HPLOUT", NULL, "Left HP Out"},
875 /* Right HP Output */
876 {"Right HP Mixer", "PGAL Bypass Switch", "Left PGA Mixer"},
877 {"Right HP Mixer", "DACL1 Switch", "Left DAC Mux"},
878 {"Right HP Mixer", "PGAR Bypass Switch", "Right PGA Mixer"},
879 {"Right HP Mixer", "DACR1 Switch", "Right DAC Mux"},
881 {"Right HP Out", NULL, "Right HP Mixer"},
882 {"Right HP Out", NULL, "Right DAC Mux"},
883 {"HPROUT", NULL, "Right HP Out"},
885 /* Left HPCOM Output */
886 {"Left HPCOM Mixer", "PGAL Bypass Switch", "Left PGA Mixer"},
887 {"Left HPCOM Mixer", "DACL1 Switch", "Left DAC Mux"},
888 {"Left HPCOM Mixer", "PGAR Bypass Switch", "Right PGA Mixer"},
889 {"Left HPCOM Mixer", "DACR1 Switch", "Right DAC Mux"},
891 {"Left HPCOM Mux", "differential of HPLOUT", "Left HP Mixer"},
892 {"Left HPCOM Mux", "constant VCM", "Left HPCOM Mixer"},
893 {"Left HPCOM Mux", "single-ended", "Left HPCOM Mixer"},
894 {"Left HP Com", NULL, "Left HPCOM Mux"},
895 {"HPLCOM", NULL, "Left HP Com"},
897 /* Right HPCOM Output */
898 {"Right HPCOM Mixer", "PGAL Bypass Switch", "Left PGA Mixer"},
899 {"Right HPCOM Mixer", "DACL1 Switch", "Left DAC Mux"},
900 {"Right HPCOM Mixer", "PGAR Bypass Switch", "Right PGA Mixer"},
901 {"Right HPCOM Mixer", "DACR1 Switch", "Right DAC Mux"},
903 {"Right HPCOM Mux", "differential of HPROUT", "Right HP Mixer"},
904 {"Right HPCOM Mux", "constant VCM", "Right HPCOM Mixer"},
905 {"Right HPCOM Mux", "single-ended", "Right HPCOM Mixer"},
906 {"Right HPCOM Mux", "differential of HPLCOM", "Left HPCOM Mixer"},
907 {"Right HPCOM Mux", "external feedback", "Right HPCOM Mixer"},
908 {"Right HP Com", NULL, "Right HPCOM Mux"},
909 {"HPRCOM", NULL, "Right HP Com"},
914 /* Left Input */
915 {"Left Line2L Mux", "single-ended", "LINE2L"},
916 {"Left Line2L Mux", "differential", "LINE2L"},
918 {"Left PGA Mixer", "Line2L Switch", "Left Line2L Mux"},
919 {"Left PGA Mixer", "Mic3L Switch", "MIC3L"},
920 {"Left PGA Mixer", "Mic3R Switch", "MIC3R"},
922 {"Left ADC", NULL, "GPIO1 dmic modclk"},
924 /* Right Input */
925 {"Right Line2R Mux", "single-ended", "LINE2R"},
926 {"Right Line2R Mux", "differential", "LINE2R"},
928 {"Right PGA Mixer", "Line2R Switch", "Right Line2R Mux"},
929 {"Right PGA Mixer", "Mic3L Switch", "MIC3L"},
930 {"Right PGA Mixer", "Mic3R Switch", "MIC3R"},
932 {"Right ADC", NULL, "GPIO1 dmic modclk"},
942 /* Left Line Output */
943 {"Left Line Mixer", "Line2L Bypass Switch", "Left Line2L Mux"},
944 {"Left Line Mixer", "Line2R Bypass Switch", "Right Line2R Mux"},
946 /* Right Line Output */
947 {"Right Line Mixer", "Line2L Bypass Switch", "Left Line2L Mux"},
948 {"Right Line Mixer", "Line2R Bypass Switch", "Right Line2R Mux"},
950 /* Left HP Output */
951 {"Left HP Mixer", "Line2L Bypass Switch", "Left Line2L Mux"},
952 {"Left HP Mixer", "Line2R Bypass Switch", "Right Line2R Mux"},
954 /* Right HP Output */
955 {"Right HP Mixer", "Line2L Bypass Switch", "Left Line2L Mux"},
956 {"Right HP Mixer", "Line2R Bypass Switch", "Right Line2R Mux"},
958 /* Left HPCOM Output */
959 {"Left HPCOM Mixer", "Line2L Bypass Switch", "Left Line2L Mux"},
960 {"Left HPCOM Mixer", "Line2R Bypass Switch", "Right Line2R Mux"},
962 /* Right HPCOM Output */
963 {"Right HPCOM Mixer", "Line2L Bypass Switch", "Left Line2L Mux"},
964 {"Right HPCOM Mixer", "Line2R Bypass Switch", "Right Line2R Mux"},
969 /* Left Input */
970 {"Left PGA Mixer", "Mic2L Switch", "MIC2L"},
971 {"Left PGA Mixer", "Mic2R Switch", "MIC2R"},
973 /* Right Input */
974 {"Right PGA Mixer", "Mic2L Switch", "MIC2L"},
975 {"Right PGA Mixer", "Mic2R Switch", "MIC2R"},
980 {"Mono Mixer", "Line2L Bypass Switch", "Left Line2L Mux"},
981 {"Mono Mixer", "PGAL Bypass Switch", "Left PGA Mixer"},
982 {"Mono Mixer", "DACL1 Switch", "Left DAC Mux"},
983 {"Mono Mixer", "Line2R Bypass Switch", "Right Line2R Mux"},
984 {"Mono Mixer", "PGAR Bypass Switch", "Right PGA Mixer"},
985 {"Mono Mixer", "DACR1 Switch", "Right DAC Mux"},
991 /* Class-D outputs */
992 {"Left Class-D Out", NULL, "Left Line Out"},
993 {"Right Class-D Out", NULL, "Left Line Out"},
994 {"SPOP", NULL, "Left Class-D Out"},
995 {"SPOM", NULL, "Right Class-D Out"},
1003 switch (aic3x->model) { in aic3x_add_widgets()
1041 struct snd_soc_component *component = dai->component; in aic3x_hw_params()
1047 int width = aic3x->slot_width; in aic3x_hw_params()
1075 if (aic3x->sysclk / (128 * pll_q) == fsref) { in aic3x_hw_params()
1094 /* Route Left DAC to left channel input and in aic3x_hw_params()
1095 * right DAC to right channel input */ in aic3x_hw_params()
1107 data -= 2; in aic3x_hw_params()
1120 codec_clk = (2048 * fsref) / (aic3x->sysclk / 1000); in aic3x_hw_params()
1134 if (abs(codec_clk - tmp_clk) < in aic3x_hw_params()
1135 abs(codec_clk - last_clk)) { in aic3x_hw_params()
1155 d = ((2048 * p * fsref) - j * aic3x->sysclk) in aic3x_hw_params()
1156 * 100 / (aic3x->sysclk/100); in aic3x_hw_params()
1162 if (abs(codec_clk - clk) < abs(codec_clk - last_clk)) { in aic3x_hw_params()
1174 return -EINVAL; in aic3x_hw_params()
1193 struct snd_soc_component *component = dai->component; in aic3x_prepare()
1196 int width = aic3x->slot_width; in aic3x_prepare()
1199 width = substream->runtime->sample_bits; in aic3x_prepare()
1202 if (aic3x->dai_fmt == SND_SOC_DAIFMT_DSP_A) in aic3x_prepare()
1203 delay += (aic3x->tdm_delay*width + 1); in aic3x_prepare()
1204 else if (aic3x->dai_fmt == SND_SOC_DAIFMT_DSP_B) in aic3x_prepare()
1205 delay += aic3x->tdm_delay*width; in aic3x_prepare()
1215 struct snd_soc_component *component = dai->component; in aic3x_mute()
1233 struct snd_soc_component *component = codec_dai->component; in aic3x_set_dai_sysclk()
1242 aic3x->sysclk = freq; in aic3x_set_dai_sysclk()
1249 struct snd_soc_component *component = codec_dai->component; in aic3x_set_dai_fmt()
1258 aic3x->master = 1; in aic3x_set_dai_fmt()
1262 aic3x->master = 0; in aic3x_set_dai_fmt()
1266 aic3x->master = 1; in aic3x_set_dai_fmt()
1271 aic3x->master = 1; in aic3x_set_dai_fmt()
1276 return -EINVAL; in aic3x_set_dai_fmt()
1298 return -EINVAL; in aic3x_set_dai_fmt()
1301 aic3x->dai_fmt = fmt & SND_SOC_DAIFMT_FORMAT_MASK; in aic3x_set_dai_fmt()
1314 struct snd_soc_component *component = codec_dai->component; in aic3x_set_dai_tdm_slot()
1319 dev_err(component->dev, "tx and rx masks must be symmetric\n"); in aic3x_set_dai_tdm_slot()
1320 return -EINVAL; in aic3x_set_dai_tdm_slot()
1324 dev_err(component->dev, "tx and rx masks need to be non 0\n"); in aic3x_set_dai_tdm_slot()
1325 return -EINVAL; in aic3x_set_dai_tdm_slot()
1331 dev_err(component->dev, "Invalid mask, slots must be adjacent\n"); in aic3x_set_dai_tdm_slot()
1332 return -EINVAL; in aic3x_set_dai_tdm_slot()
1342 dev_err(component->dev, "Unsupported slot width %d\n", slot_width); in aic3x_set_dai_tdm_slot()
1343 return -EINVAL; in aic3x_set_dai_tdm_slot()
1347 aic3x->tdm_delay = lsb; in aic3x_set_dai_tdm_slot()
1348 aic3x->slot_width = slot_width; in aic3x_set_dai_tdm_slot()
1350 /* DOUT in high-impedance on inactive bit clocks */ in aic3x_set_dai_tdm_slot()
1362 struct aic3x_priv *aic3x = disable_nb->aic3x; in aic3x_regulator_event()
1369 if (gpio_is_valid(aic3x->gpio_reset)) in aic3x_regulator_event()
1370 gpio_set_value(aic3x->gpio_reset, 0); in aic3x_regulator_event()
1371 regcache_mark_dirty(aic3x->regmap); in aic3x_regulator_event()
1384 ret = regulator_bulk_enable(ARRAY_SIZE(aic3x->supplies), in aic3x_set_power()
1385 aic3x->supplies); in aic3x_set_power()
1388 aic3x->power = 1; in aic3x_set_power()
1390 if (gpio_is_valid(aic3x->gpio_reset)) { in aic3x_set_power()
1392 gpio_set_value(aic3x->gpio_reset, 1); in aic3x_set_power()
1396 regcache_cache_only(aic3x->regmap, false); in aic3x_set_power()
1397 regcache_sync(aic3x->regmap); in aic3x_set_power()
1412 * Delay is needed to reduce pop-noise after syncing back the in aic3x_set_power()
1423 regcache_mark_dirty(aic3x->regmap); in aic3x_set_power()
1424 aic3x->power = 0; in aic3x_set_power()
1426 regcache_cache_only(aic3x->regmap, true); in aic3x_set_power()
1427 ret = regulator_bulk_disable(ARRAY_SIZE(aic3x->supplies), in aic3x_set_power()
1428 aic3x->supplies); in aic3x_set_power()
1444 aic3x->master) { in aic3x_set_bias_level()
1451 if (!aic3x->power) in aic3x_set_bias_level()
1454 aic3x->master) { in aic3x_set_bias_level()
1461 if (aic3x->power) in aic3x_set_bias_level()
1485 .name = "tlv320aic3x-hifi",
1569 if (aic3x->model != AIC3X_MODEL_3104) { in aic3x_init()
1580 switch (aic3x->model) { in aic3x_init()
1591 /* Output common-mode voltage = 1.5 V */ in aic3x_init()
1593 aic3x->ocmv << HPOUT_SC_OCMV_SHIFT); in aic3x_init()
1603 if (gpio_is_valid(aic3x->gpio_reset) && in aic3x_is_shared_reset()
1604 aic3x->gpio_reset == a->gpio_reset) in aic3x_is_shared_reset()
1616 aic3x->component = component; in aic3x_component_probe()
1618 for (i = 0; i < ARRAY_SIZE(aic3x->supplies); i++) { in aic3x_component_probe()
1619 aic3x->disable_nb[i].nb.notifier_call = aic3x_regulator_event; in aic3x_component_probe()
1620 aic3x->disable_nb[i].aic3x = aic3x; in aic3x_component_probe()
1622 aic3x->supplies[i].consumer, in aic3x_component_probe()
1623 &aic3x->disable_nb[i].nb); in aic3x_component_probe()
1625 dev_err(component->dev, in aic3x_component_probe()
1632 regcache_mark_dirty(aic3x->regmap); in aic3x_component_probe()
1635 if (aic3x->setup) { in aic3x_component_probe()
1636 if (aic3x->model != AIC3X_MODEL_3104) { in aic3x_component_probe()
1639 (aic3x->setup->gpio_func[0] & 0xf) << 4); in aic3x_component_probe()
1641 (aic3x->setup->gpio_func[1] & 0xf) << 4); in aic3x_component_probe()
1643 dev_warn(component->dev, "GPIO functionality is not supported on tlv320aic3104\n"); in aic3x_component_probe()
1647 switch (aic3x->model) { in aic3x_component_probe()
1667 switch (aic3x->micbias_vg) { in aic3x_component_probe()
1673 (aic3x->micbias_vg) << MICBIAS_LEVEL_SHIFT); in aic3x_component_probe()
1704 struct device_node *np = dev->of_node; in aic3x_configure_ocmv()
1708 if (np && !of_property_read_u32(np, "ai3x-ocmv", &value)) { in aic3x_configure_ocmv()
1711 aic3x->ocmv = value; in aic3x_configure_ocmv()
1716 dvdd = regulator_get_voltage(aic3x->supplies[1].consumer); in aic3x_configure_ocmv()
1717 avdd = regulator_get_voltage(aic3x->supplies[2].consumer); in aic3x_configure_ocmv()
1724 aic3x->ocmv = HPOUT_SC_OCMV_1_8V; in aic3x_configure_ocmv()
1726 aic3x->ocmv = HPOUT_SC_OCMV_1_65V; in aic3x_configure_ocmv()
1728 aic3x->ocmv = HPOUT_SC_OCMV_1_5V; in aic3x_configure_ocmv()
1730 aic3x->ocmv = HPOUT_SC_OCMV_1_35V; in aic3x_configure_ocmv()
1740 /* Class-D speaker driver init; datasheet p. 46 */
1751 struct aic3x_pdata *pdata = dev->platform_data; in aic3x_probe()
1754 struct device_node *np = dev->of_node; in aic3x_probe()
1760 return -ENOMEM; in aic3x_probe()
1762 aic3x->regmap = regmap; in aic3x_probe()
1763 if (IS_ERR(aic3x->regmap)) { in aic3x_probe()
1764 ret = PTR_ERR(aic3x->regmap); in aic3x_probe()
1768 regcache_cache_only(aic3x->regmap, true); in aic3x_probe()
1772 aic3x->gpio_reset = pdata->gpio_reset; in aic3x_probe()
1773 aic3x->setup = pdata->setup; in aic3x_probe()
1774 aic3x->micbias_vg = pdata->micbias_vg; in aic3x_probe()
1778 return -ENOMEM; in aic3x_probe()
1780 ret = of_get_named_gpio(np, "reset-gpios", 0); in aic3x_probe()
1782 aic3x->gpio_reset = ret; in aic3x_probe()
1784 ret = of_get_named_gpio(np, "gpio-reset", 0); in aic3x_probe()
1786 dev_warn(dev, "Using deprecated property \"gpio-reset\", please update your DT"); in aic3x_probe()
1787 aic3x->gpio_reset = ret; in aic3x_probe()
1789 aic3x->gpio_reset = -1; in aic3x_probe()
1793 if (of_property_read_u32_array(np, "ai3x-gpio-func", in aic3x_probe()
1794 ai3x_setup->gpio_func, 2) >= 0) { in aic3x_probe()
1795 aic3x->setup = ai3x_setup; in aic3x_probe()
1798 if (!of_property_read_u32(np, "ai3x-micbias-vg", &value)) { in aic3x_probe()
1801 aic3x->micbias_vg = AIC3X_MICBIAS_2_0V; in aic3x_probe()
1804 aic3x->micbias_vg = AIC3X_MICBIAS_2_5V; in aic3x_probe()
1807 aic3x->micbias_vg = AIC3X_MICBIAS_AVDDV; in aic3x_probe()
1810 aic3x->micbias_vg = AIC3X_MICBIAS_OFF; in aic3x_probe()
1815 aic3x->micbias_vg = AIC3X_MICBIAS_OFF; in aic3x_probe()
1819 aic3x->gpio_reset = -1; in aic3x_probe()
1822 aic3x->model = driver_data; in aic3x_probe()
1824 if (gpio_is_valid(aic3x->gpio_reset) && in aic3x_probe()
1826 ret = gpio_request(aic3x->gpio_reset, "tlv320aic3x reset"); in aic3x_probe()
1829 gpio_direction_output(aic3x->gpio_reset, 0); in aic3x_probe()
1832 for (i = 0; i < ARRAY_SIZE(aic3x->supplies); i++) in aic3x_probe()
1833 aic3x->supplies[i].supply = aic3x_supply_names[i]; in aic3x_probe()
1835 ret = devm_regulator_bulk_get(dev, ARRAY_SIZE(aic3x->supplies), in aic3x_probe()
1836 aic3x->supplies); in aic3x_probe()
1844 if (aic3x->model == AIC3X_MODEL_3007) { in aic3x_probe()
1845 ret = regmap_register_patch(aic3x->regmap, aic3007_class_d, in aic3x_probe()
1857 INIT_LIST_HEAD(&aic3x->list); in aic3x_probe()
1858 list_add(&aic3x->list, &reset_list); in aic3x_probe()
1863 if (gpio_is_valid(aic3x->gpio_reset) && in aic3x_probe()
1865 gpio_free(aic3x->gpio_reset); in aic3x_probe()
1875 list_del(&aic3x->list); in aic3x_remove()
1877 if (gpio_is_valid(aic3x->gpio_reset) && in aic3x_remove()
1879 gpio_set_value(aic3x->gpio_reset, 0); in aic3x_remove()
1880 gpio_free(aic3x->gpio_reset); in aic3x_remove()