Lines Matching refs:RT5677_PWR_DIG1
152 {RT5677_PWR_DIG1 , 0x0000},
418 case RT5677_PWR_DIG1: in rt5677_readable_register()
2877 SND_SOC_DAPM_SUPPLY("ADC 1 power", RT5677_PWR_DIG1,
2879 SND_SOC_DAPM_SUPPLY("ADC 2 power", RT5677_PWR_DIG1,
2881 SND_SOC_DAPM_SUPPLY("ADC1 clock", RT5677_PWR_DIG1,
2883 SND_SOC_DAPM_SUPPLY("ADC2 clock", RT5677_PWR_DIG1,
3015 SND_SOC_DAPM_SUPPLY("I2S1", RT5677_PWR_DIG1,
3034 SND_SOC_DAPM_SUPPLY("I2S2", RT5677_PWR_DIG1,
3053 SND_SOC_DAPM_SUPPLY("I2S3", RT5677_PWR_DIG1,
3062 SND_SOC_DAPM_SUPPLY("I2S4", RT5677_PWR_DIG1,
3071 SND_SOC_DAPM_SUPPLY("SLB", RT5677_PWR_DIG1,
3295 SND_SOC_DAPM_DAC("DAC 1", NULL, RT5677_PWR_DIG1,
3297 SND_SOC_DAPM_DAC("DAC 2", NULL, RT5677_PWR_DIG1,
3299 SND_SOC_DAPM_DAC("DAC 3", NULL, RT5677_PWR_DIG1,
4700 regmap_write(rt5677->regmap, RT5677_PWR_DIG1, 0x0000); in rt5677_set_bias_level()