Lines Matching +full:6 +full:- +full:14
1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * rt5670.h -- RT5670 ALSA SoC audio driver
17 /* I/O - Output */
20 /* I/O - Input */
26 /* I/O - ADC/DAC/DMIC */
34 /* Mixer - D-D */
47 /* Mixer - PDM */
56 /* Mixer - ADC */
61 /* Mixer - DAC */
77 /* Format - ADC/DAC */
86 /* Format - TDM Control */
91 /* Function - Analog */
121 /* Function - Digital */
247 #define RT5670_IN_DF2 (0x1 << 6)
248 #define RT5670_IN_SFT2 6
271 #define RT5670_ST_EN (0x1 << 6)
272 #define RT5670_ST_EN_SFT 6
309 #define RT5670_STO1_ADC_L_BST_MASK (0x3 << 14)
310 #define RT5670_STO1_ADC_L_BST_SFT 14
317 #define RT5670_STO2_ADC_R_BST_MASK (0x3 << 6)
318 #define RT5670_STO2_ADC_R_BST_SFT 6
327 #define RT5670_M_ADC_L1 (0x1 << 14)
328 #define RT5670_M_ADC_L1_SFT 14
341 #define RT5670_M_ADC_R1 (0x1 << 6)
342 #define RT5670_M_ADC_R1_SFT 6
349 #define RT5670_M_MONO_ADC_L1 (0x1 << 14)
350 #define RT5670_M_MONO_ADC_L1_SFT 14
363 #define RT5670_M_MONO_ADC_R1 (0x1 << 6)
364 #define RT5670_M_MONO_ADC_R1_SFT 6
379 #define RT5670_M_DAC1_L (0x1 << 14)
380 #define RT5670_M_DAC1_L_SFT 14
395 #define RT5670_M_DAC1_R (0x1 << 6)
396 #define RT5670_M_DAC1_R_SFT 6
399 #define RT5670_M_DAC_L1 (0x1 << 14)
400 #define RT5670_M_DAC_L1_SFT 14
411 #define RT5670_M_DAC_R1 (0x1 << 6)
412 #define RT5670_M_DAC_R1_SFT 6
425 #define RT5670_M_DAC_L1_MONO_L (0x1 << 14)
426 #define RT5670_M_DAC_L1_MONO_L_SFT 14
437 #define RT5670_M_DAC_R1_MONO_R (0x1 << 6)
438 #define RT5670_M_DAC_R1_MONO_R_SFT 6
453 #define RT5670_STO_L_DAC_L_VOL_MASK (0x1 << 14)
454 #define RT5670_STO_L_DAC_L_VOL_SFT 14
469 #define RT5670_DAC_R2_DAC_L_VOL_MASK (0x1 << 6)
470 #define RT5670_DAC_R2_DAC_L_VOL_SFT 6
519 #define RT5670_M_PDM1_L (0x1 << 14)
520 #define RT5670_M_PDM1_L_SFT 14
534 #define RT5670_PDM1_BUSY (0x1 << 6)
586 #define RT5670_M_HPVOL_HM (0x1 << 14)
587 #define RT5670_M_HPVOL_HM_SFT 14
604 #define RT5670_M_DAC_L2_MA (0x1 << 14)
605 #define RT5670_M_DAC_L2_MA_SFT 14
670 #define RT5670_M_BST2_OM_R (0x1 << 6)
671 #define RT5670_M_BST2_OM_R_SFT 6
682 #define RT5670_M_DAC_R1_LM (0x1 << 14)
683 #define RT5670_M_DAC_R1_LM_SFT 14
694 #define RT5670_PWR_I2S2 (0x1 << 14)
695 #define RT5670_PWR_I2S2_BIT 14
702 #define RT5670_PWR_DAC_R2 (0x1 << 6)
703 #define RT5670_PWR_DAC_R2_BIT 6
714 #define RT5670_PWR_ADC_MF_L (0x1 << 14)
715 #define RT5670_PWR_ADC_MF_L_BIT 14
730 #define RT5670_PWR_PDM2 (0x1 << 6)
731 #define RT5670_PWR_PDM2_BIT 6
736 #define RT5670_PWR_FV1 (0x1 << 14)
737 #define RT5670_PWR_FV1_BIT 14
746 #define RT5670_PWR_HP_R (0x1 << 6)
747 #define RT5670_PWR_HP_R_BIT 6
768 #define RT5670_PWR_BST1_P (0x1 << 6)
769 #define RT5670_PWR_BST1_P_BIT 6
780 #define RT5670_PWR_OM_R (0x1 << 14)
781 #define RT5670_PWR_OM_R_BIT 14
834 #define RT5670_I2S2_SDI_MASK (0x1 << 6)
835 #define RT5670_I2S2_SDI_SFT 6
836 #define RT5670_I2S2_SDI_I2S1 (0x0 << 6)
837 #define RT5670_I2S2_SDI_I2S2 (0x1 << 6)
896 #define RT5670_DAC_L_OSR_MASK (0x3 << 14)
897 #define RT5670_DAC_L_OSR_SFT 14
898 #define RT5670_DAC_L_OSR_128 (0x0 << 14)
899 #define RT5670_DAC_L_OSR_64 (0x1 << 14)
900 #define RT5670_DAC_L_OSR_32 (0x2 << 14)
901 #define RT5670_DAC_L_OSR_16 (0x3 << 14)
918 #define RT5670_DMIC_2_EN_MASK (0x1 << 14)
919 #define RT5670_DMIC_2_EN_SFT 14
920 #define RT5670_DMIC_2_DIS (0x0 << 14)
921 #define RT5670_DMIC_2_EN (0x1 << 14)
955 #define RT5670_DMIC_3_DP_MASK (0x3 << 6)
956 #define RT5670_DMIC_3_DP_SFT 6
957 #define RT5670_DMIC_3_DP_GPIO9 (0x0 << 6)
958 #define RT5670_DMIC_3_DP_GPIO10 (0x1 << 6)
959 #define RT5670_DMIC_3_DP_GPIO5 (0x2 << 6)
962 #define RT5670_SCLK_SRC_MASK (0x3 << 14)
963 #define RT5670_SCLK_SRC_SFT 14
964 #define RT5670_SCLK_SRC_MCLK (0x0 << 14)
965 #define RT5670_SCLK_SRC_PLL1 (0x1 << 14)
966 #define RT5670_SCLK_SRC_RCCLK (0x2 << 14) /* 15MHz */
1000 #define RT5670_M1_T_MASK (0x1 << 14)
1001 #define RT5670_M1_T_SFT 14
1002 #define RT5670_M1_T_I2S2 (0x0 << 14)
1003 #define RT5670_M1_T_I2S2_D3 (0x1 << 14)
1104 #define RT5670_RSTN_MASK (0x1 << 6)
1105 #define RT5670_RSTN_SFT 6
1106 #define RT5670_RSTN_DIS (0x0 << 6)
1107 #define RT5670_RSTN_EN (0x1 << 6)
1160 #define RT5670_DIG_DP_MASK (0x1 << 6)
1161 #define RT5670_DIG_DP_SFT 6
1162 #define RT5670_DIG_DP_DIS (0x0 << 6)
1163 #define RT5670_DIG_DP_EN (0x1 << 6)
1182 #define RT5670_CP_FQ_96_KHZ 6
1199 #define RT5670_IB_HP_MASK (0x3 << 6)
1200 #define RT5670_IB_HP_SFT 6
1201 #define RT5670_IB_HP_125IL (0x0 << 6)
1202 #define RT5670_IB_HP_25IL (0x1 << 6)
1203 #define RT5670_IB_HP_5IL (0x2 << 6)
1204 #define RT5670_IB_HP_1IL (0x3 << 6)
1211 #define RT5670_SPK_AG_MASK (0x1 << 14)
1212 #define RT5670_SPK_AG_SFT 14
1213 #define RT5670_SPK_AG_DIS (0x0 << 14)
1214 #define RT5670_SPK_AG_EN (0x1 << 14)
1221 #define RT5670_MIC2_BS_MASK (0x1 << 14)
1222 #define RT5670_MIC2_BS_SFT 14
1223 #define RT5670_MIC2_BS_9AV (0x0 << 14)
1224 #define RT5670_MIC2_BS_75AV (0x1 << 14)
1246 #define RT5670_MIC2_OVTH_MASK (0x3 << 6)
1247 #define RT5670_MIC2_OVTH_SFT 6
1248 #define RT5670_MIC2_OVTH_600UA (0x0 << 6)
1249 #define RT5670_MIC2_OVTH_1500UA (0x1 << 6)
1250 #define RT5670_MIC2_OVTH_2000UA (0x2 << 6)
1275 #define RT5670_EQ_UPD (0x1 << 14)
1276 #define RT5670_EQ_UPD_BIT 14
1297 #define RT5670_EQ_HPF2_MASK (0x1 << 6)
1298 #define RT5670_EQ_HPF2_SFT 6
1299 #define RT5670_EQ_HPF2_DIS (0x0 << 6)
1300 #define RT5670_EQ_HPF2_EN (0x1 << 6)
1338 #define RT5670_DRC_AGC_MASK (0x1 << 14)
1339 #define RT5670_DRC_AGC_SFT 14
1340 #define RT5670_DRC_AGC_DIS (0x0 << 14)
1341 #define RT5670_DRC_AGC_EN (0x1 << 14)
1378 #define RT5670_DRC_AGC_NG_MASK (0x1 << 6)
1379 #define RT5670_DRC_AGC_NG_SFT 6
1380 #define RT5670_DRC_AGC_NG_DIS (0x0 << 6)
1381 #define RT5670_DRC_AGC_NG_EN (0x1 << 6)
1419 #define RT5670_JD_SPR_TRG_MASK (0x1 << 6)
1420 #define RT5670_JD_SPR_TRG_SFT 6
1421 #define RT5670_JD_SPR_TRG_LO (0x0 << 6)
1422 #define RT5670_JD_SPR_TRG_HI (0x1 << 6)
1453 #define RT5670_IRQ_OT_MASK (0x1 << 14)
1454 #define RT5670_IRQ_OT_SFT 14
1455 #define RT5670_IRQ_OT_BP (0x0 << 14)
1456 #define RT5670_IRQ_OT_NOR (0x1 << 14)
1483 #define RT5670_IRQ_MB2_OC_MASK (0x1 << 14)
1484 #define RT5670_IRQ_MB2_OC_SFT 14
1485 #define RT5670_IRQ_MB2_OC_BP (0x0 << 14)
1486 #define RT5670_IRQ_MB2_OC_NOR (0x1 << 14)
1499 #define RT5670_MB2_OC_P_MASK (0x1 << 6)
1500 #define RT5670_MB2_OC_P_SFT 6
1501 #define RT5670_MB2_OC_P_NOR (0x0 << 6)
1502 #define RT5670_MB2_OC_P_INV (0x1 << 6)
1513 #define RT5670_GP2_PIN_MASK (0x1 << 14)
1514 #define RT5670_GP2_PIN_SFT 14
1515 #define RT5670_GP2_PIN_GPIO2 (0x0 << 14)
1516 #define RT5670_GP2_PIN_DMIC1_SCL (0x1 << 14)
1542 #define RT5670_GP6_PIN_MASK (0x1 << 6)
1543 #define RT5670_GP6_PIN_SFT 6
1544 #define RT5670_GP6_PIN_GPIO6 (0x0 << 6)
1545 #define RT5670_GP6_PIN_DMIC1_SDA (0x1 << 6)
1586 #define RT5670_GP3_P_MASK (0x1 << 6)
1587 #define RT5670_GP3_P_SFT 6
1588 #define RT5670_GP3_P_NOR (0x0 << 6)
1589 #define RT5670_GP3_P_INV (0x1 << 6)
1624 #define RT5670_SCB_MASK (0x1 << 14)
1625 #define RT5670_SCB_SFT 14
1626 #define RT5670_SCB_DIS (0x0 << 14)
1627 #define RT5670_SCB_EN (0x1 << 14)
1646 #define RT5670_M_BB_HPF_R_MASK (0x1 << 6)
1647 #define RT5670_M_BB_HPF_R_SFT 6
1654 #define RT5670_M_MP3_R_MASK (0x1 << 14)
1655 #define RT5670_M_MP3_R_SFT 14
1666 #define RT5670_M_MP3_ORG_L_MASK (0x1 << 6)
1667 #define RT5670_M_MP3_ORG_L_SFT 6
1686 #define RT5670_3D_HP_MASK (0x1 << 14)
1687 #define RT5670_3D_HP_SFT 14
1688 #define RT5670_3D_HP_DIS (0x0 << 14)
1689 #define RT5670_3D_HP_EN (0x1 << 14)
1706 #define RT5670_M_3D_REVB_MASK (0x1 << 6)
1707 #define RT5670_M_3D_REVB_SFT 6
1722 #define RT5670_ZD_T_MASK (0x3 << 6)
1723 #define RT5670_ZD_T_SFT 6
1744 #define RT5670_HPD_RCV_MASK (0x7 << 6)
1745 #define RT5670_HPD_RCV_SFT 6
1773 #define RT5670_SPO_SV_MASK (0x1 << 14)
1774 #define RT5670_SPO_SV_SFT 14
1775 #define RT5670_SPO_SV_DIS (0x0 << 14)
1776 #define RT5670_SPO_SV_EN (0x1 << 14)
1798 #define RT5670_M_ZCD_SM_R (0x1 << 6)
1841 #define RT5670_HPF_FC_MASK (0x3f << 6)
1842 #define RT5670_HPF_FC_SFT 6
1855 #define RT5670_WND_WIND_MASK (0x1 << 13) /* Read-Only */
1857 #define RT5670_WND_STRONG_MASK (0x1 << 12) /* Read-Only */
1866 #define RT5670_DP_ATT_MASK (0x3 << 14)
1867 #define RT5670_DP_ATT_SFT 14
1884 #define RT5670_JD_CBJ_POL (0x1 << 6)
1976 RT5670_UP_RATE_FILTER = (0x1 << 6),