Lines Matching full:14
219 #define RT5645_VOL_L_MUTE (0x1 << 14)
220 #define RT5645_VOL_L_SFT 14
248 #define RT5645_CBJ_TIE_G_R (0x1 << 14)
307 #define RT5645_STO1_ADC_L_BST_MASK (0x3 << 14)
308 #define RT5645_STO1_ADC_L_BST_SFT 14
315 #define RT5645_MONO_ADC_L_BST_MASK (0x3 << 14)
316 #define RT5645_MONO_ADC_L_BST_SFT 14
327 #define RT5645_M_ADC_L1 (0x1 << 14)
328 #define RT5645_M_ADC_L1_SFT 14
347 #define RT5645_M_MONO_ADC_L1 (0x1 << 14)
348 #define RT5645_M_MONO_ADC_L1_SFT 14
375 #define RT5645_M_DAC1_L (0x1 << 14)
376 #define RT5645_M_DAC1_L_SFT 14
395 #define RT5645_M_DAC_L1 (0x1 << 14)
396 #define RT5645_M_DAC_L1_SFT 14
425 #define RT5645_M_DAC_L1_MONO_L (0x1 << 14)
426 #define RT5645_M_DAC_L1_MONO_L_SFT 14
453 #define RT5645_STO_L_DAC_L_VOL_MASK (0x1 << 14)
454 #define RT5645_STO_L_DAC_L_VOL_SFT 14
501 #define RT5645_M_PDM1_L (0x1 << 14)
502 #define RT5645_M_PDM1_L_SFT 14
600 #define RT5645_M_DAC1_HM (0x1 << 14)
601 #define RT5645_M_DAC1_HM_SFT 14
607 #define RT5645_G_RM_L_SM_L_MASK (0x3 << 14)
608 #define RT5645_G_RM_L_SM_L_SFT 14
629 #define RT5645_G_RM_R_SM_R_MASK (0x3 << 14)
630 #define RT5645_G_RM_R_SM_R_SFT 14
653 #define RT5645_M_DAC_R1_SPM_L (0x1 << 14)
654 #define RT5645_M_DAC_R1_SPM_L_SFT 14
757 #define RT5645_M_DAC_R1_LM (0x1 << 14)
758 #define RT5645_M_DAC_R1_LM_SFT 14
769 #define RT5645_PWR_I2S2 (0x1 << 14)
770 #define RT5645_PWR_I2S2_BIT 14
795 #define RT5645_PWR_ADC_MF_L (0x1 << 14)
796 #define RT5645_PWR_ADC_MF_L_BIT 14
819 #define RT5645_PWR_FV1 (0x1 << 14)
820 #define RT5645_PWR_FV1_BIT 14
845 #define RT5645_PWR_BST2 (0x1 << 14)
846 #define RT5645_PWR_BST2_BIT 14
871 #define RT5645_PWR_OM_R (0x1 << 14)
872 #define RT5645_PWR_OM_R_BIT 14
893 #define RT5645_PWR_SV_R (0x1 << 14)
894 #define RT5645_PWR_SV_R_BIT 14
997 #define RT5645_DAC_L_OSR_MASK (0x3 << 14)
998 #define RT5645_DAC_L_OSR_SFT 14
999 #define RT5645_DAC_L_OSR_128 (0x0 << 14)
1000 #define RT5645_DAC_L_OSR_64 (0x1 << 14)
1001 #define RT5645_DAC_L_OSR_32 (0x2 << 14)
1002 #define RT5645_DAC_L_OSR_16 (0x3 << 14)
1019 #define RT5645_DMIC_2_EN_MASK (0x1 << 14)
1020 #define RT5645_DMIC_2_EN_SFT 14
1021 #define RT5645_DMIC_2_DIS (0x0 << 14)
1022 #define RT5645_DMIC_2_EN (0x1 << 14)
1062 #define RT5645_SCLK_SRC_MASK (0x3 << 14)
1063 #define RT5645_SCLK_SRC_SFT 14
1064 #define RT5645_SCLK_SRC_MCLK (0x0 << 14)
1065 #define RT5645_SCLK_SRC_PLL1 (0x1 << 14)
1066 #define RT5645_SCLK_SRC_RCCLK (0x2 << 14)
1101 #define RT5645_M1_T_MASK (0x1 << 14)
1102 #define RT5645_M1_T_SFT 14
1103 #define RT5645_M1_T_I2S2 (0x0 << 14)
1104 #define RT5645_M1_T_I2S2_D3 (0x1 << 14)
1285 #define RT5645_SPK_AG_MASK (0x1 << 14)
1286 #define RT5645_SPK_AG_SFT 14
1287 #define RT5645_SPK_AG_DIS (0x0 << 14)
1288 #define RT5645_SPK_AG_EN (0x1 << 14)
1295 #define RT5645_MIC2_BS_MASK (0x1 << 14)
1296 #define RT5645_MIC2_BS_SFT 14
1297 #define RT5645_MIC2_BS_9AV (0x0 << 14)
1298 #define RT5645_MIC2_BS_75AV (0x1 << 14)
1349 #define RT5645_EQ_UPD (0x1 << 14)
1350 #define RT5645_EQ_UPD_BIT 14
1412 #define RT5645_DRC_AGC_MASK (0x1 << 14)
1413 #define RT5645_DRC_AGC_SFT 14
1414 #define RT5645_DRC_AGC_DIS (0x0 << 14)
1415 #define RT5645_DRC_AGC_EN (0x1 << 14)
1468 #define RT5645_ANC_MASK (0x1 << 14)
1469 #define RT5645_ANC_SFT 14
1470 #define RT5645_ANC_DIS (0x0 << 14)
1471 #define RT5645_ANC_EN (0x1 << 14)
1607 #define RT5645_IRQ_OT_MASK (0x1 << 14)
1608 #define RT5645_IRQ_OT_SFT 14
1609 #define RT5645_IRQ_OT_BP (0x0 << 14)
1610 #define RT5645_IRQ_OT_NOR (0x1 << 14)
1638 #define RT5645_IRQ_MB2_OC_MASK (0x1 << 14)
1639 #define RT5645_IRQ_MB2_OC_SFT 14
1640 #define RT5645_IRQ_MB2_OC_BP (0x0 << 14)
1641 #define RT5645_IRQ_MB2_OC_NOR (0x1 << 14)
1668 #define RT5645_GP2_PIN_MASK (0x1 << 14)
1669 #define RT5645_GP2_PIN_SFT 14
1670 #define RT5645_GP2_PIN_GPIO2 (0x0 << 14)
1671 #define RT5645_GP2_PIN_DMIC1_SCL (0x1 << 14)
1827 #define RT5645_SCB_MASK (0x1 << 14)
1828 #define RT5645_SCB_SFT 14
1829 #define RT5645_SCB_DIS (0x0 << 14)
1830 #define RT5645_SCB_EN (0x1 << 14)
1858 #define RT5645_M_MP3_R_MASK (0x1 << 14)
1859 #define RT5645_M_MP3_R_SFT 14
1890 #define RT5645_3D_HP_MASK (0x1 << 14)
1891 #define RT5645_3D_HP_SFT 14
1892 #define RT5645_3D_HP_DIS (0x0 << 14)
1893 #define RT5645_3D_HP_EN (0x1 << 14)
1977 #define RT5645_SPO_SV_MASK (0x1 << 14)
1978 #define RT5645_SPO_SV_SFT 14
1979 #define RT5645_SPO_SV_DIS (0x0 << 14)
1980 #define RT5645_SPO_SV_EN (0x1 << 14)
2069 #define RT5645_DP_ATT_MASK (0x3 << 14)
2070 #define RT5645_DP_ATT_SFT 14