Lines Matching full:14
154 #define RT5616_VOL_L_MUTE (0x1 << 14)
155 #define RT5616_VOL_L_SFT 14
218 #define RT5616_ADC_L_BST_MASK (0x3 << 14)
219 #define RT5616_ADC_L_BST_SFT 14
226 #define RT5616_M_STO1_ADC_L1 (0x1 << 14)
227 #define RT5616_M_STO1_ADC_L1_SFT 14
234 #define RT5616_M_IF1_DAC_L (0x1 << 14)
235 #define RT5616_M_IF1_DAC_L_SFT 14
242 #define RT5616_M_DAC_L1_MIXL (0x1 << 14)
243 #define RT5616_M_DAC_L1_MIXL_SFT 14
260 #define RT5616_M_STO_DD_L1 (0x1 << 14)
261 #define RT5616_M_STO_DD_L1_SFT 14
288 #define RT5616_STO_L_DAC_L_VOL_MASK (0x1 << 14)
289 #define RT5616_STO_L_DAC_L_VOL_SFT 14
308 #define RT5616_TXDP_SRC_MASK (0x1 << 14)
309 #define RT5616_TXDP_SRC_SFT 14
310 #define RT5616_TXDP_SRC_NOR (0x0 << 14)
311 #define RT5616_TXDP_SRC_DIV3 (0x1 << 14)
314 #define RT5616_DAC_L2_SEL_MASK (0x3 << 14)
315 #define RT5616_DAC_L2_SEL_SFT 14
316 #define RT5616_DAC_L2_SEL_IF2 (0x0 << 14)
317 #define RT5616_DAC_L2_SEL_IF3 (0x1 << 14)
318 #define RT5616_DAC_L2_SEL_TXDC (0x2 << 14)
319 #define RT5616_DAC_L2_SEL_BASS (0x3 << 14)
415 #define RT5616_M_DAC1_HM (0x1 << 14)
416 #define RT5616_M_DAC1_HM_SFT 14
423 #define RT5616_G_RM_L_SM_L_MASK (0x3 << 14)
424 #define RT5616_G_RM_L_SM_L_SFT 14
445 #define RT5616_G_RM_R_SM_R_MASK (0x3 << 14)
446 #define RT5616_G_RM_R_SM_R_SFT 14
469 #define RT5616_M_DAC_L1_SPM_L (0x1 << 14)
470 #define RT5616_M_DAC_L1_SPM_L_SFT 14
493 #define RT5616_M_DAC_L2_MM (0x1 << 14)
494 #define RT5616_M_DAC_L2_MM_SFT 14
567 #define RT5616_M_DAC_R1_LM (0x1 << 14)
568 #define RT5616_M_DAC_R1_LM_SFT 14
579 #define RT5616_PWR_I2S2 (0x1 << 14)
580 #define RT5616_PWR_I2S2_BIT 14
599 #define RT5616_PWR_FV1 (0x1 << 14)
600 #define RT5616_PWR_FV1_BIT 14
628 #define RT5616_PWR_BST2 (0x1 << 14)
629 #define RT5616_PWR_BST2_BIT 14
650 #define RT5616_PWR_OM_R (0x1 << 14)
651 #define RT5616_PWR_OM_R_BIT 14
743 #define RT5616_TDM_MODE_SEL_MASK (0x1 << 14)
744 #define RT5616_TDM_MODE_SEL_SFT 14
745 #define RT5616_TDM_MODE_SEL_NOR (0x0 << 14)
746 #define RT5616_TDM_MODE_SEL_TDM (0x1 << 14)
797 #define RT5616_TDM_CH_VAL_SEL_MASK (0x1 << 14)
798 #define RT5616_TDM_CH_VAL_SEL_SFT 14
799 #define RT5616_TDM_CH_VAL_SEL_CH01 (0x0 << 14)
800 #define RT5616_TDM_CH_VAL_SEL_CH0123 (0x1 << 14)
829 #define RT5616_SCLK_SRC_MASK (0x3 << 14)
830 #define RT5616_SCLK_SRC_SFT 14
831 #define RT5616_SCLK_SRC_MCLK (0x0 << 14)
832 #define RT5616_SCLK_SRC_PLL1 (0x1 << 14)
881 #define RT5616_STO2_ASRC_EN (0x1 << 14)
882 #define RT5616_STO2_ASRC_EN_SFT 14
1130 #define RT5616_EQ_UPD (0x1 << 14)
1131 #define RT5616_EQ_UPD_BIT 14
1209 #define RT5616_DRC_AGC_MASK (0x1 << 14)
1210 #define RT5616_DRC_AGC_SFT 14
1211 #define RT5616_DRC_AGC_DIS (0x0 << 14)
1212 #define RT5616_DRC_AGC_EN (0x1 << 14)
1372 #define RT5616_STA_JD2 (0x1 << 14)
1373 #define RT5616_STA_JD2_BIT 14
1400 #define RT5616_GP2_PIN_MASK (0x1 << 14)
1401 #define RT5616_GP2_PIN_SFT 14
1402 #define RT5616_GP2_PIN_GPIO2 (0x0 << 14)
1403 #define RT5616_GP2_PIN_DMIC1_SCL (0x1 << 14)
1434 #define RT5616_GP5_DR_MASK (0x1 << 14)
1435 #define RT5616_GP5_DR_SFT 14
1436 #define RT5616_GP5_DR_IN (0x0 << 14)
1437 #define RT5616_GP5_DR_OUT (0x1 << 14)
1538 #define RT5616_SCB_MASK (0x1 << 14)
1539 #define RT5616_SCB_SFT 14
1540 #define RT5616_SCB_DIS (0x0 << 14)
1541 #define RT5616_SCB_EN (0x1 << 14)
1568 #define RT5616_M_MP3_R_MASK (0x1 << 14)
1569 #define RT5616_M_MP3_R_SFT 14
1600 #define RT5616_3D_HP_MASK (0x1 << 14)
1601 #define RT5616_3D_HP_SFT 14
1602 #define RT5616_3D_HP_DIS (0x0 << 14)
1603 #define RT5616_3D_HP_EN (0x1 << 14)
1783 #define RT5616_DP_ATT_MASK (0x3 << 14)
1784 #define RT5616_DP_ATT_SFT 14