Lines Matching full:dac
144 SND_SOC_DAPM_SUPPLY("DAC Clock", RK817_CODEC_DTOP_DIGEN_CLKE, 3, 0, NULL, 0),
146 SND_SOC_DAPM_SUPPLY("DAC Channel Enable", RK817_CODEC_DTOP_DIGEN_CLKE, 1, 0, NULL, 0),
148 SND_SOC_DAPM_SUPPLY("DAC Bias", RK817_CODEC_ADAC_CFG1, 3, 1, NULL, 0),
149 SND_SOC_DAPM_SUPPLY("DAC Mute Off", RK817_CODEC_DDAC_MUTE_MIXCTL, 0, 1, NULL, 0),
154 SND_SOC_DAPM_DAC("SPK DAC", "Playback", RK817_CODEC_ADAC_CFG1, 2, 1),
169 SND_SOC_DAPM_DAC("DAC L", "Playback", RK817_CODEC_ADAC_CFG1, 1, 1),
170 SND_SOC_DAPM_DAC("DAC R", "Playback", RK817_CODEC_ADAC_CFG1, 0, 1),
224 {"SPK DAC", NULL, "LDO Regulator"},
225 {"SPK DAC", NULL, "IBIAS Block"},
226 {"SPK DAC", NULL, "VAvg Buffer"},
227 {"SPK DAC", NULL, "PLL Power"},
228 {"SPK DAC", NULL, "I2S TX1 Transfer Start"},
229 {"SPK DAC", NULL, "DAC Clock"},
230 {"SPK DAC", NULL, "I2S RX Clock"},
231 {"SPK DAC", NULL, "DAC Channel Enable"},
232 {"SPK DAC", NULL, "I2S RX Channel Enable"},
233 {"SPK DAC", NULL, "Class D Mode"},
234 {"SPK DAC", NULL, "DAC Bias"},
235 {"SPK DAC", NULL, "DAC Mute Off"},
236 {"SPK DAC", NULL, "Enable Class D"},
237 {"SPK DAC", NULL, "Disable Class D Mute Ramp"},
238 {"SPK DAC", NULL, "Class D Mute Rate 1"},
239 {"SPK DAC", NULL, "Class D Mute Rate 2"},
240 {"SPK DAC", NULL, "Class D OCPP 2"},
241 {"SPK DAC", NULL, "Class D OCPP 3"},
242 {"SPK DAC", NULL, "Class D OCPN 2"},
243 {"SPK DAC", NULL, "Class D OCPN 3"},
244 {"SPK DAC", NULL, "High Pass Filter"},
247 {"DAC L", NULL, "LDO Regulator"},
248 {"DAC L", NULL, "IBIAS Block"},
249 {"DAC L", NULL, "VAvg Buffer"},
250 {"DAC L", NULL, "PLL Power"},
251 {"DAC L", NULL, "I2S TX1 Transfer Start"},
252 {"DAC L", NULL, "DAC Clock"},
253 {"DAC L", NULL, "I2S RX Clock"},
254 {"DAC L", NULL, "DAC Channel Enable"},
255 {"DAC L", NULL, "I2S RX Channel Enable"},
256 {"DAC L", NULL, "DAC Bias"},
257 {"DAC L", NULL, "DAC Mute Off"},
258 {"DAC L", NULL, "Headphone Charge Pump"},
259 {"DAC L", NULL, "Headphone CP Discharge LDO"},
260 {"DAC L", NULL, "Headphone OStage"},
261 {"DAC L", NULL, "Headphone Pre Amp"},
264 {"DAC R", NULL, "LDO Regulator"},
265 {"DAC R", NULL, "IBIAS Block"},
266 {"DAC R", NULL, "VAvg Buffer"},
267 {"DAC R", NULL, "PLL Power"},
268 {"DAC R", NULL, "I2S TX1 Transfer Start"},
269 {"DAC R", NULL, "DAC Clock"},
270 {"DAC R", NULL, "I2S RX Clock"},
271 {"DAC R", NULL, "DAC Channel Enable"},
272 {"DAC R", NULL, "I2S RX Channel Enable"},
273 {"DAC R", NULL, "DAC Bias"},
274 {"DAC R", NULL, "DAC Mute Off"},
275 {"DAC R", NULL, "Headphone Charge Pump"},
276 {"DAC R", NULL, "Headphone CP Discharge LDO"},
277 {"DAC R", NULL, "Headphone OStage"},
278 {"DAC R", NULL, "Headphone Pre Amp"},
281 {"Playback Mux", "HP", "DAC L"},
282 {"Playback Mux", "HP", "DAC R"},
283 {"Playback Mux", "SPK", "SPK DAC"},