Lines Matching full:regmap
83 struct regmap *regmap; member
115 regmap_update_bits(priv->regmap, MT6358_GPIO_MODE2_CLR, in playback_gpio_set()
117 regmap_update_bits(priv->regmap, MT6358_GPIO_MODE2_SET, in playback_gpio_set()
119 regmap_update_bits(priv->regmap, MT6358_GPIO_MODE2, in playback_gpio_set()
130 regmap_update_bits(priv->regmap, MT6358_GPIO_MODE2_CLR, in playback_gpio_reset()
132 regmap_update_bits(priv->regmap, MT6358_GPIO_MODE2, in playback_gpio_reset()
134 regmap_update_bits(priv->regmap, MT6358_GPIO_DIR0, in playback_gpio_reset()
141 regmap_update_bits(priv->regmap, MT6358_GPIO_MODE3_CLR, in capture_gpio_set()
143 regmap_update_bits(priv->regmap, MT6358_GPIO_MODE3_SET, in capture_gpio_set()
145 regmap_update_bits(priv->regmap, MT6358_GPIO_MODE3, in capture_gpio_set()
157 regmap_update_bits(priv->regmap, MT6358_GPIO_MODE3_CLR, in capture_gpio_reset()
159 regmap_update_bits(priv->regmap, MT6358_GPIO_MODE3, in capture_gpio_reset()
161 regmap_update_bits(priv->regmap, MT6358_GPIO_DIR0, in capture_gpio_reset()
168 regmap_update_bits(priv->regmap, MT6358_DCXO_CW14, in mt6358_set_dcxo()
178 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON6, in mt6358_set_clksq()
183 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON6, in mt6358_set_clksq()
192 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON13, in mt6358_set_aud_global_bias()
201 regmap_update_bits(priv->regmap, MT6358_AUD_TOP_CKPDN_CON0, in mt6358_set_topck()
211 regmap_update_bits(priv->regmap, in mt6358_mtkaif_tx_enable()
215 regmap_update_bits(priv->regmap, in mt6358_mtkaif_tx_enable()
218 regmap_update_bits(priv->regmap, in mt6358_mtkaif_tx_enable()
224 regmap_update_bits(priv->regmap, in mt6358_mtkaif_tx_enable()
228 regmap_update_bits(priv->regmap, in mt6358_mtkaif_tx_enable()
235 regmap_update_bits(priv->regmap, in mt6358_mtkaif_tx_enable()
239 regmap_update_bits(priv->regmap, in mt6358_mtkaif_tx_enable()
250 regmap_update_bits(priv->regmap, MT6358_AFE_AUD_PAD_TOP, in mt6358_mtkaif_tx_disable()
269 regmap_update_bits(priv->regmap, MT6358_AUDIO_DIG_CFG, in mt6358_mtkaif_calibration_enable()
272 regmap_update_bits(priv->regmap, MT6358_AUDIO_DIG_CFG, in mt6358_mtkaif_calibration_enable()
284 regmap_update_bits(priv->regmap, MT6358_AUDIO_DIG_CFG, in mt6358_mtkaif_calibration_disable()
287 regmap_update_bits(priv->regmap, MT6358_AUDIO_DIG_CFG, in mt6358_mtkaif_calibration_disable()
308 regmap_update_bits(priv->regmap, MT6358_AUDIO_DIG_CFG, in mt6358_set_mtkaif_calibration_phase()
311 regmap_update_bits(priv->regmap, MT6358_AUDIO_DIG_CFG, in mt6358_set_mtkaif_calibration_phase()
333 regmap_write(priv->regmap, MT6358_ZCD_CON0, 0x0000); in hp_zcd_disable()
344 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON1, in hp_main_output_ramp()
346 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON1, in hp_main_output_ramp()
359 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON9, in hp_aux_feedback_loop_gain_ramp()
371 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON4, in hp_pull_down()
377 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON4, in hp_pull_down()
413 regmap_update_bits(priv->regmap, in headset_volume_ramp()
441 regmap_read(priv->regmap, MT6358_ZCD_CON2, ®); in mt6358_put_volsw()
448 regmap_read(priv->regmap, MT6358_ZCD_CON1, ®); in mt6358_put_volsw()
455 regmap_read(priv->regmap, MT6358_ZCD_CON3, ®); in mt6358_put_volsw()
463 regmap_read(priv->regmap, MT6358_AUDENC_ANA_CON0, ®); in mt6358_put_volsw()
466 regmap_read(priv->regmap, MT6358_AUDENC_ANA_CON1, ®); in mt6358_put_volsw()
480 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON13, in mt6358_enable_wov_phase2()
482 regmap_update_bits(priv->regmap, MT6358_DCXO_CW14, 0xffff, 0xa2b5); in mt6358_enable_wov_phase2()
483 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON1, in mt6358_enable_wov_phase2()
487 regmap_update_bits(priv->regmap, MT6358_DCXO_CW13, 0xffff, 0x9929); in mt6358_enable_wov_phase2()
488 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON9, in mt6358_enable_wov_phase2()
490 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON8, in mt6358_enable_wov_phase2()
494 regmap_update_bits(priv->regmap, MT6358_AUD_TOP_CKPDN_CON0, in mt6358_enable_wov_phase2()
496 regmap_update_bits(priv->regmap, MT6358_GPIO_MODE3, 0xffff, 0x0120); in mt6358_enable_wov_phase2()
497 regmap_update_bits(priv->regmap, MT6358_AFE_VOW_CFG0, 0xffff, 0xffff); in mt6358_enable_wov_phase2()
498 regmap_update_bits(priv->regmap, MT6358_AFE_VOW_CFG1, 0xffff, 0x0200); in mt6358_enable_wov_phase2()
499 regmap_update_bits(priv->regmap, MT6358_AFE_VOW_CFG2, 0xffff, 0x2424); in mt6358_enable_wov_phase2()
500 regmap_update_bits(priv->regmap, MT6358_AFE_VOW_CFG3, 0xffff, 0xdbac); in mt6358_enable_wov_phase2()
501 regmap_update_bits(priv->regmap, MT6358_AFE_VOW_CFG4, 0xffff, 0x029e); in mt6358_enable_wov_phase2()
502 regmap_update_bits(priv->regmap, MT6358_AFE_VOW_CFG5, 0xffff, 0x0000); in mt6358_enable_wov_phase2()
503 regmap_update_bits(priv->regmap, MT6358_AFE_VOW_POSDIV_CFG0, in mt6358_enable_wov_phase2()
505 regmap_update_bits(priv->regmap, MT6358_AFE_VOW_HPF_CFG0, in mt6358_enable_wov_phase2()
507 regmap_update_bits(priv->regmap, MT6358_AFE_VOW_TOP, 0xffff, 0x68d1); in mt6358_enable_wov_phase2()
515 regmap_update_bits(priv->regmap, MT6358_AFE_VOW_TOP, 0xffff, 0xc000); in mt6358_disable_wov_phase2()
516 regmap_update_bits(priv->regmap, MT6358_AFE_VOW_HPF_CFG0, in mt6358_disable_wov_phase2()
518 regmap_update_bits(priv->regmap, MT6358_AFE_VOW_POSDIV_CFG0, in mt6358_disable_wov_phase2()
520 regmap_update_bits(priv->regmap, MT6358_AFE_VOW_CFG5, 0xffff, 0x0100); in mt6358_disable_wov_phase2()
521 regmap_update_bits(priv->regmap, MT6358_AFE_VOW_CFG4, 0xffff, 0x006c); in mt6358_disable_wov_phase2()
522 regmap_update_bits(priv->regmap, MT6358_AFE_VOW_CFG3, 0xffff, 0xa879); in mt6358_disable_wov_phase2()
523 regmap_update_bits(priv->regmap, MT6358_AFE_VOW_CFG2, 0xffff, 0x2323); in mt6358_disable_wov_phase2()
524 regmap_update_bits(priv->regmap, MT6358_AFE_VOW_CFG1, 0xffff, 0x0400); in mt6358_disable_wov_phase2()
525 regmap_update_bits(priv->regmap, MT6358_AFE_VOW_CFG0, 0xffff, 0x0000); in mt6358_disable_wov_phase2()
526 regmap_update_bits(priv->regmap, MT6358_GPIO_MODE3, 0xffff, 0x02d8); in mt6358_disable_wov_phase2()
527 regmap_update_bits(priv->regmap, MT6358_AUD_TOP_CKPDN_CON0, in mt6358_disable_wov_phase2()
531 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON8, in mt6358_disable_wov_phase2()
533 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON9, in mt6358_disable_wov_phase2()
535 regmap_update_bits(priv->regmap, MT6358_DCXO_CW13, 0xffff, 0x9829); in mt6358_disable_wov_phase2()
536 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON1, in mt6358_disable_wov_phase2()
539 regmap_update_bits(priv->regmap, MT6358_DCXO_CW14, 0xffff, 0xa2b5); in mt6358_disable_wov_phase2()
540 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON13, in mt6358_disable_wov_phase2()
872 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON6, in mt_clksq_event()
895 regmap_write(priv->regmap, MT6358_AFUNC_AUD_CON2, 0x0006); in mt_sgen_event()
897 regmap_write(priv->regmap, MT6358_AFUNC_AUD_CON0, 0xCBA1); in mt_sgen_event()
899 regmap_write(priv->regmap, MT6358_AFUNC_AUD_CON2, 0x0003); in mt_sgen_event()
901 regmap_write(priv->regmap, MT6358_AFUNC_AUD_CON2, 0x000B); in mt_sgen_event()
903 regmap_update_bits(priv->regmap, MT6358_AFE_SGEN_CFG0, in mt_sgen_event()
906 regmap_update_bits(priv->regmap, MT6358_AFE_SGEN_CFG1, in mt_sgen_event()
912 regmap_write(priv->regmap, MT6358_AFUNC_AUD_CON2, 0x0000); in mt_sgen_event()
913 regmap_write(priv->regmap, MT6358_AFUNC_AUD_CON0, 0xcba0); in mt_sgen_event()
937 regmap_write(priv->regmap, MT6358_AFUNC_AUD_CON2, 0x0006); in mt_aif_in_event()
939 regmap_write(priv->regmap, MT6358_AFUNC_AUD_CON0, 0xCBA1); in mt_aif_in_event()
941 regmap_write(priv->regmap, MT6358_AFUNC_AUD_CON2, 0x0003); in mt_aif_in_event()
943 regmap_write(priv->regmap, MT6358_AFUNC_AUD_CON2, 0x000B); in mt_aif_in_event()
947 regmap_write(priv->regmap, MT6358_AFUNC_AUD_CON2, 0x0000); in mt_aif_in_event()
948 regmap_write(priv->regmap, MT6358_AFUNC_AUD_CON0, 0xcba0); in mt_aif_in_event()
964 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON4, in mtk_hp_enable()
968 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON2, 0x4000); in mtk_hp_enable()
971 regmap_write(priv->regmap, MT6358_ZCD_CON2, DL_GAIN_N_40DB_REG); in mtk_hp_enable()
974 regmap_write(priv->regmap, MT6358_AUDNCP_CLKDIV_CON1, 0x0001); in mtk_hp_enable()
976 regmap_write(priv->regmap, MT6358_AUDNCP_CLKDIV_CON2, 0x002c); in mtk_hp_enable()
978 regmap_write(priv->regmap, MT6358_AUDNCP_CLKDIV_CON0, 0x0001); in mtk_hp_enable()
980 regmap_write(priv->regmap, MT6358_AUDNCP_CLKDIV_CON4, 0x0003); in mtk_hp_enable()
982 regmap_write(priv->regmap, MT6358_AUDNCP_CLKDIV_CON3, 0x0000); in mtk_hp_enable()
986 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON14, in mtk_hp_enable()
989 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON15, 0x0001); in mtk_hp_enable()
996 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON0, 0x3000); in mtk_hp_enable()
999 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON12, 0x0055); in mtk_hp_enable()
1002 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON11, 0x4900); in mtk_hp_enable()
1005 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON12, 0x0055); in mtk_hp_enable()
1007 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON2, 0x4033); in mtk_hp_enable()
1010 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON1, 0x000c); in mtk_hp_enable()
1012 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON1, 0x003c); in mtk_hp_enable()
1014 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON9, 0x0c00); in mtk_hp_enable()
1016 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON0, 0x30c0); in mtk_hp_enable()
1018 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON0, 0x30f0); in mtk_hp_enable()
1020 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON1, 0x00fc); in mtk_hp_enable()
1023 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON9, 0x0e00); in mtk_hp_enable()
1025 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON9, 0x0200); in mtk_hp_enable()
1029 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON10, 0x0000); in mtk_hp_enable()
1032 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON1, 0x00ff); in mtk_hp_enable()
1039 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON1, 0x3fcf); in mtk_hp_enable()
1047 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON1, 0x3fc3); in mtk_hp_enable()
1049 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON1, 0x3f03); in mtk_hp_enable()
1053 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON13, 0x1, 0x1); in mtk_hp_enable()
1055 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON0, 0x30ff); in mtk_hp_enable()
1057 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON9, 0xf201); in mtk_hp_enable()
1061 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON0, 0x32ff); in mtk_hp_enable()
1063 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON0, 0x3aff); in mtk_hp_enable()
1077 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON0, in mtk_hp_disable()
1081 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON9, in mtk_hp_disable()
1085 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON0, in mtk_hp_disable()
1089 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON13, 0x1, 0x0); in mtk_hp_disable()
1092 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON1, 0x3fc3); in mtk_hp_disable()
1094 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON1, 0x3fcf); in mtk_hp_disable()
1102 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON1, 0x3fff); in mtk_hp_disable()
1111 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON1, 0x3, 0x0); in mtk_hp_disable()
1114 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON9, 0x0e00); in mtk_hp_disable()
1117 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON9, 0x0c00); in mtk_hp_disable()
1120 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON1, in mtk_hp_disable()
1124 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON0, in mtk_hp_disable()
1128 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON0, in mtk_hp_disable()
1132 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON9, 0x0000); in mtk_hp_disable()
1135 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON1, in mtk_hp_disable()
1139 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON1, in mtk_hp_disable()
1143 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON12, in mtk_hp_disable()
1147 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON15, 0x1, 0x0); in mtk_hp_disable()
1149 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON14, in mtk_hp_disable()
1152 regmap_update_bits(priv->regmap, MT6358_AUDNCP_CLKDIV_CON3, in mtk_hp_disable()
1156 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON2, in mtk_hp_disable()
1160 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON4, in mtk_hp_disable()
1173 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON4, in mtk_hp_spk_enable()
1177 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON2, 0x4000); in mtk_hp_spk_enable()
1180 regmap_write(priv->regmap, MT6358_ZCD_CON2, DL_GAIN_N_10DB_REG); in mtk_hp_spk_enable()
1183 regmap_write(priv->regmap, MT6358_AUDNCP_CLKDIV_CON1, 0x0001); in mtk_hp_spk_enable()
1185 regmap_write(priv->regmap, MT6358_AUDNCP_CLKDIV_CON2, 0x002c); in mtk_hp_spk_enable()
1187 regmap_write(priv->regmap, MT6358_AUDNCP_CLKDIV_CON0, 0x0001); in mtk_hp_spk_enable()
1189 regmap_write(priv->regmap, MT6358_AUDNCP_CLKDIV_CON4, 0x0003); in mtk_hp_spk_enable()
1191 regmap_write(priv->regmap, MT6358_AUDNCP_CLKDIV_CON3, 0x0000); in mtk_hp_spk_enable()
1195 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON14, in mtk_hp_spk_enable()
1198 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON15, 0x0001); in mtk_hp_spk_enable()
1205 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON0, 0x3000); in mtk_hp_spk_enable()
1208 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON12, 0x0055); in mtk_hp_spk_enable()
1211 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON11, 0x4900); in mtk_hp_spk_enable()
1214 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON12, 0x0055); in mtk_hp_spk_enable()
1216 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON2, 0x4033); in mtk_hp_spk_enable()
1222 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON0, 0x30c0); in mtk_hp_spk_enable()
1224 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON0, 0x30f0); in mtk_hp_spk_enable()
1226 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON9, 0x0200); in mtk_hp_spk_enable()
1230 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON10, 0x0000); in mtk_hp_spk_enable()
1233 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON1, 0x0003); in mtk_hp_spk_enable()
1238 regmap_write(priv->regmap, MT6358_ZCD_CON1, DL_GAIN_N_40DB_REG); in mtk_hp_spk_enable()
1245 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON7, 0x0110); in mtk_hp_spk_enable()
1247 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON7, 0x0112); in mtk_hp_spk_enable()
1249 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON7, 0x0113); in mtk_hp_spk_enable()
1252 regmap_update_bits(priv->regmap, MT6358_ZCD_CON1, in mtk_hp_spk_enable()
1256 regmap_update_bits(priv->regmap, MT6358_ZCD_CON1, in mtk_hp_spk_enable()
1262 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON13, 0x1, 0x1); in mtk_hp_spk_enable()
1264 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON0, 0x30f9); in mtk_hp_spk_enable()
1266 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON9, 0x0201); in mtk_hp_spk_enable()
1268 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON7, 0x011b); in mtk_hp_spk_enable()
1270 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON0, 0x35f9); in mtk_hp_spk_enable()
1278 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON0, in mtk_hp_spk_disable()
1281 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON7, in mtk_hp_spk_disable()
1285 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON0, in mtk_hp_spk_disable()
1289 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON13, 0x1, 0x0); in mtk_hp_spk_disable()
1297 regmap_update_bits(priv->regmap, MT6358_ZCD_CON1, in mtk_hp_spk_disable()
1304 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON1, 0x3, 0x0); in mtk_hp_spk_disable()
1307 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON1, 0x3fc3); in mtk_hp_spk_disable()
1309 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON1, 0x3fcf); in mtk_hp_spk_disable()
1312 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON1, 0x3fff); in mtk_hp_spk_disable()
1318 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON0, in mtk_hp_spk_disable()
1321 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON7, in mtk_hp_spk_disable()
1325 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON0, in mtk_hp_spk_disable()
1328 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON7, in mtk_hp_spk_disable()
1332 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON9, in mtk_hp_spk_disable()
1336 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON12, in mtk_hp_spk_disable()
1339 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON15, 0x1, 0x0); in mtk_hp_spk_disable()
1341 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON14, 0x1055, 0x0); in mtk_hp_spk_disable()
1343 regmap_update_bits(priv->regmap, MT6358_AUDNCP_CLKDIV_CON3, 0x1, 0x1); in mtk_hp_spk_disable()
1346 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON4, in mtk_hp_spk_disable()
1427 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON2, 0x4000); in mt_rcv_event()
1430 regmap_write(priv->regmap, MT6358_AUDNCP_CLKDIV_CON1, 0x0001); in mt_rcv_event()
1432 regmap_write(priv->regmap, MT6358_AUDNCP_CLKDIV_CON2, 0x002c); in mt_rcv_event()
1434 regmap_write(priv->regmap, MT6358_AUDNCP_CLKDIV_CON0, 0x0001); in mt_rcv_event()
1436 regmap_write(priv->regmap, MT6358_AUDNCP_CLKDIV_CON4, 0x0003); in mt_rcv_event()
1438 regmap_write(priv->regmap, MT6358_AUDNCP_CLKDIV_CON3, 0x0000); in mt_rcv_event()
1442 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON14, in mt_rcv_event()
1445 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON15, 0x0001); in mt_rcv_event()
1452 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON6, 0x0010); in mt_rcv_event()
1455 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON12, 0x0055); in mt_rcv_event()
1457 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON11, 0x4900); in mt_rcv_event()
1460 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON12, 0x0055); in mt_rcv_event()
1462 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON6, 0x0090); in mt_rcv_event()
1465 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON9, 0x0000); in mt_rcv_event()
1468 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON10, 0x0000); in mt_rcv_event()
1471 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON6, 0x0092); in mt_rcv_event()
1473 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON6, 0x0093); in mt_rcv_event()
1476 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON13, in mt_rcv_event()
1480 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON0, 0x0009); in mt_rcv_event()
1482 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON9, 0x0001); in mt_rcv_event()
1484 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON6, 0x009b); in mt_rcv_event()
1488 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON6, in mt_rcv_event()
1493 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON0, in mt_rcv_event()
1497 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON13, in mt_rcv_event()
1501 regmap_write(priv->regmap, MT6358_ZCD_CON3, DL_GAIN_N_40DB); in mt_rcv_event()
1504 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON6, in mt_rcv_event()
1508 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON6, in mt_rcv_event()
1512 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON9, in mt_rcv_event()
1516 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON9, in mt_rcv_event()
1520 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON12, in mt_rcv_event()
1524 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON15, in mt_rcv_event()
1527 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON14, in mt_rcv_event()
1530 regmap_update_bits(priv->regmap, MT6358_AUDNCP_CLKDIV_CON3, in mt_rcv_event()
1577 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON13, in mt_adc_supply_event()
1580 regmap_write(priv->regmap, MT6358_AUDENC_ANA_CON3, in mt_adc_supply_event()
1583 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON14, in mt_adc_supply_event()
1586 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON14, in mt_adc_supply_event()
1591 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON14, in mt_adc_supply_event()
1594 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON14, in mt_adc_supply_event()
1598 regmap_write(priv->regmap, MT6358_AUDENC_ANA_CON3, 0x0000); in mt_adc_supply_event()
1600 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON13, in mt_adc_supply_event()
1621 regmap_write(priv->regmap, MT6358_AFE_DCCLK_CFG0, 0x2062); in mt6358_amic_enable()
1622 regmap_write(priv->regmap, MT6358_AFE_DCCLK_CFG0, 0x2062); in mt6358_amic_enable()
1623 regmap_write(priv->regmap, MT6358_AFE_DCCLK_CFG0, 0x2060); in mt6358_amic_enable()
1624 regmap_write(priv->regmap, MT6358_AFE_DCCLK_CFG0, 0x2061); in mt6358_amic_enable()
1625 regmap_write(priv->regmap, MT6358_AFE_DCCLK_CFG1, 0x0100); in mt6358_amic_enable()
1633 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON9, in mt6358_amic_enable()
1637 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON9, in mt6358_amic_enable()
1641 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON9, in mt6358_amic_enable()
1646 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON9, in mt6358_amic_enable()
1654 regmap_write(priv->regmap, in mt6358_amic_enable()
1657 regmap_write(priv->regmap, in mt6358_amic_enable()
1663 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON0, in mt6358_amic_enable()
1665 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON1, in mt6358_amic_enable()
1669 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON0, in mt6358_amic_enable()
1671 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON1, in mt6358_amic_enable()
1677 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON0, in mt6358_amic_enable()
1682 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON0, in mt6358_amic_enable()
1688 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON0, in mt6358_amic_enable()
1694 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON0, in mt6358_amic_enable()
1698 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON0, in mt6358_amic_enable()
1705 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON1, in mt6358_amic_enable()
1710 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON1, in mt6358_amic_enable()
1716 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON1, in mt6358_amic_enable()
1722 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON1, in mt6358_amic_enable()
1726 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON1, in mt6358_amic_enable()
1734 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON0, in mt6358_amic_enable()
1737 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON1, in mt6358_amic_enable()
1741 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON3, in mt6358_amic_enable()
1749 regmap_write(priv->regmap, MT6358_AFE_UL_SRC_CON0_H, 0x0000); in mt6358_amic_enable()
1752 regmap_write(priv->regmap, MT6358_AFE_UL_SRC_CON0_L, 0x0001); in mt6358_amic_enable()
1767 regmap_update_bits(priv->regmap, MT6358_AFE_UL_SRC_CON0_L, in mt6358_amic_disable()
1774 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON0, in mt6358_amic_disable()
1777 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON0, in mt6358_amic_disable()
1780 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON0, in mt6358_amic_disable()
1784 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON0, in mt6358_amic_disable()
1788 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON1, in mt6358_amic_disable()
1791 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON1, in mt6358_amic_disable()
1794 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON1, in mt6358_amic_disable()
1798 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON1, in mt6358_amic_disable()
1803 regmap_write(priv->regmap, MT6358_AUDENC_ANA_CON9, 0x0000); in mt6358_amic_disable()
1806 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON10, in mt6358_amic_disable()
1811 regmap_write(priv->regmap, MT6358_AFE_DCCLK_CFG0, 0x2060); in mt6358_amic_disable()
1813 regmap_write(priv->regmap, MT6358_AFE_DCCLK_CFG0, 0x2062); in mt6358_amic_disable()
1815 regmap_write(priv->regmap, MT6358_AFE_DCCLK_CFG0, 0x2062); in mt6358_amic_disable()
1817 regmap_write(priv->regmap, MT6358_AFE_DCCLK_CFG0, 0x2062); in mt6358_amic_disable()
1827 regmap_write(priv->regmap, MT6358_AUDENC_ANA_CON9, 0x0021); in mt6358_dmic_enable()
1830 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON10, in mt6358_dmic_enable()
1834 regmap_write(priv->regmap, MT6358_AUDENC_ANA_CON8, 0x0005); in mt6358_dmic_enable()
1841 regmap_write(priv->regmap, MT6358_AFE_UL_SRC_CON0_H, 0x0400); in mt6358_dmic_enable()
1843 regmap_write(priv->regmap, MT6358_AFE_UL_SRC_CON0_H, 0x0080); in mt6358_dmic_enable()
1846 regmap_write(priv->regmap, MT6358_AFE_UL_SRC_CON0_L, 0x0003); in mt6358_dmic_enable()
1859 regmap_update_bits(priv->regmap, MT6358_AFE_UL_SRC_CON0_L, in mt6358_dmic_disable()
1866 regmap_write(priv->regmap, MT6358_AUDENC_ANA_CON8, 0x0000); in mt6358_dmic_disable()
1870 regmap_write(priv->regmap, MT6358_AUDENC_ANA_CON9, 0x0001); in mt6358_dmic_disable()
1873 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON10, in mt6358_dmic_disable()
1877 regmap_write(priv->regmap, MT6358_AUDENC_ANA_CON9, 0x0000); in mt6358_dmic_disable()
1887 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON0, in mt6358_restore_pga()
1890 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON1, in mt6358_restore_pga()
2376 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON0, in mt6358_codec_init_reg()
2379 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON0, in mt6358_codec_init_reg()
2383 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON6, in mt6358_codec_init_reg()
2387 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON7, in mt6358_codec_init_reg()
2392 regmap_update_bits(priv->regmap, MT6358_ACCDET_CON13, in mt6358_codec_init_reg()
2396 regmap_write(priv->regmap, MT6358_DRV_CON3, 0x8888); in mt6358_codec_init_reg()
2408 snd_soc_component_init_regmap(cmpnt, priv->regmap); in mt6358_codec_probe()
2465 priv->regmap = mt6397->regmap; in mt6358_platform_driver_probe()
2466 if (IS_ERR(priv->regmap)) in mt6358_platform_driver_probe()
2467 return PTR_ERR(priv->regmap); in mt6358_platform_driver_probe()