Lines Matching full:va
21 /* VA macro registers */
255 /* VA macro */
279 /* VA core */
441 static int va_clk_rsc_fs_gen_request(struct va_macro *va, bool enable) in va_clk_rsc_fs_gen_request() argument
443 struct regmap *regmap = va->regmap; in va_clk_rsc_fs_gen_request()
474 static int va_macro_mclk_enable(struct va_macro *va, bool mclk_enable) in va_macro_mclk_enable() argument
476 struct regmap *regmap = va->regmap; in va_macro_mclk_enable()
479 va_clk_rsc_fs_gen_request(va, true); in va_macro_mclk_enable()
483 va_clk_rsc_fs_gen_request(va, false); in va_macro_mclk_enable()
493 struct va_macro *va = snd_soc_component_get_drvdata(comp); in va_macro_mclk_event() local
497 return clk_prepare_enable(va->fsgen); in va_macro_mclk_event()
499 clk_disable_unprepare(va->fsgen); in va_macro_mclk_event()
556 struct va_macro *va = snd_soc_component_get_drvdata(component); in va_macro_tx_mixer_get() local
558 if (test_bit(dec_id, &va->active_ch_mask[dai_id])) in va_macro_tx_mixer_get()
579 struct va_macro *va = snd_soc_component_get_drvdata(component); in va_macro_tx_mixer_put() local
582 set_bit(dec_id, &va->active_ch_mask[dai_id]); in va_macro_tx_mixer_put()
583 va->active_ch_cnt[dai_id]++; in va_macro_tx_mixer_put()
585 clear_bit(dec_id, &va->active_ch_mask[dai_id]); in va_macro_tx_mixer_put()
586 va->active_ch_cnt[dai_id]--; in va_macro_tx_mixer_put()
597 struct va_macro *va = snd_soc_component_get_drvdata(component); in va_dmic_clk_enable() local
607 dmic_clk_cnt = &(va->dmic_0_1_clk_cnt); in va_dmic_clk_enable()
608 dmic_clk_div = &(va->dmic_0_1_clk_div); in va_dmic_clk_enable()
614 dmic_clk_cnt = &(va->dmic_2_3_clk_cnt); in va_dmic_clk_enable()
615 dmic_clk_div = &(va->dmic_2_3_clk_div); in va_dmic_clk_enable()
621 dmic_clk_cnt = &(va->dmic_4_5_clk_cnt); in va_dmic_clk_enable()
622 dmic_clk_div = &(va->dmic_4_5_clk_div); in va_dmic_clk_enable()
628 dmic_clk_cnt = &(va->dmic_6_7_clk_cnt); in va_dmic_clk_enable()
629 dmic_clk_div = &(va->dmic_6_7_clk_div); in va_dmic_clk_enable()
640 clk_div = va->dmic_clk_div; in va_dmic_clk_enable()
681 clk_div = va->dmic_clk_div; in va_dmic_clk_enable()
683 clk_div = va->dmic_clk_div; in va_dmic_clk_enable()
732 struct va_macro *va = snd_soc_component_get_drvdata(comp); in va_macro_enable_dec() local
749 va->dec_mode[decimator] << CDC_VA_ADC_MODE_SHIFT); in va_macro_enable_dec()
812 struct va_macro *va = snd_soc_component_get_drvdata(comp); in va_macro_dec_mode_get() local
816 ucontrol->value.enumerated.item[0] = va->dec_mode[path]; in va_macro_dec_mode_get()
828 struct va_macro *va = snd_soc_component_get_drvdata(comp); in va_macro_dec_mode_put() local
830 va->dec_mode[path] = value; in va_macro_dec_mode_put()
844 struct va_macro *va = snd_soc_component_get_drvdata(component); in va_macro_hw_params() local
875 for_each_set_bit(decimator, &va->active_ch_mask[dai->id], in va_macro_hw_params()
891 struct va_macro *va = snd_soc_component_get_drvdata(component); in va_macro_get_channel_map() local
897 *tx_slot = va->active_ch_mask[dai->id]; in va_macro_get_channel_map()
898 *tx_num = va->active_ch_cnt[dai->id]; in va_macro_get_channel_map()
910 struct va_macro *va = snd_soc_component_get_drvdata(component); in va_macro_digital_mute() local
913 for_each_set_bit(decimator, &va->active_ch_mask[dai->id], in va_macro_digital_mute()
1115 SND_SOC_DAPM_MUX("VA DMIC MUX0", SND_SOC_NOPM, 0, 0, &va_dmic0_mux),
1116 SND_SOC_DAPM_MUX("VA DMIC MUX1", SND_SOC_NOPM, 0, 0, &va_dmic1_mux),
1117 SND_SOC_DAPM_MUX("VA DMIC MUX2", SND_SOC_NOPM, 0, 0, &va_dmic2_mux),
1118 SND_SOC_DAPM_MUX("VA DMIC MUX3", SND_SOC_NOPM, 0, 0, &va_dmic3_mux),
1130 SND_SOC_DAPM_ADC_E("VA DMIC0", NULL, SND_SOC_NOPM, 0, 0,
1134 SND_SOC_DAPM_ADC_E("VA DMIC1", NULL, SND_SOC_NOPM, 1, 0,
1138 SND_SOC_DAPM_ADC_E("VA DMIC2", NULL, SND_SOC_NOPM, 2, 0,
1142 SND_SOC_DAPM_ADC_E("VA DMIC3", NULL, SND_SOC_NOPM, 3, 0,
1146 SND_SOC_DAPM_ADC_E("VA DMIC4", NULL, SND_SOC_NOPM, 4, 0,
1150 SND_SOC_DAPM_ADC_E("VA DMIC5", NULL, SND_SOC_NOPM, 5, 0,
1154 SND_SOC_DAPM_ADC_E("VA DMIC6", NULL, SND_SOC_NOPM, 6, 0,
1158 SND_SOC_DAPM_ADC_E("VA DMIC7", NULL, SND_SOC_NOPM, 7, 0,
1162 SND_SOC_DAPM_INPUT("VA SWR_ADC0"),
1163 SND_SOC_DAPM_INPUT("VA SWR_ADC1"),
1164 SND_SOC_DAPM_INPUT("VA SWR_ADC2"),
1165 SND_SOC_DAPM_INPUT("VA SWR_ADC3"),
1166 SND_SOC_DAPM_INPUT("VA SWR_MIC0"),
1167 SND_SOC_DAPM_INPUT("VA SWR_MIC1"),
1168 SND_SOC_DAPM_INPUT("VA SWR_MIC2"),
1169 SND_SOC_DAPM_INPUT("VA SWR_MIC3"),
1170 SND_SOC_DAPM_INPUT("VA SWR_MIC4"),
1171 SND_SOC_DAPM_INPUT("VA SWR_MIC5"),
1172 SND_SOC_DAPM_INPUT("VA SWR_MIC6"),
1173 SND_SOC_DAPM_INPUT("VA SWR_MIC7"),
1175 SND_SOC_DAPM_MUX_E("VA DEC0 MUX", SND_SOC_NOPM, VA_MACRO_DEC0, 0,
1180 SND_SOC_DAPM_MUX_E("VA DEC1 MUX", SND_SOC_NOPM, VA_MACRO_DEC1, 0,
1185 SND_SOC_DAPM_MUX_E("VA DEC2 MUX", SND_SOC_NOPM, VA_MACRO_DEC2, 0,
1190 SND_SOC_DAPM_MUX_E("VA DEC3 MUX", SND_SOC_NOPM, VA_MACRO_DEC3, 0,
1209 {"VA_AIF1_CAP Mixer", "DEC0", "VA DEC0 MUX"},
1210 {"VA_AIF1_CAP Mixer", "DEC1", "VA DEC1 MUX"},
1211 {"VA_AIF1_CAP Mixer", "DEC2", "VA DEC2 MUX"},
1212 {"VA_AIF1_CAP Mixer", "DEC3", "VA DEC3 MUX"},
1214 {"VA_AIF2_CAP Mixer", "DEC0", "VA DEC0 MUX"},
1215 {"VA_AIF2_CAP Mixer", "DEC1", "VA DEC1 MUX"},
1216 {"VA_AIF2_CAP Mixer", "DEC2", "VA DEC2 MUX"},
1217 {"VA_AIF2_CAP Mixer", "DEC3", "VA DEC3 MUX"},
1219 {"VA_AIF3_CAP Mixer", "DEC0", "VA DEC0 MUX"},
1220 {"VA_AIF3_CAP Mixer", "DEC1", "VA DEC1 MUX"},
1221 {"VA_AIF3_CAP Mixer", "DEC2", "VA DEC2 MUX"},
1222 {"VA_AIF3_CAP Mixer", "DEC3", "VA DEC3 MUX"},
1224 {"VA DEC0 MUX", "VA_DMIC", "VA DMIC MUX0"},
1225 {"VA DMIC MUX0", "DMIC0", "VA DMIC0"},
1226 {"VA DMIC MUX0", "DMIC1", "VA DMIC1"},
1227 {"VA DMIC MUX0", "DMIC2", "VA DMIC2"},
1228 {"VA DMIC MUX0", "DMIC3", "VA DMIC3"},
1229 {"VA DMIC MUX0", "DMIC4", "VA DMIC4"},
1230 {"VA DMIC MUX0", "DMIC5", "VA DMIC5"},
1231 {"VA DMIC MUX0", "DMIC6", "VA DMIC6"},
1232 {"VA DMIC MUX0", "DMIC7", "VA DMIC7"},
1234 {"VA DEC1 MUX", "VA_DMIC", "VA DMIC MUX1"},
1235 {"VA DMIC MUX1", "DMIC0", "VA DMIC0"},
1236 {"VA DMIC MUX1", "DMIC1", "VA DMIC1"},
1237 {"VA DMIC MUX1", "DMIC2", "VA DMIC2"},
1238 {"VA DMIC MUX1", "DMIC3", "VA DMIC3"},
1239 {"VA DMIC MUX1", "DMIC4", "VA DMIC4"},
1240 {"VA DMIC MUX1", "DMIC5", "VA DMIC5"},
1241 {"VA DMIC MUX1", "DMIC6", "VA DMIC6"},
1242 {"VA DMIC MUX1", "DMIC7", "VA DMIC7"},
1244 {"VA DEC2 MUX", "VA_DMIC", "VA DMIC MUX2"},
1245 {"VA DMIC MUX2", "DMIC0", "VA DMIC0"},
1246 {"VA DMIC MUX2", "DMIC1", "VA DMIC1"},
1247 {"VA DMIC MUX2", "DMIC2", "VA DMIC2"},
1248 {"VA DMIC MUX2", "DMIC3", "VA DMIC3"},
1249 {"VA DMIC MUX2", "DMIC4", "VA DMIC4"},
1250 {"VA DMIC MUX2", "DMIC5", "VA DMIC5"},
1251 {"VA DMIC MUX2", "DMIC6", "VA DMIC6"},
1252 {"VA DMIC MUX2", "DMIC7", "VA DMIC7"},
1254 {"VA DEC3 MUX", "VA_DMIC", "VA DMIC MUX3"},
1255 {"VA DMIC MUX3", "DMIC0", "VA DMIC0"},
1256 {"VA DMIC MUX3", "DMIC1", "VA DMIC1"},
1257 {"VA DMIC MUX3", "DMIC2", "VA DMIC2"},
1258 {"VA DMIC MUX3", "DMIC3", "VA DMIC3"},
1259 {"VA DMIC MUX3", "DMIC4", "VA DMIC4"},
1260 {"VA DMIC MUX3", "DMIC5", "VA DMIC5"},
1261 {"VA DMIC MUX3", "DMIC6", "VA DMIC6"},
1262 {"VA DMIC MUX3", "DMIC7", "VA DMIC7"},
1264 { "VA DMIC0", NULL, "DMIC0 Pin" },
1265 { "VA DMIC1", NULL, "DMIC1 Pin" },
1266 { "VA DMIC2", NULL, "DMIC2 Pin" },
1267 { "VA DMIC3", NULL, "DMIC3 Pin" },
1268 { "VA DMIC4", NULL, "DMIC4 Pin" },
1269 { "VA DMIC5", NULL, "DMIC5 Pin" },
1270 { "VA DMIC6", NULL, "DMIC6 Pin" },
1271 { "VA DMIC7", NULL, "DMIC7 Pin" },
1311 struct va_macro *va = snd_soc_component_get_drvdata(component); in va_macro_component_probe() local
1313 snd_soc_component_init_regmap(component, va->regmap); in va_macro_component_probe()
1319 .name = "VA MACRO",
1331 struct va_macro *va = to_va_macro(hw); in fsgen_gate_enable() local
1332 struct regmap *regmap = va->regmap; in fsgen_gate_enable()
1335 ret = va_macro_mclk_enable(va, true); in fsgen_gate_enable()
1336 if (!va->has_swr_master) in fsgen_gate_enable()
1353 struct va_macro *va = to_va_macro(hw); in fsgen_gate_disable() local
1354 struct regmap *regmap = va->regmap; in fsgen_gate_disable()
1356 if (va->has_swr_master) in fsgen_gate_disable()
1360 va_macro_mclk_enable(va, false); in fsgen_gate_disable()
1365 struct va_macro *va = to_va_macro(hw); in fsgen_gate_is_enabled() local
1368 regmap_read(va->regmap, CDC_VA_TOP_CSR_TOP_CFG0, &val); in fsgen_gate_is_enabled()
1379 static int va_macro_register_fsgen_output(struct va_macro *va) in va_macro_register_fsgen_output() argument
1381 struct clk *parent = va->mclk; in va_macro_register_fsgen_output()
1382 struct device *dev = va->dev; in va_macro_register_fsgen_output()
1398 va->hw.init = &init; in va_macro_register_fsgen_output()
1399 ret = devm_clk_hw_register(va->dev, &va->hw); in va_macro_register_fsgen_output()
1403 return devm_of_clk_add_hw_provider(dev, of_clk_hw_simple_get, &va->hw); in va_macro_register_fsgen_output()
1407 struct va_macro *va) in va_macro_validate_dmic_sample_rate() argument
1419 va->dmic_clk_div = VA_MACRO_CLK_DIV_2; in va_macro_validate_dmic_sample_rate()
1422 va->dmic_clk_div = VA_MACRO_CLK_DIV_3; in va_macro_validate_dmic_sample_rate()
1425 va->dmic_clk_div = VA_MACRO_CLK_DIV_4; in va_macro_validate_dmic_sample_rate()
1428 va->dmic_clk_div = VA_MACRO_CLK_DIV_6; in va_macro_validate_dmic_sample_rate()
1431 va->dmic_clk_div = VA_MACRO_CLK_DIV_8; in va_macro_validate_dmic_sample_rate()
1434 va->dmic_clk_div = VA_MACRO_CLK_DIV_16; in va_macro_validate_dmic_sample_rate()
1444 dev_err(va->dev, "%s: Invalid rate %d, for mclk %d\n", in va_macro_validate_dmic_sample_rate()
1455 struct va_macro *va; in va_macro_probe() local
1460 va = devm_kzalloc(dev, sizeof(*va), GFP_KERNEL); in va_macro_probe()
1461 if (!va) in va_macro_probe()
1464 va->dev = dev; in va_macro_probe()
1466 va->macro = devm_clk_get_optional(dev, "macro"); in va_macro_probe()
1467 if (IS_ERR(va->macro)) in va_macro_probe()
1468 return PTR_ERR(va->macro); in va_macro_probe()
1470 va->dcodec = devm_clk_get_optional(dev, "dcodec"); in va_macro_probe()
1471 if (IS_ERR(va->dcodec)) in va_macro_probe()
1472 return PTR_ERR(va->dcodec); in va_macro_probe()
1474 va->mclk = devm_clk_get(dev, "mclk"); in va_macro_probe()
1475 if (IS_ERR(va->mclk)) in va_macro_probe()
1476 return PTR_ERR(va->mclk); in va_macro_probe()
1478 va->pds = lpass_macro_pds_init(dev); in va_macro_probe()
1479 if (IS_ERR(va->pds)) in va_macro_probe()
1480 return PTR_ERR(va->pds); in va_macro_probe()
1486 va->dmic_clk_div = VA_MACRO_CLK_DIV_2; in va_macro_probe()
1488 ret = va_macro_validate_dmic_sample_rate(sample_rate, va); in va_macro_probe()
1501 va->regmap = devm_regmap_init_mmio(dev, base, &va_regmap_config); in va_macro_probe()
1502 if (IS_ERR(va->regmap)) { in va_macro_probe()
1507 dev_set_drvdata(dev, va); in va_macro_probe()
1510 va->has_swr_master = data->has_swr_master; in va_macro_probe()
1513 clk_set_rate(va->mclk, 2 * VA_MACRO_MCLK_FREQ); in va_macro_probe()
1515 ret = clk_prepare_enable(va->macro); in va_macro_probe()
1519 ret = clk_prepare_enable(va->dcodec); in va_macro_probe()
1523 ret = clk_prepare_enable(va->mclk); in va_macro_probe()
1527 ret = va_macro_register_fsgen_output(va); in va_macro_probe()
1531 va->fsgen = clk_hw_get_clk(&va->hw, "fsgen"); in va_macro_probe()
1532 if (IS_ERR(va->fsgen)) { in va_macro_probe()
1533 ret = PTR_ERR(va->fsgen); in va_macro_probe()
1537 if (va->has_swr_master) { in va_macro_probe()
1539 regmap_update_bits(va->regmap, CDC_VA_TOP_CSR_SWR_MIC_CTL0, in va_macro_probe()
1542 regmap_update_bits(va->regmap, CDC_VA_TOP_CSR_SWR_MIC_CTL1, in va_macro_probe()
1545 regmap_update_bits(va->regmap, CDC_VA_TOP_CSR_SWR_MIC_CTL2, in va_macro_probe()
1566 clk_disable_unprepare(va->mclk); in va_macro_probe()
1568 clk_disable_unprepare(va->dcodec); in va_macro_probe()
1570 clk_disable_unprepare(va->macro); in va_macro_probe()
1572 lpass_macro_pds_exit(va->pds); in va_macro_probe()
1579 struct va_macro *va = dev_get_drvdata(&pdev->dev); in va_macro_remove() local
1581 clk_disable_unprepare(va->mclk); in va_macro_remove()
1582 clk_disable_unprepare(va->dcodec); in va_macro_remove()
1583 clk_disable_unprepare(va->macro); in va_macro_remove()
1585 lpass_macro_pds_exit(va->pds); in va_macro_remove()
1592 struct va_macro *va = dev_get_drvdata(dev); in va_macro_runtime_suspend() local
1594 regcache_cache_only(va->regmap, true); in va_macro_runtime_suspend()
1595 regcache_mark_dirty(va->regmap); in va_macro_runtime_suspend()
1597 clk_disable_unprepare(va->mclk); in va_macro_runtime_suspend()
1604 struct va_macro *va = dev_get_drvdata(dev); in va_macro_runtime_resume() local
1607 ret = clk_prepare_enable(va->mclk); in va_macro_runtime_resume()
1609 dev_err(va->dev, "unable to prepare mclk\n"); in va_macro_runtime_resume()
1613 regcache_cache_only(va->regmap, false); in va_macro_runtime_resume()
1614 regcache_sync(va->regmap); in va_macro_runtime_resume()
1625 { .compatible = "qcom,sc7280-lpass-va-macro", .data = &sm8250_va_data },
1626 { .compatible = "qcom,sm8250-lpass-va-macro", .data = &sm8250_va_data },
1627 { .compatible = "qcom,sm8450-lpass-va-macro", .data = &sm8450_va_data },
1628 { .compatible = "qcom,sc8280xp-lpass-va-macro", .data = &sm8450_va_data },
1645 MODULE_DESCRIPTION("VA macro driver");