Lines Matching +full:sm8250 +full:- +full:lpass +full:- +full:tx +full:- +full:macro
1 // SPDX-License-Identifier: GPL-2.0-only
2 // Copyright (c) 2018-2020, The Linux Foundation. All rights reserved.
12 #include <sound/soc-dapm.h>
15 #include <linux/clk-provider.h>
17 #include "lpass-macro-common.h"
198 #define TX_ADC_TO_DMIC(n) ((n - TX_ADC_MAX)/2)
243 struct tx_macro *tx; member
249 struct tx_macro *tx; member
266 struct clk *macro; member
280 static const DECLARE_TLV_DB_SCALE(digital_gain, -8400, 100, -8400);
283 /* TX Macro */
427 /* Update volatile list for tx/tx macros */ in tx_is_volatile_register()
600 static int tx_macro_mclk_enable(struct tx_macro *tx, in tx_macro_mclk_enable() argument
603 struct regmap *regmap = tx->regmap; in tx_macro_mclk_enable()
606 if (tx->tx_mclk_users == 0) { in tx_macro_mclk_enable()
618 tx->tx_mclk_users++; in tx_macro_mclk_enable()
620 if (tx->tx_mclk_users <= 0) { in tx_macro_mclk_enable()
621 dev_err(tx->dev, "clock already disabled\n"); in tx_macro_mclk_enable()
622 tx->tx_mclk_users = 0; in tx_macro_mclk_enable()
625 tx->tx_mclk_users--; in tx_macro_mclk_enable()
626 if (tx->tx_mclk_users == 0) { in tx_macro_mclk_enable()
658 struct tx_macro *tx; in tx_macro_tx_hpf_corner_freq_callback() local
665 tx = hpf_work->tx; in tx_macro_tx_hpf_corner_freq_callback()
666 component = tx->component; in tx_macro_tx_hpf_corner_freq_callback()
667 hpf_cut_off_freq = hpf_work->hpf_cut_off_freq; in tx_macro_tx_hpf_corner_freq_callback()
669 dec_cfg_reg = CDC_TXn_TX_PATH_CFG0(hpf_work->decimator); in tx_macro_tx_hpf_corner_freq_callback()
670 hpf_gate_reg = CDC_TXn_TX_PATH_SEC2(hpf_work->decimator); in tx_macro_tx_hpf_corner_freq_callback()
672 if (is_amic_enabled(component, hpf_work->decimator)) { in tx_macro_tx_hpf_corner_freq_callback()
702 struct tx_macro *tx; in tx_macro_mute_update_callback() local
708 tx = tx_mute_dwork->tx; in tx_macro_mute_update_callback()
709 component = tx->component; in tx_macro_mute_update_callback()
710 decimator = tx_mute_dwork->decimator; in tx_macro_mute_update_callback()
719 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); in tx_macro_mclk_event()
720 struct tx_macro *tx = snd_soc_component_get_drvdata(component); in tx_macro_mclk_event() local
724 tx_macro_mclk_enable(tx, true); in tx_macro_mclk_event()
727 tx_macro_mclk_enable(tx, false); in tx_macro_mclk_event()
740 struct snd_soc_component *component = snd_soc_dapm_to_component(widget->dapm); in tx_macro_put_dec_enum()
741 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value; in tx_macro_put_dec_enum()
745 struct tx_macro *tx = snd_soc_component_get_drvdata(component); in tx_macro_put_dec_enum() local
747 val = ucontrol->value.enumerated.item[0]; in tx_macro_put_dec_enum()
749 switch (e->reg) { in tx_macro_put_dec_enum()
787 tx->dmic_clk_div); in tx_macro_put_dec_enum()
798 struct snd_soc_component *component = snd_soc_dapm_to_component(widget->dapm); in tx_macro_tx_mixer_get()
799 struct soc_mixer_control *mc = (struct soc_mixer_control *)kcontrol->private_value; in tx_macro_tx_mixer_get()
800 u32 dai_id = widget->shift; in tx_macro_tx_mixer_get()
801 u32 dec_id = mc->shift; in tx_macro_tx_mixer_get()
802 struct tx_macro *tx = snd_soc_component_get_drvdata(component); in tx_macro_tx_mixer_get() local
804 if (test_bit(dec_id, &tx->active_ch_mask[dai_id])) in tx_macro_tx_mixer_get()
805 ucontrol->value.integer.value[0] = 1; in tx_macro_tx_mixer_get()
807 ucontrol->value.integer.value[0] = 0; in tx_macro_tx_mixer_get()
816 struct snd_soc_component *component = snd_soc_dapm_to_component(widget->dapm); in tx_macro_tx_mixer_put()
818 struct soc_mixer_control *mc = (struct soc_mixer_control *)kcontrol->private_value; in tx_macro_tx_mixer_put()
819 u32 dai_id = widget->shift; in tx_macro_tx_mixer_put()
820 u32 dec_id = mc->shift; in tx_macro_tx_mixer_put()
821 u32 enable = ucontrol->value.integer.value[0]; in tx_macro_tx_mixer_put()
822 struct tx_macro *tx = snd_soc_component_get_drvdata(component); in tx_macro_tx_mixer_put() local
825 if (tx->active_decimator[dai_id] == dec_id) in tx_macro_tx_mixer_put()
828 set_bit(dec_id, &tx->active_ch_mask[dai_id]); in tx_macro_tx_mixer_put()
829 tx->active_ch_cnt[dai_id]++; in tx_macro_tx_mixer_put()
830 tx->active_decimator[dai_id] = dec_id; in tx_macro_tx_mixer_put()
832 if (tx->active_decimator[dai_id] == -1) in tx_macro_tx_mixer_put()
835 tx->active_ch_cnt[dai_id]--; in tx_macro_tx_mixer_put()
836 clear_bit(dec_id, &tx->active_ch_mask[dai_id]); in tx_macro_tx_mixer_put()
837 tx->active_decimator[dai_id] = -1; in tx_macro_tx_mixer_put()
839 snd_soc_dapm_mixer_update_power(widget->dapm, kcontrol, enable, update); in tx_macro_tx_mixer_put()
847 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); in tx_macro_enable_dec()
855 struct tx_macro *tx = snd_soc_component_get_drvdata(component); in tx_macro_enable_dec() local
857 decimator = w->shift; in tx_macro_enable_dec()
876 tx->dmic_clk_div); in tx_macro_enable_dec()
881 tx->dec_mode[decimator]); in tx_macro_enable_dec()
882 /* Enable TX PGA Mute */ in tx_macro_enable_dec()
897 tx->tx_hpf_work[decimator].hpf_cut_off_freq = in tx_macro_enable_dec()
911 &tx->tx_mute_dwork[decimator].dwork, in tx_macro_enable_dec()
913 if (tx->tx_hpf_work[decimator].hpf_cut_off_freq != CF_MIN_3DB_150HZ) { in tx_macro_enable_dec()
915 &tx->tx_hpf_work[decimator].dwork, in tx_macro_enable_dec()
940 if (tx->bcs_enable) { in tx_macro_enable_dec()
943 tx->bcs_clk_en = true; in tx_macro_enable_dec()
948 tx->tx_hpf_work[decimator].hpf_cut_off_freq; in tx_macro_enable_dec()
952 &tx->tx_hpf_work[decimator].dwork)) { in tx_macro_enable_dec()
982 cancel_delayed_work_sync(&tx->tx_mute_dwork[decimator].dwork); in tx_macro_enable_dec()
991 if (tx->bcs_enable) { in tx_macro_enable_dec()
998 tx->bcs_clk_en = false; in tx_macro_enable_dec()
1009 struct tx_macro *tx = snd_soc_component_get_drvdata(component); in tx_macro_dec_mode_get() local
1010 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value; in tx_macro_dec_mode_get()
1011 int path = e->shift_l; in tx_macro_dec_mode_get()
1013 ucontrol->value.integer.value[0] = tx->dec_mode[path]; in tx_macro_dec_mode_get()
1022 int value = ucontrol->value.integer.value[0]; in tx_macro_dec_mode_put()
1023 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value; in tx_macro_dec_mode_put()
1024 int path = e->shift_l; in tx_macro_dec_mode_put()
1025 struct tx_macro *tx = snd_soc_component_get_drvdata(component); in tx_macro_dec_mode_put() local
1027 if (tx->dec_mode[path] == value) in tx_macro_dec_mode_put()
1030 tx->dec_mode[path] = value; in tx_macro_dec_mode_put()
1039 struct tx_macro *tx = snd_soc_component_get_drvdata(component); in tx_macro_get_bcs() local
1041 ucontrol->value.integer.value[0] = tx->bcs_enable; in tx_macro_get_bcs()
1050 int value = ucontrol->value.integer.value[0]; in tx_macro_set_bcs()
1051 struct tx_macro *tx = snd_soc_component_get_drvdata(component); in tx_macro_set_bcs() local
1053 tx->bcs_enable = value; in tx_macro_set_bcs()
1062 struct snd_soc_component *component = dai->component; in tx_macro_hw_params()
1065 struct tx_macro *tx = snd_soc_component_get_drvdata(component); in tx_macro_hw_params() local
1091 dev_err(component->dev, "%s: Invalid TX sample rate: %d\n", in tx_macro_hw_params()
1093 return -EINVAL; in tx_macro_hw_params()
1096 for_each_set_bit(decimator, &tx->active_ch_mask[dai->id], TX_MACRO_DEC_MAX) in tx_macro_hw_params()
1107 struct snd_soc_component *component = dai->component; in tx_macro_get_channel_map()
1108 struct tx_macro *tx = snd_soc_component_get_drvdata(component); in tx_macro_get_channel_map() local
1110 switch (dai->id) { in tx_macro_get_channel_map()
1114 *tx_slot = tx->active_ch_mask[dai->id]; in tx_macro_get_channel_map()
1115 *tx_num = tx->active_ch_cnt[dai->id]; in tx_macro_get_channel_map()
1125 struct snd_soc_component *component = dai->component; in tx_macro_digital_mute()
1126 struct tx_macro *tx = snd_soc_component_get_drvdata(component); in tx_macro_digital_mute() local
1130 if (tx->active_decimator[dai->id] == -1) in tx_macro_digital_mute()
1133 decimator = tx->active_decimator[dai->id]; in tx_macro_digital_mute()
1374 SND_SOC_DAPM_MUX("TX SMIC MUX0", SND_SOC_NOPM, 0, 0, &tx_smic0_mux),
1375 SND_SOC_DAPM_MUX("TX SMIC MUX1", SND_SOC_NOPM, 0, 0, &tx_smic1_mux),
1376 SND_SOC_DAPM_MUX("TX SMIC MUX2", SND_SOC_NOPM, 0, 0, &tx_smic2_mux),
1377 SND_SOC_DAPM_MUX("TX SMIC MUX3", SND_SOC_NOPM, 0, 0, &tx_smic3_mux),
1378 SND_SOC_DAPM_MUX("TX SMIC MUX4", SND_SOC_NOPM, 0, 0, &tx_smic4_mux),
1379 SND_SOC_DAPM_MUX("TX SMIC MUX5", SND_SOC_NOPM, 0, 0, &tx_smic5_mux),
1380 SND_SOC_DAPM_MUX("TX SMIC MUX6", SND_SOC_NOPM, 0, 0, &tx_smic6_mux),
1381 SND_SOC_DAPM_MUX("TX SMIC MUX7", SND_SOC_NOPM, 0, 0, &tx_smic7_mux),
1383 SND_SOC_DAPM_INPUT("TX SWR_ADC0"),
1384 SND_SOC_DAPM_INPUT("TX SWR_ADC1"),
1385 SND_SOC_DAPM_INPUT("TX SWR_ADC2"),
1386 SND_SOC_DAPM_INPUT("TX SWR_ADC3"),
1387 SND_SOC_DAPM_INPUT("TX SWR_DMIC0"),
1388 SND_SOC_DAPM_INPUT("TX SWR_DMIC1"),
1389 SND_SOC_DAPM_INPUT("TX SWR_DMIC2"),
1390 SND_SOC_DAPM_INPUT("TX SWR_DMIC3"),
1391 SND_SOC_DAPM_INPUT("TX SWR_DMIC4"),
1392 SND_SOC_DAPM_INPUT("TX SWR_DMIC5"),
1393 SND_SOC_DAPM_INPUT("TX SWR_DMIC6"),
1394 SND_SOC_DAPM_INPUT("TX SWR_DMIC7"),
1396 SND_SOC_DAPM_MUX_E("TX DEC0 MUX", SND_SOC_NOPM,
1402 SND_SOC_DAPM_MUX_E("TX DEC1 MUX", SND_SOC_NOPM,
1408 SND_SOC_DAPM_MUX_E("TX DEC2 MUX", SND_SOC_NOPM,
1414 SND_SOC_DAPM_MUX_E("TX DEC3 MUX", SND_SOC_NOPM,
1420 SND_SOC_DAPM_MUX_E("TX DEC4 MUX", SND_SOC_NOPM,
1426 SND_SOC_DAPM_MUX_E("TX DEC5 MUX", SND_SOC_NOPM,
1432 SND_SOC_DAPM_MUX_E("TX DEC6 MUX", SND_SOC_NOPM,
1438 SND_SOC_DAPM_MUX_E("TX DEC7 MUX", SND_SOC_NOPM,
1462 {"TX_AIF1_CAP Mixer", "DEC0", "TX DEC0 MUX"},
1463 {"TX_AIF1_CAP Mixer", "DEC1", "TX DEC1 MUX"},
1464 {"TX_AIF1_CAP Mixer", "DEC2", "TX DEC2 MUX"},
1465 {"TX_AIF1_CAP Mixer", "DEC3", "TX DEC3 MUX"},
1466 {"TX_AIF1_CAP Mixer", "DEC4", "TX DEC4 MUX"},
1467 {"TX_AIF1_CAP Mixer", "DEC5", "TX DEC5 MUX"},
1468 {"TX_AIF1_CAP Mixer", "DEC6", "TX DEC6 MUX"},
1469 {"TX_AIF1_CAP Mixer", "DEC7", "TX DEC7 MUX"},
1471 {"TX_AIF2_CAP Mixer", "DEC0", "TX DEC0 MUX"},
1472 {"TX_AIF2_CAP Mixer", "DEC1", "TX DEC1 MUX"},
1473 {"TX_AIF2_CAP Mixer", "DEC2", "TX DEC2 MUX"},
1474 {"TX_AIF2_CAP Mixer", "DEC3", "TX DEC3 MUX"},
1475 {"TX_AIF2_CAP Mixer", "DEC4", "TX DEC4 MUX"},
1476 {"TX_AIF2_CAP Mixer", "DEC5", "TX DEC5 MUX"},
1477 {"TX_AIF2_CAP Mixer", "DEC6", "TX DEC6 MUX"},
1478 {"TX_AIF2_CAP Mixer", "DEC7", "TX DEC7 MUX"},
1480 {"TX_AIF3_CAP Mixer", "DEC0", "TX DEC0 MUX"},
1481 {"TX_AIF3_CAP Mixer", "DEC1", "TX DEC1 MUX"},
1482 {"TX_AIF3_CAP Mixer", "DEC2", "TX DEC2 MUX"},
1483 {"TX_AIF3_CAP Mixer", "DEC3", "TX DEC3 MUX"},
1484 {"TX_AIF3_CAP Mixer", "DEC4", "TX DEC4 MUX"},
1485 {"TX_AIF3_CAP Mixer", "DEC5", "TX DEC5 MUX"},
1486 {"TX_AIF3_CAP Mixer", "DEC6", "TX DEC6 MUX"},
1487 {"TX_AIF3_CAP Mixer", "DEC7", "TX DEC7 MUX"},
1489 {"TX DEC0 MUX", NULL, "TX_MCLK"},
1490 {"TX DEC1 MUX", NULL, "TX_MCLK"},
1491 {"TX DEC2 MUX", NULL, "TX_MCLK"},
1492 {"TX DEC3 MUX", NULL, "TX_MCLK"},
1493 {"TX DEC4 MUX", NULL, "TX_MCLK"},
1494 {"TX DEC5 MUX", NULL, "TX_MCLK"},
1495 {"TX DEC6 MUX", NULL, "TX_MCLK"},
1496 {"TX DEC7 MUX", NULL, "TX_MCLK"},
1498 {"TX DEC0 MUX", "SWR_MIC", "TX SMIC MUX0"},
1499 {"TX SMIC MUX0", NULL, "TX_SWR_CLK"},
1500 {"TX SMIC MUX0", "ADC0", "TX SWR_ADC0"},
1501 {"TX SMIC MUX0", "ADC1", "TX SWR_ADC1"},
1502 {"TX SMIC MUX0", "ADC2", "TX SWR_ADC2"},
1503 {"TX SMIC MUX0", "ADC3", "TX SWR_ADC3"},
1504 {"TX SMIC MUX0", "SWR_DMIC0", "TX SWR_DMIC0"},
1505 {"TX SMIC MUX0", "SWR_DMIC1", "TX SWR_DMIC1"},
1506 {"TX SMIC MUX0", "SWR_DMIC2", "TX SWR_DMIC2"},
1507 {"TX SMIC MUX0", "SWR_DMIC3", "TX SWR_DMIC3"},
1508 {"TX SMIC MUX0", "SWR_DMIC4", "TX SWR_DMIC4"},
1509 {"TX SMIC MUX0", "SWR_DMIC5", "TX SWR_DMIC5"},
1510 {"TX SMIC MUX0", "SWR_DMIC6", "TX SWR_DMIC6"},
1511 {"TX SMIC MUX0", "SWR_DMIC7", "TX SWR_DMIC7"},
1513 {"TX DEC1 MUX", "SWR_MIC", "TX SMIC MUX1"},
1514 {"TX SMIC MUX1", NULL, "TX_SWR_CLK"},
1515 {"TX SMIC MUX1", "ADC0", "TX SWR_ADC0"},
1516 {"TX SMIC MUX1", "ADC1", "TX SWR_ADC1"},
1517 {"TX SMIC MUX1", "ADC2", "TX SWR_ADC2"},
1518 {"TX SMIC MUX1", "ADC3", "TX SWR_ADC3"},
1519 {"TX SMIC MUX1", "SWR_DMIC0", "TX SWR_DMIC0"},
1520 {"TX SMIC MUX1", "SWR_DMIC1", "TX SWR_DMIC1"},
1521 {"TX SMIC MUX1", "SWR_DMIC2", "TX SWR_DMIC2"},
1522 {"TX SMIC MUX1", "SWR_DMIC3", "TX SWR_DMIC3"},
1523 {"TX SMIC MUX1", "SWR_DMIC4", "TX SWR_DMIC4"},
1524 {"TX SMIC MUX1", "SWR_DMIC5", "TX SWR_DMIC5"},
1525 {"TX SMIC MUX1", "SWR_DMIC6", "TX SWR_DMIC6"},
1526 {"TX SMIC MUX1", "SWR_DMIC7", "TX SWR_DMIC7"},
1528 {"TX DEC2 MUX", "SWR_MIC", "TX SMIC MUX2"},
1529 {"TX SMIC MUX2", NULL, "TX_SWR_CLK"},
1530 {"TX SMIC MUX2", "ADC0", "TX SWR_ADC0"},
1531 {"TX SMIC MUX2", "ADC1", "TX SWR_ADC1"},
1532 {"TX SMIC MUX2", "ADC2", "TX SWR_ADC2"},
1533 {"TX SMIC MUX2", "ADC3", "TX SWR_ADC3"},
1534 {"TX SMIC MUX2", "SWR_DMIC0", "TX SWR_DMIC0"},
1535 {"TX SMIC MUX2", "SWR_DMIC1", "TX SWR_DMIC1"},
1536 {"TX SMIC MUX2", "SWR_DMIC2", "TX SWR_DMIC2"},
1537 {"TX SMIC MUX2", "SWR_DMIC3", "TX SWR_DMIC3"},
1538 {"TX SMIC MUX2", "SWR_DMIC4", "TX SWR_DMIC4"},
1539 {"TX SMIC MUX2", "SWR_DMIC5", "TX SWR_DMIC5"},
1540 {"TX SMIC MUX2", "SWR_DMIC6", "TX SWR_DMIC6"},
1541 {"TX SMIC MUX2", "SWR_DMIC7", "TX SWR_DMIC7"},
1543 {"TX DEC3 MUX", "SWR_MIC", "TX SMIC MUX3"},
1544 {"TX SMIC MUX3", NULL, "TX_SWR_CLK"},
1545 {"TX SMIC MUX3", "ADC0", "TX SWR_ADC0"},
1546 {"TX SMIC MUX3", "ADC1", "TX SWR_ADC1"},
1547 {"TX SMIC MUX3", "ADC2", "TX SWR_ADC2"},
1548 {"TX SMIC MUX3", "ADC3", "TX SWR_ADC3"},
1549 {"TX SMIC MUX3", "SWR_DMIC0", "TX SWR_DMIC0"},
1550 {"TX SMIC MUX3", "SWR_DMIC1", "TX SWR_DMIC1"},
1551 {"TX SMIC MUX3", "SWR_DMIC2", "TX SWR_DMIC2"},
1552 {"TX SMIC MUX3", "SWR_DMIC3", "TX SWR_DMIC3"},
1553 {"TX SMIC MUX3", "SWR_DMIC4", "TX SWR_DMIC4"},
1554 {"TX SMIC MUX3", "SWR_DMIC5", "TX SWR_DMIC5"},
1555 {"TX SMIC MUX3", "SWR_DMIC6", "TX SWR_DMIC6"},
1556 {"TX SMIC MUX3", "SWR_DMIC7", "TX SWR_DMIC7"},
1558 {"TX DEC4 MUX", "SWR_MIC", "TX SMIC MUX4"},
1559 {"TX SMIC MUX4", NULL, "TX_SWR_CLK"},
1560 {"TX SMIC MUX4", "ADC0", "TX SWR_ADC0"},
1561 {"TX SMIC MUX4", "ADC1", "TX SWR_ADC1"},
1562 {"TX SMIC MUX4", "ADC2", "TX SWR_ADC2"},
1563 {"TX SMIC MUX4", "ADC3", "TX SWR_ADC3"},
1564 {"TX SMIC MUX4", "SWR_DMIC0", "TX SWR_DMIC0"},
1565 {"TX SMIC MUX4", "SWR_DMIC1", "TX SWR_DMIC1"},
1566 {"TX SMIC MUX4", "SWR_DMIC2", "TX SWR_DMIC2"},
1567 {"TX SMIC MUX4", "SWR_DMIC3", "TX SWR_DMIC3"},
1568 {"TX SMIC MUX4", "SWR_DMIC4", "TX SWR_DMIC4"},
1569 {"TX SMIC MUX4", "SWR_DMIC5", "TX SWR_DMIC5"},
1570 {"TX SMIC MUX4", "SWR_DMIC6", "TX SWR_DMIC6"},
1571 {"TX SMIC MUX4", "SWR_DMIC7", "TX SWR_DMIC7"},
1573 {"TX DEC5 MUX", "SWR_MIC", "TX SMIC MUX5"},
1574 {"TX SMIC MUX5", NULL, "TX_SWR_CLK"},
1575 {"TX SMIC MUX5", "ADC0", "TX SWR_ADC0"},
1576 {"TX SMIC MUX5", "ADC1", "TX SWR_ADC1"},
1577 {"TX SMIC MUX5", "ADC2", "TX SWR_ADC2"},
1578 {"TX SMIC MUX5", "ADC3", "TX SWR_ADC3"},
1579 {"TX SMIC MUX5", "SWR_DMIC0", "TX SWR_DMIC0"},
1580 {"TX SMIC MUX5", "SWR_DMIC1", "TX SWR_DMIC1"},
1581 {"TX SMIC MUX5", "SWR_DMIC2", "TX SWR_DMIC2"},
1582 {"TX SMIC MUX5", "SWR_DMIC3", "TX SWR_DMIC3"},
1583 {"TX SMIC MUX5", "SWR_DMIC4", "TX SWR_DMIC4"},
1584 {"TX SMIC MUX5", "SWR_DMIC5", "TX SWR_DMIC5"},
1585 {"TX SMIC MUX5", "SWR_DMIC6", "TX SWR_DMIC6"},
1586 {"TX SMIC MUX5", "SWR_DMIC7", "TX SWR_DMIC7"},
1588 {"TX DEC6 MUX", "SWR_MIC", "TX SMIC MUX6"},
1589 {"TX SMIC MUX6", NULL, "TX_SWR_CLK"},
1590 {"TX SMIC MUX6", "ADC0", "TX SWR_ADC0"},
1591 {"TX SMIC MUX6", "ADC1", "TX SWR_ADC1"},
1592 {"TX SMIC MUX6", "ADC2", "TX SWR_ADC2"},
1593 {"TX SMIC MUX6", "ADC3", "TX SWR_ADC3"},
1594 {"TX SMIC MUX6", "SWR_DMIC0", "TX SWR_DMIC0"},
1595 {"TX SMIC MUX6", "SWR_DMIC1", "TX SWR_DMIC1"},
1596 {"TX SMIC MUX6", "SWR_DMIC2", "TX SWR_DMIC2"},
1597 {"TX SMIC MUX6", "SWR_DMIC3", "TX SWR_DMIC3"},
1598 {"TX SMIC MUX6", "SWR_DMIC4", "TX SWR_DMIC4"},
1599 {"TX SMIC MUX6", "SWR_DMIC5", "TX SWR_DMIC5"},
1600 {"TX SMIC MUX6", "SWR_DMIC6", "TX SWR_DMIC6"},
1601 {"TX SMIC MUX6", "SWR_DMIC7", "TX SWR_DMIC7"},
1603 {"TX DEC7 MUX", "SWR_MIC", "TX SMIC MUX7"},
1604 {"TX SMIC MUX7", NULL, "TX_SWR_CLK"},
1605 {"TX SMIC MUX7", "ADC0", "TX SWR_ADC0"},
1606 {"TX SMIC MUX7", "ADC1", "TX SWR_ADC1"},
1607 {"TX SMIC MUX7", "ADC2", "TX SWR_ADC2"},
1608 {"TX SMIC MUX7", "ADC3", "TX SWR_ADC3"},
1609 {"TX SMIC MUX7", "SWR_DMIC0", "TX SWR_DMIC0"},
1610 {"TX SMIC MUX7", "SWR_DMIC1", "TX SWR_DMIC1"},
1611 {"TX SMIC MUX7", "SWR_DMIC2", "TX SWR_DMIC2"},
1612 {"TX SMIC MUX7", "SWR_DMIC3", "TX SWR_DMIC3"},
1613 {"TX SMIC MUX7", "SWR_DMIC4", "TX SWR_DMIC4"},
1614 {"TX SMIC MUX7", "SWR_DMIC5", "TX SWR_DMIC5"},
1615 {"TX SMIC MUX7", "SWR_DMIC6", "TX SWR_DMIC6"},
1616 {"TX SMIC MUX7", "SWR_DMIC7", "TX SWR_DMIC7"},
1622 -84, 40, digital_gain),
1625 -84, 40, digital_gain),
1628 -84, 40, digital_gain),
1631 -84, 40, digital_gain),
1634 -84, 40, digital_gain),
1637 -84, 40, digital_gain),
1640 -84, 40, digital_gain),
1643 -84, 40, digital_gain),
1675 struct tx_macro *tx = snd_soc_component_get_drvdata(comp); in tx_macro_component_probe() local
1678 snd_soc_component_init_regmap(comp, tx->regmap); in tx_macro_component_probe()
1681 tx->tx_hpf_work[i].tx = tx; in tx_macro_component_probe()
1682 tx->tx_hpf_work[i].decimator = i; in tx_macro_component_probe()
1683 INIT_DELAYED_WORK(&tx->tx_hpf_work[i].dwork, in tx_macro_component_probe()
1688 tx->tx_mute_dwork[i].tx = tx; in tx_macro_component_probe()
1689 tx->tx_mute_dwork[i].decimator = i; in tx_macro_component_probe()
1690 INIT_DELAYED_WORK(&tx->tx_mute_dwork[i].dwork, in tx_macro_component_probe()
1693 tx->component = comp; in tx_macro_component_probe()
1706 struct tx_macro *tx = to_tx_macro(hw); in swclk_gate_enable() local
1707 struct regmap *regmap = tx->regmap; in swclk_gate_enable()
1710 ret = clk_prepare_enable(tx->mclk); in swclk_gate_enable()
1712 dev_err(tx->dev, "failed to enable mclk\n"); in swclk_gate_enable()
1716 tx_macro_mclk_enable(tx, true); in swclk_gate_enable()
1731 struct tx_macro *tx = to_tx_macro(hw); in swclk_gate_disable() local
1732 struct regmap *regmap = tx->regmap; in swclk_gate_disable()
1737 tx_macro_mclk_enable(tx, false); in swclk_gate_disable()
1738 clk_disable_unprepare(tx->mclk); in swclk_gate_disable()
1743 struct tx_macro *tx = to_tx_macro(hw); in swclk_gate_is_enabled() local
1746 regmap_read(tx->regmap, CDC_TX_CLK_RST_CTRL_SWR_CONTROL, &val); in swclk_gate_is_enabled()
1766 static int tx_macro_register_mclk_output(struct tx_macro *tx) in tx_macro_register_mclk_output() argument
1768 struct device *dev = tx->dev; in tx_macro_register_mclk_output()
1770 const char *clk_name = "lpass-tx-mclk"; in tx_macro_register_mclk_output()
1775 parent_clk_name = __clk_get_name(tx->npl); in tx_macro_register_mclk_output()
1782 tx->hw.init = &init; in tx_macro_register_mclk_output()
1783 hw = &tx->hw; in tx_macro_register_mclk_output()
1792 .name = "RX-MACRO",
1804 struct device *dev = &pdev->dev; in tx_macro_probe()
1805 struct device_node *np = dev->of_node; in tx_macro_probe()
1806 struct tx_macro *tx; in tx_macro_probe() local
1810 tx = devm_kzalloc(dev, sizeof(*tx), GFP_KERNEL); in tx_macro_probe()
1811 if (!tx) in tx_macro_probe()
1812 return -ENOMEM; in tx_macro_probe()
1814 tx->macro = devm_clk_get_optional(dev, "macro"); in tx_macro_probe()
1815 if (IS_ERR(tx->macro)) in tx_macro_probe()
1816 return PTR_ERR(tx->macro); in tx_macro_probe()
1818 tx->dcodec = devm_clk_get_optional(dev, "dcodec"); in tx_macro_probe()
1819 if (IS_ERR(tx->dcodec)) in tx_macro_probe()
1820 return PTR_ERR(tx->dcodec); in tx_macro_probe()
1822 tx->mclk = devm_clk_get(dev, "mclk"); in tx_macro_probe()
1823 if (IS_ERR(tx->mclk)) in tx_macro_probe()
1824 return PTR_ERR(tx->mclk); in tx_macro_probe()
1826 tx->npl = devm_clk_get(dev, "npl"); in tx_macro_probe()
1827 if (IS_ERR(tx->npl)) in tx_macro_probe()
1828 return PTR_ERR(tx->npl); in tx_macro_probe()
1830 tx->fsgen = devm_clk_get(dev, "fsgen"); in tx_macro_probe()
1831 if (IS_ERR(tx->fsgen)) in tx_macro_probe()
1832 return PTR_ERR(tx->fsgen); in tx_macro_probe()
1834 tx->pds = lpass_macro_pds_init(dev); in tx_macro_probe()
1835 if (IS_ERR(tx->pds)) in tx_macro_probe()
1836 return PTR_ERR(tx->pds); in tx_macro_probe()
1844 /* Update defaults for lpass sc7280 */ in tx_macro_probe()
1845 if (of_device_is_compatible(np, "qcom,sc7280-lpass-tx-macro")) { in tx_macro_probe()
1858 tx->regmap = devm_regmap_init_mmio(dev, base, &tx_regmap_config); in tx_macro_probe()
1859 if (IS_ERR(tx->regmap)) { in tx_macro_probe()
1860 ret = PTR_ERR(tx->regmap); in tx_macro_probe()
1864 dev_set_drvdata(dev, tx); in tx_macro_probe()
1866 tx->dev = dev; in tx_macro_probe()
1869 clk_set_rate(tx->mclk, MCLK_FREQ); in tx_macro_probe()
1870 clk_set_rate(tx->npl, 2 * MCLK_FREQ); in tx_macro_probe()
1872 ret = clk_prepare_enable(tx->macro); in tx_macro_probe()
1876 ret = clk_prepare_enable(tx->dcodec); in tx_macro_probe()
1880 ret = clk_prepare_enable(tx->mclk); in tx_macro_probe()
1884 ret = clk_prepare_enable(tx->npl); in tx_macro_probe()
1888 ret = clk_prepare_enable(tx->fsgen); in tx_macro_probe()
1892 ret = tx_macro_register_mclk_output(tx); in tx_macro_probe()
1911 clk_disable_unprepare(tx->fsgen); in tx_macro_probe()
1913 clk_disable_unprepare(tx->npl); in tx_macro_probe()
1915 clk_disable_unprepare(tx->mclk); in tx_macro_probe()
1917 clk_disable_unprepare(tx->dcodec); in tx_macro_probe()
1919 clk_disable_unprepare(tx->macro); in tx_macro_probe()
1921 lpass_macro_pds_exit(tx->pds); in tx_macro_probe()
1928 struct tx_macro *tx = dev_get_drvdata(&pdev->dev); in tx_macro_remove() local
1930 clk_disable_unprepare(tx->macro); in tx_macro_remove()
1931 clk_disable_unprepare(tx->dcodec); in tx_macro_remove()
1932 clk_disable_unprepare(tx->mclk); in tx_macro_remove()
1933 clk_disable_unprepare(tx->npl); in tx_macro_remove()
1934 clk_disable_unprepare(tx->fsgen); in tx_macro_remove()
1936 lpass_macro_pds_exit(tx->pds); in tx_macro_remove()
1943 struct tx_macro *tx = dev_get_drvdata(dev); in tx_macro_runtime_suspend() local
1945 regcache_cache_only(tx->regmap, true); in tx_macro_runtime_suspend()
1946 regcache_mark_dirty(tx->regmap); in tx_macro_runtime_suspend()
1948 clk_disable_unprepare(tx->mclk); in tx_macro_runtime_suspend()
1949 clk_disable_unprepare(tx->npl); in tx_macro_runtime_suspend()
1950 clk_disable_unprepare(tx->fsgen); in tx_macro_runtime_suspend()
1957 struct tx_macro *tx = dev_get_drvdata(dev); in tx_macro_runtime_resume() local
1960 ret = clk_prepare_enable(tx->mclk); in tx_macro_runtime_resume()
1966 ret = clk_prepare_enable(tx->npl); in tx_macro_runtime_resume()
1972 ret = clk_prepare_enable(tx->fsgen); in tx_macro_runtime_resume()
1978 regcache_cache_only(tx->regmap, false); in tx_macro_runtime_resume()
1979 regcache_sync(tx->regmap); in tx_macro_runtime_resume()
1983 clk_disable_unprepare(tx->npl); in tx_macro_runtime_resume()
1985 clk_disable_unprepare(tx->mclk); in tx_macro_runtime_resume()
1995 { .compatible = "qcom,sc7280-lpass-tx-macro" },
1996 { .compatible = "qcom,sm8250-lpass-tx-macro" },
1997 { .compatible = "qcom,sm8450-lpass-tx-macro" },
1998 { .compatible = "qcom,sc8280xp-lpass-tx-macro" },
2015 MODULE_DESCRIPTION("TX macro driver");