Lines Matching +full:sm8250 +full:- +full:lpass +full:- +full:tx +full:- +full:macro
1 // SPDX-License-Identifier: GPL-2.0-only
2 // Copyright (c) 2018-2020, The Linux Foundation. All rights reserved.
13 #include <sound/soc-dapm.h>
16 #include <linux/clk-provider.h>
18 #include "lpass-macro-common.h"
615 struct clk *macro; member
628 static const DECLARE_TLV_DB_SCALE(digital_gain, -8400, 100, -8400);
836 /* RX Macro */
1140 /* Update volatile list for rx/tx macros */ in rx_is_volatile_register()
1506 struct snd_soc_component *component = snd_soc_dapm_to_component(widget->dapm); in rx_macro_int_dem_inp_mux_put()
1507 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value; in rx_macro_int_dem_inp_mux_put()
1511 val = ucontrol->value.enumerated.item[0]; in rx_macro_int_dem_inp_mux_put()
1513 if (e->reg == CDC_RX_RX0_RX_PATH_CFG1) in rx_macro_int_dem_inp_mux_put()
1515 else if (e->reg == CDC_RX_RX1_RX_PATH_CFG1) in rx_macro_int_dem_inp_mux_put()
1546 struct snd_soc_component *component = dai->component; in rx_macro_set_prim_interpolator_rate()
1549 for_each_set_bit(port, &rx->active_ch_mask[dai->id], RX_MACRO_PORTS_MAX) { in rx_macro_set_prim_interpolator_rate()
1591 struct snd_soc_component *component = dai->component; in rx_macro_set_mix_interpolator_rate()
1594 for_each_set_bit(port, &rx->active_ch_mask[dai->id], RX_MACRO_PORTS_MAX) { in rx_macro_set_mix_interpolator_rate()
1637 struct snd_soc_component *component = dai->component; in rx_macro_hw_params()
1641 switch (substream->stream) { in rx_macro_hw_params()
1645 dev_err(component->dev, "%s: cannot set sample rate: %u\n", in rx_macro_hw_params()
1649 rx->bit_width[dai->id] = params_width(params); in rx_macro_hw_params()
1661 struct snd_soc_component *component = dai->component; in rx_macro_get_channel_map()
1665 switch (dai->id) { in rx_macro_get_channel_map()
1670 for_each_set_bit(temp, &rx->active_ch_mask[dai->id], in rx_macro_get_channel_map()
1677 * CDC_DMA_RX_0 port drives RX0/RX1 -- ch_mask 0x1/0x2/0x3 in rx_macro_get_channel_map()
1678 * CDC_DMA_RX_1 port drives RX2/RX3 -- ch_mask 0x1/0x2/0x3 in rx_macro_get_channel_map()
1679 * CDC_DMA_RX_2 port drives RX4 -- ch_mask 0x1 in rx_macro_get_channel_map()
1680 * CDC_DMA_RX_3 port drives RX5 -- ch_mask 0x1 in rx_macro_get_channel_map()
1691 *rx_num = rx->active_ch_cnt[dai->id]; in rx_macro_get_channel_map()
1713 dev_err(component->dev, "%s: Invalid AIF\n", __func__); in rx_macro_get_channel_map()
1721 struct snd_soc_component *component = dai->component; in rx_macro_digital_mute()
1726 switch (dai->id) { in rx_macro_digital_mute()
1856 struct regmap *regmap = rx->regmap; in rx_macro_mclk_enable()
1859 if (rx->rx_mclk_users == 0) { in rx_macro_mclk_enable()
1873 rx->rx_mclk_users++; in rx_macro_mclk_enable()
1875 if (rx->rx_mclk_users <= 0) { in rx_macro_mclk_enable()
1876 dev_err(rx->dev, "%s: clock already disabled\n", __func__); in rx_macro_mclk_enable()
1877 rx->rx_mclk_users = 0; in rx_macro_mclk_enable()
1880 rx->rx_mclk_users--; in rx_macro_mclk_enable()
1881 if (rx->rx_mclk_users == 0) { in rx_macro_mclk_enable()
1897 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); in rx_macro_mclk_event()
1909 dev_err(component->dev, "%s: invalid DAPM event %d\n", __func__, event); in rx_macro_mclk_event()
1910 ret = -EINVAL; in rx_macro_mclk_event()
1958 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); in rx_macro_enable_main_path()
1961 reg = CDC_RX_RXn_RX_PATH_CTL(w->shift); in rx_macro_enable_main_path()
1962 gain_reg = CDC_RX_RXn_RX_VOL_CTL(w->shift); in rx_macro_enable_main_path()
1966 rx_macro_enable_interp_clk(component, event, w->shift); in rx_macro_enable_main_path()
1967 if (rx_macro_adie_lb(component, w->shift)) in rx_macro_enable_main_path()
1977 rx_macro_enable_interp_clk(component, event, w->shift); in rx_macro_enable_main_path()
2011 if (!rx->comp_enabled[comp]) in rx_macro_config_compander()
2052 if (!rx->comp_enabled[comp]) in rx_macro_load_compander_coeff()
2066 hph_pwr_mode = rx->hph_pwr_mode; in rx_macro_load_compander_coeff()
2085 if (rx->softclip_clk_users == 0) in rx_macro_enable_softclip_clk()
2088 rx->softclip_clk_users++; in rx_macro_enable_softclip_clk()
2090 rx->softclip_clk_users--; in rx_macro_enable_softclip_clk()
2091 if (rx->softclip_clk_users == 0) in rx_macro_enable_softclip_clk()
2101 if (!rx->is_softclip_on) in rx_macro_config_softclip()
2126 if (!rx->is_aux_hpf_on) in rx_macro_config_aux_hpf()
2142 if ((enable && ++rx->clsh_users == 1) || (!enable && --rx->clsh_users == 0)) in rx_macro_enable_clsh_block()
2143 snd_soc_component_update_bits(rx->component, CDC_RX_CLSH_CRC, in rx_macro_enable_clsh_block()
2145 if (rx->clsh_users < 0) in rx_macro_enable_clsh_block()
2146 rx->clsh_users = 0; in rx_macro_enable_clsh_block()
2174 if (rx->is_ear_mode_on) in rx_macro_config_classh()
2190 if (rx->is_ear_mode_on) in rx_macro_config_classh()
2254 int comp = ((struct soc_mixer_control *) kcontrol->private_value)->shift; in rx_macro_get_compander()
2257 ucontrol->value.integer.value[0] = rx->comp_enabled[comp]; in rx_macro_get_compander()
2265 int comp = ((struct soc_mixer_control *) kcontrol->private_value)->shift; in rx_macro_set_compander()
2266 int value = ucontrol->value.integer.value[0]; in rx_macro_set_compander()
2269 rx->comp_enabled[comp] = value; in rx_macro_set_compander()
2278 struct snd_soc_component *component = snd_soc_dapm_to_component(widget->dapm); in rx_macro_mux_get()
2281 ucontrol->value.enumerated.item[0] = in rx_macro_mux_get()
2282 rx->rx_port_value[widget->shift]; in rx_macro_mux_get()
2290 struct snd_soc_component *component = snd_soc_dapm_to_component(widget->dapm); in rx_macro_mux_put()
2291 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value; in rx_macro_mux_put()
2293 u32 rx_port_value = ucontrol->value.enumerated.item[0]; in rx_macro_mux_put()
2297 aif_rst = rx->rx_port_value[widget->shift]; in rx_macro_mux_put()
2300 dev_err(component->dev, "%s:AIF reset already\n", __func__); in rx_macro_mux_put()
2304 dev_err(component->dev, "%s: Invalid AIF reset\n", __func__); in rx_macro_mux_put()
2308 rx->rx_port_value[widget->shift] = rx_port_value; in rx_macro_mux_put()
2312 if (rx->active_ch_cnt[aif_rst]) { in rx_macro_mux_put()
2313 clear_bit(widget->shift, in rx_macro_mux_put()
2314 &rx->active_ch_mask[aif_rst]); in rx_macro_mux_put()
2315 rx->active_ch_cnt[aif_rst]--; in rx_macro_mux_put()
2322 set_bit(widget->shift, in rx_macro_mux_put()
2323 &rx->active_ch_mask[rx_port_value]); in rx_macro_mux_put()
2324 rx->active_ch_cnt[rx_port_value]++; in rx_macro_mux_put()
2327 dev_err(component->dev, in rx_macro_mux_put()
2333 snd_soc_dapm_mux_update_power(widget->dapm, kcontrol, in rx_macro_mux_put()
2337 return -EINVAL; in rx_macro_mux_put()
2365 ucontrol->value.integer.value[0] = rx->is_ear_mode_on; in rx_macro_get_ear_mode()
2375 rx->is_ear_mode_on = (!ucontrol->value.integer.value[0] ? false : true); in rx_macro_put_ear_mode()
2385 ucontrol->value.integer.value[0] = rx->hph_hd2_mode; in rx_macro_get_hph_hd2_mode()
2395 rx->hph_hd2_mode = ucontrol->value.integer.value[0]; in rx_macro_put_hph_hd2_mode()
2405 ucontrol->value.enumerated.item[0] = rx->hph_pwr_mode; in rx_macro_get_hph_pwr_mode()
2415 rx->hph_pwr_mode = ucontrol->value.enumerated.item[0]; in rx_macro_put_hph_pwr_mode()
2425 ucontrol->value.integer.value[0] = rx->is_softclip_on; in rx_macro_soft_clip_enable_get()
2436 rx->is_softclip_on = ucontrol->value.integer.value[0]; in rx_macro_soft_clip_enable_put()
2447 ucontrol->value.integer.value[0] = rx->is_aux_hpf_on; in rx_macro_aux_hpf_mode_get()
2458 rx->is_aux_hpf_on = ucontrol->value.integer.value[0]; in rx_macro_aux_hpf_mode_put()
2480 return -EINVAL; in rx_macro_hphdelay_lutbypass()
2485 if (rx->is_ear_mode_on) in rx_macro_hphdelay_lutbypass()
2497 if (rx->hph_pwr_mode) in rx_macro_hphdelay_lutbypass()
2528 if (rx->main_clk_users[interp_idx] == 0) { in rx_macro_enable_interp_clk()
2537 if (rx->hph_hd2_mode) in rx_macro_enable_interp_clk()
2547 rx->main_clk_users[interp_idx]++; in rx_macro_enable_interp_clk()
2551 rx->main_clk_users[interp_idx]--; in rx_macro_enable_interp_clk()
2552 if (rx->main_clk_users[interp_idx] <= 0) { in rx_macro_enable_interp_clk()
2553 rx->main_clk_users[interp_idx] = 0; in rx_macro_enable_interp_clk()
2580 if (rx->hph_hd2_mode) in rx_macro_enable_interp_clk()
2585 return rx->main_clk_users[interp_idx]; in rx_macro_enable_interp_clk()
2591 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); in rx_macro_enable_mix_path()
2594 gain_reg = CDC_RX_RXn_RX_VOL_MIX_CTL(w->shift); in rx_macro_enable_mix_path()
2595 mix_reg = CDC_RX_RXn_RX_PATH_MIX_CTL(w->shift); in rx_macro_enable_mix_path()
2599 rx_macro_enable_interp_clk(component, event, w->shift); in rx_macro_enable_mix_path()
2609 rx_macro_enable_interp_clk(component, event, w->shift); in rx_macro_enable_mix_path()
2625 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); in rx_macro_enable_rx_path_clk()
2629 rx_macro_enable_interp_clk(component, event, w->shift); in rx_macro_enable_rx_path_clk()
2630 snd_soc_component_write_field(component, CDC_RX_RXn_RX_PATH_CFG1(w->shift), in rx_macro_enable_rx_path_clk()
2632 snd_soc_component_write_field(component, CDC_RX_RXn_RX_PATH_CTL(w->shift), in rx_macro_enable_rx_path_clk()
2636 snd_soc_component_write_field(component, CDC_RX_RXn_RX_PATH_CFG1(w->shift), in rx_macro_enable_rx_path_clk()
2638 rx_macro_enable_interp_clk(component, event, w->shift); in rx_macro_enable_rx_path_clk()
2649 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); in rx_macro_set_iir_gain()
2654 if (strnstr(w->name, "IIR0", sizeof("IIR0"))) { in rx_macro_set_iir_gain()
2736 /* Mask top 2 bits, 7-8 are reserved */ in set_iir_band_coeff()
2747 (struct wcd_iir_filter_ctl *)kcontrol->private_value; in rx_macro_put_iir_band_audio_mixer()
2748 struct soc_bytes_ext *params = &ctl->bytes_ext; in rx_macro_put_iir_band_audio_mixer()
2749 int iir_idx = ctl->iir_idx; in rx_macro_put_iir_band_audio_mixer()
2750 int band_idx = ctl->band_idx; in rx_macro_put_iir_band_audio_mixer()
2754 memcpy(&coeff[0], ucontrol->value.bytes.data, params->max); in rx_macro_put_iir_band_audio_mixer()
2776 (struct wcd_iir_filter_ctl *)kcontrol->private_value; in rx_macro_get_iir_band_audio_mixer()
2777 struct soc_bytes_ext *params = &ctl->bytes_ext; in rx_macro_get_iir_band_audio_mixer()
2778 int iir_idx = ctl->iir_idx; in rx_macro_get_iir_band_audio_mixer()
2779 int band_idx = ctl->band_idx; in rx_macro_get_iir_band_audio_mixer()
2788 memcpy(ucontrol->value.bytes.data, &coeff[0], params->max); in rx_macro_get_iir_band_audio_mixer()
2797 (struct wcd_iir_filter_ctl *)kcontrol->private_value; in rx_macro_iir_filter_info()
2798 struct soc_bytes_ext *params = &ctl->bytes_ext; in rx_macro_iir_filter_info()
2800 ucontrol->type = SNDRV_CTL_ELEM_TYPE_BYTES; in rx_macro_iir_filter_info()
2801 ucontrol->count = params->max; in rx_macro_iir_filter_info()
2808 -84, 40, digital_gain),
2810 -84, 40, digital_gain),
2812 -84, 40, digital_gain),
2814 -84, 40, digital_gain),
2816 -84, 40, digital_gain),
2818 -84, 40, digital_gain),
2842 CDC_RX_SIDETONE_IIR0_IIR_GAIN_B1_CTL, -84, 40,
2845 CDC_RX_SIDETONE_IIR0_IIR_GAIN_B2_CTL, -84, 40,
2848 CDC_RX_SIDETONE_IIR0_IIR_GAIN_B3_CTL, -84, 40,
2851 CDC_RX_SIDETONE_IIR0_IIR_GAIN_B4_CTL, -84, 40,
2854 CDC_RX_SIDETONE_IIR1_IIR_GAIN_B1_CTL, -84, 40,
2857 CDC_RX_SIDETONE_IIR1_IIR_GAIN_B2_CTL, -84, 40,
2860 CDC_RX_SIDETONE_IIR1_IIR_GAIN_B3_CTL, -84, 40,
2863 CDC_RX_SIDETONE_IIR1_IIR_GAIN_B4_CTL, -84, 40,
2905 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); in rx_macro_enable_echo()
2907 int ec_tx = -1; in rx_macro_enable_echo()
2911 if (!(strcmp(w->name, "RX MIX TX0 MUX"))) in rx_macro_enable_echo()
2912 ec_tx = ((val & 0xf0) >> 0x4) - 1; in rx_macro_enable_echo()
2913 else if (!(strcmp(w->name, "RX MIX TX1 MUX"))) in rx_macro_enable_echo()
2914 ec_tx = (val & 0x0f) - 1; in rx_macro_enable_echo()
2918 if (!(strcmp(w->name, "RX MIX TX2 MUX"))) in rx_macro_enable_echo()
2919 ec_tx = (val & 0x0f) - 1; in rx_macro_enable_echo()
2922 dev_err(component->dev, "%s: EC mix control not set correctly\n", in rx_macro_enable_echo()
2924 return -EINVAL; in rx_macro_enable_echo()
3406 snd_soc_component_init_regmap(component, rx->regmap); in rx_macro_component_probe()
3427 rx->component = component; in rx_macro_component_probe()
3437 ret = clk_prepare_enable(rx->mclk); in swclk_gate_enable()
3439 dev_err(rx->dev, "unable to prepare mclk\n"); in swclk_gate_enable()
3444 regmap_update_bits(rx->regmap, CDC_RX_CLK_RST_CTRL_SWR_CONTROL, in swclk_gate_enable()
3448 regmap_update_bits(rx->regmap, CDC_RX_CLK_RST_CTRL_SWR_CONTROL, in swclk_gate_enable()
3451 regmap_update_bits(rx->regmap, CDC_RX_CLK_RST_CTRL_SWR_CONTROL, in swclk_gate_enable()
3461 regmap_update_bits(rx->regmap, CDC_RX_CLK_RST_CTRL_SWR_CONTROL, in swclk_gate_disable()
3465 clk_disable_unprepare(rx->mclk); in swclk_gate_disable()
3473 regmap_read(rx->regmap, CDC_RX_CLK_RST_CTRL_SWR_CONTROL, &val); in swclk_gate_is_enabled()
3495 struct device *dev = rx->dev; in rx_macro_register_mclk_output()
3497 const char *clk_name = "lpass-rx-mclk"; in rx_macro_register_mclk_output()
3502 parent_clk_name = __clk_get_name(rx->npl); in rx_macro_register_mclk_output()
3509 rx->hw.init = &init; in rx_macro_register_mclk_output()
3510 hw = &rx->hw; in rx_macro_register_mclk_output()
3511 ret = devm_clk_hw_register(rx->dev, hw); in rx_macro_register_mclk_output()
3519 .name = "RX-MACRO",
3531 struct device *dev = &pdev->dev; in rx_macro_probe()
3538 return -ENOMEM; in rx_macro_probe()
3540 rx->macro = devm_clk_get_optional(dev, "macro"); in rx_macro_probe()
3541 if (IS_ERR(rx->macro)) in rx_macro_probe()
3542 return PTR_ERR(rx->macro); in rx_macro_probe()
3544 rx->dcodec = devm_clk_get_optional(dev, "dcodec"); in rx_macro_probe()
3545 if (IS_ERR(rx->dcodec)) in rx_macro_probe()
3546 return PTR_ERR(rx->dcodec); in rx_macro_probe()
3548 rx->mclk = devm_clk_get(dev, "mclk"); in rx_macro_probe()
3549 if (IS_ERR(rx->mclk)) in rx_macro_probe()
3550 return PTR_ERR(rx->mclk); in rx_macro_probe()
3552 rx->npl = devm_clk_get(dev, "npl"); in rx_macro_probe()
3553 if (IS_ERR(rx->npl)) in rx_macro_probe()
3554 return PTR_ERR(rx->npl); in rx_macro_probe()
3556 rx->fsgen = devm_clk_get(dev, "fsgen"); in rx_macro_probe()
3557 if (IS_ERR(rx->fsgen)) in rx_macro_probe()
3558 return PTR_ERR(rx->fsgen); in rx_macro_probe()
3560 rx->pds = lpass_macro_pds_init(dev); in rx_macro_probe()
3561 if (IS_ERR(rx->pds)) in rx_macro_probe()
3562 return PTR_ERR(rx->pds); in rx_macro_probe()
3570 rx->regmap = devm_regmap_init_mmio(dev, base, &rx_regmap_config); in rx_macro_probe()
3571 if (IS_ERR(rx->regmap)) { in rx_macro_probe()
3572 ret = PTR_ERR(rx->regmap); in rx_macro_probe()
3578 rx->dev = dev; in rx_macro_probe()
3581 clk_set_rate(rx->mclk, MCLK_FREQ); in rx_macro_probe()
3582 clk_set_rate(rx->npl, 2 * MCLK_FREQ); in rx_macro_probe()
3584 ret = clk_prepare_enable(rx->macro); in rx_macro_probe()
3588 ret = clk_prepare_enable(rx->dcodec); in rx_macro_probe()
3592 ret = clk_prepare_enable(rx->mclk); in rx_macro_probe()
3596 ret = clk_prepare_enable(rx->npl); in rx_macro_probe()
3600 ret = clk_prepare_enable(rx->fsgen); in rx_macro_probe()
3624 clk_disable_unprepare(rx->fsgen); in rx_macro_probe()
3626 clk_disable_unprepare(rx->npl); in rx_macro_probe()
3628 clk_disable_unprepare(rx->mclk); in rx_macro_probe()
3630 clk_disable_unprepare(rx->dcodec); in rx_macro_probe()
3632 clk_disable_unprepare(rx->macro); in rx_macro_probe()
3634 lpass_macro_pds_exit(rx->pds); in rx_macro_probe()
3641 struct rx_macro *rx = dev_get_drvdata(&pdev->dev); in rx_macro_remove()
3643 clk_disable_unprepare(rx->mclk); in rx_macro_remove()
3644 clk_disable_unprepare(rx->npl); in rx_macro_remove()
3645 clk_disable_unprepare(rx->fsgen); in rx_macro_remove()
3646 clk_disable_unprepare(rx->macro); in rx_macro_remove()
3647 clk_disable_unprepare(rx->dcodec); in rx_macro_remove()
3649 lpass_macro_pds_exit(rx->pds); in rx_macro_remove()
3655 { .compatible = "qcom,sc7280-lpass-rx-macro" },
3656 { .compatible = "qcom,sm8250-lpass-rx-macro" },
3657 { .compatible = "qcom,sm8450-lpass-rx-macro" },
3658 { .compatible = "qcom,sc8280xp-lpass-rx-macro" },
3667 regcache_cache_only(rx->regmap, true); in rx_macro_runtime_suspend()
3668 regcache_mark_dirty(rx->regmap); in rx_macro_runtime_suspend()
3670 clk_disable_unprepare(rx->mclk); in rx_macro_runtime_suspend()
3671 clk_disable_unprepare(rx->npl); in rx_macro_runtime_suspend()
3672 clk_disable_unprepare(rx->fsgen); in rx_macro_runtime_suspend()
3682 ret = clk_prepare_enable(rx->mclk); in rx_macro_runtime_resume()
3688 ret = clk_prepare_enable(rx->npl); in rx_macro_runtime_resume()
3694 ret = clk_prepare_enable(rx->fsgen); in rx_macro_runtime_resume()
3699 regcache_cache_only(rx->regmap, false); in rx_macro_runtime_resume()
3700 regcache_sync(rx->regmap); in rx_macro_runtime_resume()
3704 clk_disable_unprepare(rx->npl); in rx_macro_runtime_resume()
3706 clk_disable_unprepare(rx->mclk); in rx_macro_runtime_resume()
3728 MODULE_DESCRIPTION("RX macro driver");