Lines Matching full:rx2
631 "ZERO", "RX0", "RX1", "RX2", "RX3", "RX4", "RX5"
635 "ZERO", "DEC0", "DEC1", "IIR0", "IIR1", "RX0", "RX1", "RX2",
645 "RX0", "RX1", "RX2", "RX3", "RX4", "RX5"
1678 * CDC_DMA_RX_1 port drives RX2/RX3 -- ch_mask 0x1/0x2/0x3 in rx_macro_get_channel_map()
2957 SND_SOC_DAPM_MUX("RX_MACRO RX2 MUX", SND_SOC_NOPM, RX_MACRO_RX2, 0,
3096 {"RX_MACRO RX2 MUX", "AIF1_PB", "RX AIF1 PB"},
3103 {"RX_MACRO RX2 MUX", "AIF2_PB", "RX AIF2 PB"},
3110 {"RX_MACRO RX2 MUX", "AIF3_PB", "RX AIF3 PB"},
3117 {"RX_MACRO RX2 MUX", "AIF4_PB", "RX AIF4 PB"},
3124 {"RX_RX2", NULL, "RX_MACRO RX2 MUX"},
3131 {"RX INT0_1 MIX1 INP0", "RX2", "RX_RX2"},
3141 {"RX INT0_1 MIX1 INP1", "RX2", "RX_RX2"},
3151 {"RX INT0_1 MIX1 INP2", "RX2", "RX_RX2"},
3162 {"RX INT1_1 MIX1 INP0", "RX2", "RX_RX2"},
3172 {"RX INT1_1 MIX1 INP1", "RX2", "RX_RX2"},
3182 {"RX INT1_1 MIX1 INP2", "RX2", "RX_RX2"},
3193 {"RX INT2_1 MIX1 INP0", "RX2", "RX_RX2"},
3203 {"RX INT2_1 MIX1 INP1", "RX2", "RX_RX2"},
3213 {"RX INT2_1 MIX1 INP2", "RX2", "RX_RX2"},
3249 {"RX INT0_2 MUX", "RX2", "RX_RX2"},
3259 {"RX INT1_2 MUX", "RX2", "RX_RX2"},
3269 {"RX INT2_2 MUX", "RX2", "RX_RX2"},
3308 {"IIR0 INP0 MUX", "RX2", "RX_RX2"},
3319 {"IIR0 INP1 MUX", "RX2", "RX_RX2"},
3330 {"IIR0 INP2 MUX", "RX2", "RX_RX2"},
3341 {"IIR0 INP3 MUX", "RX2", "RX_RX2"},
3354 {"IIR1 INP0 MUX", "RX2", "RX_RX2"},
3365 {"IIR1 INP1 MUX", "RX2", "RX_RX2"},
3376 {"IIR1 INP2 MUX", "RX2", "RX_RX2"},
3387 {"IIR1 INP3 MUX", "RX2", "RX_RX2"},