Lines Matching full:rx0
631 "ZERO", "RX0", "RX1", "RX2", "RX3", "RX4", "RX5"
635 "ZERO", "DEC0", "DEC1", "IIR0", "IIR1", "RX0", "RX1", "RX2",
645 "RX0", "RX1", "RX2", "RX3", "RX4", "RX5"
1677 * CDC_DMA_RX_0 port drives RX0/RX1 -- ch_mask 0x1/0x2/0x3 in rx_macro_get_channel_map()
2953 SND_SOC_DAPM_MUX("RX_MACRO RX0 MUX", SND_SOC_NOPM, RX_MACRO_RX0, 0,
3094 {"RX_MACRO RX0 MUX", "AIF1_PB", "RX AIF1 PB"},
3101 {"RX_MACRO RX0 MUX", "AIF2_PB", "RX AIF2 PB"},
3108 {"RX_MACRO RX0 MUX", "AIF3_PB", "RX AIF3 PB"},
3115 {"RX_MACRO RX0 MUX", "AIF4_PB", "RX AIF4 PB"},
3122 {"RX_RX0", NULL, "RX_MACRO RX0 MUX"},
3129 {"RX INT0_1 MIX1 INP0", "RX0", "RX_RX0"},
3139 {"RX INT0_1 MIX1 INP1", "RX0", "RX_RX0"},
3149 {"RX INT0_1 MIX1 INP2", "RX0", "RX_RX0"},
3160 {"RX INT1_1 MIX1 INP0", "RX0", "RX_RX0"},
3170 {"RX INT1_1 MIX1 INP1", "RX0", "RX_RX0"},
3180 {"RX INT1_1 MIX1 INP2", "RX0", "RX_RX0"},
3191 {"RX INT2_1 MIX1 INP0", "RX0", "RX_RX0"},
3201 {"RX INT2_1 MIX1 INP1", "RX0", "RX_RX0"},
3211 {"RX INT2_1 MIX1 INP2", "RX0", "RX_RX0"},
3247 {"RX INT0_2 MUX", "RX0", "RX_RX0"},
3257 {"RX INT1_2 MUX", "RX0", "RX_RX0"},
3267 {"RX INT2_2 MUX", "RX0", "RX_RX0"},
3306 {"IIR0 INP0 MUX", "RX0", "RX_RX0"},
3317 {"IIR0 INP1 MUX", "RX0", "RX_RX0"},
3328 {"IIR0 INP2 MUX", "RX0", "RX_RX0"},
3339 {"IIR0 INP3 MUX", "RX0", "RX_RX0"},
3352 {"IIR1 INP0 MUX", "RX0", "RX_RX0"},
3363 {"IIR1 INP1 MUX", "RX0", "RX_RX0"},
3374 {"IIR1 INP2 MUX", "RX0", "RX_RX0"},
3385 {"IIR1 INP3 MUX", "RX0", "RX_RX0"},