Lines Matching refs:regmap_write
399 regmap_write(es8326->regmap, ES8326_CLK_DIV1, in es8326_pcm_hw_params()
401 regmap_write(es8326->regmap, ES8326_CLK_DIV2, in es8326_pcm_hw_params()
403 regmap_write(es8326->regmap, ES8326_CLK_DLL, in es8326_pcm_hw_params()
405 regmap_write(es8326->regmap, ES8326_CLK_MUX, in es8326_pcm_hw_params()
407 regmap_write(es8326->regmap, ES8326_CLK_ADC_SEL, in es8326_pcm_hw_params()
409 regmap_write(es8326->regmap, ES8326_CLK_DAC_SEL, in es8326_pcm_hw_params()
411 regmap_write(es8326->regmap, ES8326_CLK_ADC_OSR, in es8326_pcm_hw_params()
413 regmap_write(es8326->regmap, ES8326_CLK_DAC_OSR, in es8326_pcm_hw_params()
433 regmap_write(es8326->regmap, ES8326_RESET, ES8326_PWRUP_SEQ_EN); in es8326_set_bias_level()
434 regmap_write(es8326->regmap, ES8326_INTOUT_IO, 0x45); in es8326_set_bias_level()
435 regmap_write(es8326->regmap, ES8326_SDINOUT1_IO, in es8326_set_bias_level()
437 regmap_write(es8326->regmap, ES8326_SDINOUT23_IO, ES8326_IO_INPUT); in es8326_set_bias_level()
438 regmap_write(es8326->regmap, ES8326_CLK_RESAMPLE, 0x05); in es8326_set_bias_level()
439 regmap_write(es8326->regmap, ES8326_VMIDSEL, 0x02); in es8326_set_bias_level()
440 regmap_write(es8326->regmap, ES8326_PGA_PDN, 0x40); in es8326_set_bias_level()
441 regmap_write(es8326->regmap, ES8326_DAC2HPMIX, 0xAA); in es8326_set_bias_level()
442 regmap_write(es8326->regmap, ES8326_RESET, ES8326_CSM_ON); in es8326_set_bias_level()
450 regmap_write(es8326->regmap, ES8326_DAC2HPMIX, 0x11); in es8326_set_bias_level()
451 regmap_write(es8326->regmap, ES8326_RESET, ES8326_CSM_OFF); in es8326_set_bias_level()
452 regmap_write(es8326->regmap, ES8326_PGA_PDN, 0xF8); in es8326_set_bias_level()
453 regmap_write(es8326->regmap, ES8326_VMIDSEL, 0x00); in es8326_set_bias_level()
454 regmap_write(es8326->regmap, ES8326_INT_SOURCE, 0x08); in es8326_set_bias_level()
455 regmap_write(es8326->regmap, ES8326_SDINOUT1_IO, ES8326_IO_INPUT); in es8326_set_bias_level()
456 regmap_write(es8326->regmap, ES8326_SDINOUT23_IO, ES8326_IO_INPUT); in es8326_set_bias_level()
457 regmap_write(es8326->regmap, ES8326_RESET, in es8326_set_bias_level()
654 regmap_write(es8326->regmap, ES8326_CLK_CTL, ES8326_CLK_ON); in es8326_resume()
656 regmap_write(es8326->regmap, ES8326_PULLUP_CTL, 0x02); in es8326_resume()
657 regmap_write(es8326->regmap, ES8326_CLK_INV, 0x00); in es8326_resume()
658 regmap_write(es8326->regmap, ES8326_CLK_DIV_CPC, 0x1F); in es8326_resume()
659 regmap_write(es8326->regmap, ES8326_CLK_VMIDS1, 0xC8); in es8326_resume()
660 regmap_write(es8326->regmap, ES8326_CLK_VMIDS2, 0x88); in es8326_resume()
661 regmap_write(es8326->regmap, ES8326_CLK_CAL_TIME, 0x20); in es8326_resume()
662 regmap_write(es8326->regmap, ES8326_SYS_BIAS, 0x08); in es8326_resume()
663 regmap_write(es8326->regmap, ES8326_DAC2HPMIX, 0x22); in es8326_resume()
664 regmap_write(es8326->regmap, ES8326_ADC1_SRC, es8326->mic1_src); in es8326_resume()
665 regmap_write(es8326->regmap, ES8326_ADC2_SRC, es8326->mic2_src); in es8326_resume()
666 regmap_write(es8326->regmap, ES8326_HPJACK_TIMER, 0x88); in es8326_resume()
667 regmap_write(es8326->regmap, ES8326_HP_DET, in es8326_resume()
669 regmap_write(es8326->regmap, ES8326_INT_SOURCE, es8326->interrupt_src); in es8326_resume()
670 regmap_write(es8326->regmap, ES8326_INTOUT_IO, es8326->interrupt_clk); in es8326_resume()
671 regmap_write(es8326->regmap, ES8326_RESET, ES8326_CSM_ON); in es8326_resume()
677 regmap_write(es8326->regmap, ES8326_ANA_MICBIAS, 0xDD); in es8326_resume()
678 regmap_write(es8326->regmap, ES8326_ANA_VSEL, 0x7F); in es8326_resume()
679 regmap_write(es8326->regmap, ES8326_VMIDLOW, 0x0F); in es8326_resume()
681 regmap_write(es8326->regmap, ES8326_HP_DRIVER, 0xA0); in es8326_resume()
695 regmap_write(es8326->regmap, ES8326_CLK_CTL, ES8326_CLK_OFF); in es8326_suspend()