1 // SPDX-License-Identifier: GPL-2.0-only
6  * Author: Lars-Peter Clausen <lars@metafoo.de>
25 #include "adau-utils.h"
127 static const DECLARE_TLV_DB_MINMAX(adau1372_digital_tlv, -9563, 0);
128 static const DECLARE_TLV_DB_SCALE(adau1372_pga_tlv, -1200, 75, 0);
191 	SOC_ENUM("ADC 0+1 High-Pass-Filter", adau1372_hpf0_1_enum),
192 	SOC_ENUM("ADC 2+3 High-Pass-Filter", adau1372_hpf2_3_enum),
269 	SOC_DAPM_ENUM("Output ASRC0 Capture Mux", adau1372_asrco0_mux_enum);
271 	SOC_DAPM_ENUM("Output ASRC1 Capture Mux", adau1372_asrco1_mux_enum);
273 	SOC_DAPM_ENUM("Output ASRC2 Capture Mux", adau1372_asrco2_mux_enum);
275 	SOC_DAPM_ENUM("Output ASRC3 Capture Mux", adau1372_asrco3_mux_enum);
282 	"Output ASRC0",
283 	"Output ASRC1",
284 	"Output ASRC2",
285 	"Output ASRC3",
286 	"Serial Input 0",
287 	"Serial Input 1",
288 	"Serial Input 2",
289 	"Serial Input 3",
290 	"Serial Input 4",
291 	"Serial Input 5",
292 	"Serial Input 6",
293 	"Serial Input 7",
314 	SOC_DAPM_ENUM("Serial Output 0 Capture Mux", adau1372_sout0_mux_enum);
316 	SOC_DAPM_ENUM("Serial Output 1 Capture Mux", adau1372_sout1_mux_enum);
318 	SOC_DAPM_ENUM("Serial Output 2 Capture Mux", adau1372_sout2_mux_enum);
320 	SOC_DAPM_ENUM("Serial Output 3 Capture Mux", adau1372_sout3_mux_enum);
322 	SOC_DAPM_ENUM("Serial Output 4 Capture Mux", adau1372_sout4_mux_enum);
324 	SOC_DAPM_ENUM("Serial Output 5 Capture Mux", adau1372_sout5_mux_enum);
326 	SOC_DAPM_ENUM("Serial Output 6 Capture Mux", adau1372_sout6_mux_enum);
328 	SOC_DAPM_ENUM("Serial Output 7 Capture Mux", adau1372_sout7_mux_enum);
331 	"Serial Input 0+1",
332 	"Serial Input 2+3",
333 	"Serial Input 4+5",
334 	"Serial Input 6+7",
386 	SND_SOC_DAPM_SUPPLY("Output ASRC0 Decimator", ADAU1372_REG_DECIM_PWR, 4, 0, NULL, 0),
387 	SND_SOC_DAPM_SUPPLY("Output ASRC1 Decimator", ADAU1372_REG_DECIM_PWR, 5, 0, NULL, 0),
388 	SND_SOC_DAPM_SUPPLY("Output ASRC2 Decimator", ADAU1372_REG_DECIM_PWR, 6, 0, NULL, 0),
389 	SND_SOC_DAPM_SUPPLY("Output ASRC3 Decimator", ADAU1372_REG_DECIM_PWR, 7, 0, NULL, 0),
396 	SND_SOC_DAPM_MUX("Output ASRC0 Mux", SND_SOC_NOPM, 0, 0, &adau1372_asrco0_mux_control),
397 	SND_SOC_DAPM_MUX("Output ASRC1 Mux", SND_SOC_NOPM, 0, 0, &adau1372_asrco1_mux_control),
398 	SND_SOC_DAPM_MUX("Output ASRC2 Mux", SND_SOC_NOPM, 0, 0, &adau1372_asrco2_mux_control),
399 	SND_SOC_DAPM_MUX("Output ASRC3 Mux", SND_SOC_NOPM, 0, 0, &adau1372_asrco3_mux_control),
400 	SND_SOC_DAPM_MUX("Serial Output 0 Capture Mux", SND_SOC_NOPM, 0, 0,
402 	SND_SOC_DAPM_MUX("Serial Output 1 Capture Mux", SND_SOC_NOPM, 0, 0,
404 	SND_SOC_DAPM_MUX("Serial Output 2 Capture Mux", SND_SOC_NOPM, 0, 0,
406 	SND_SOC_DAPM_MUX("Serial Output 3 Capture Mux", SND_SOC_NOPM, 0, 0,
408 	SND_SOC_DAPM_MUX("Serial Output 4 Capture Mux", SND_SOC_NOPM, 0, 0,
410 	SND_SOC_DAPM_MUX("Serial Output 5 Capture Mux", SND_SOC_NOPM, 0, 0,
412 	SND_SOC_DAPM_MUX("Serial Output 6 Capture Mux", SND_SOC_NOPM, 0, 0,
414 	SND_SOC_DAPM_MUX("Serial Output 7 Capture Mux", SND_SOC_NOPM, 0, 0,
417 	SND_SOC_DAPM_AIF_IN("Serial Input 0", NULL, 0, SND_SOC_NOPM, 0, 0),
418 	SND_SOC_DAPM_AIF_IN("Serial Input 1", NULL, 1, SND_SOC_NOPM, 0, 0),
419 	SND_SOC_DAPM_AIF_IN("Serial Input 2", NULL, 2, SND_SOC_NOPM, 0, 0),
420 	SND_SOC_DAPM_AIF_IN("Serial Input 3", NULL, 3, SND_SOC_NOPM, 0, 0),
421 	SND_SOC_DAPM_AIF_IN("Serial Input 4", NULL, 4, SND_SOC_NOPM, 0, 0),
422 	SND_SOC_DAPM_AIF_IN("Serial Input 5", NULL, 5, SND_SOC_NOPM, 0, 0),
423 	SND_SOC_DAPM_AIF_IN("Serial Input 6", NULL, 6, SND_SOC_NOPM, 0, 0),
424 	SND_SOC_DAPM_AIF_IN("Serial Input 7", NULL, 7, SND_SOC_NOPM, 0, 0),
426 	SND_SOC_DAPM_AIF_OUT("Serial Output 0", NULL, 0, SND_SOC_NOPM, 0, 0),
427 	SND_SOC_DAPM_AIF_OUT("Serial Output 1", NULL, 1, SND_SOC_NOPM, 0, 0),
428 	SND_SOC_DAPM_AIF_OUT("Serial Output 2", NULL, 2, SND_SOC_NOPM, 0, 0),
429 	SND_SOC_DAPM_AIF_OUT("Serial Output 3", NULL, 3, SND_SOC_NOPM, 0, 0),
430 	SND_SOC_DAPM_AIF_OUT("Serial Output 4", NULL, 4, SND_SOC_NOPM, 0, 0),
431 	SND_SOC_DAPM_AIF_OUT("Serial Output 5", NULL, 5, SND_SOC_NOPM, 0, 0),
432 	SND_SOC_DAPM_AIF_OUT("Serial Output 6", NULL, 6, SND_SOC_NOPM, 0, 0),
433 	SND_SOC_DAPM_AIF_OUT("Serial Output 7", NULL, 7, SND_SOC_NOPM, 0, 0),
435 	SND_SOC_DAPM_SUPPLY("Output ASRC Supply", ADAU1372_REG_ASRC_MODE, 1, 0, NULL, 0),
462 	{ "Serial Output " #x " Capture Mux", "Output ASRC0", "Output ASRC0 Mux" }, \
463 	{ "Serial Output " #x " Capture Mux", "Output ASRC1", "Output ASRC1 Mux" }, \
464 	{ "Serial Output " #x " Capture Mux", "Output ASRC2", "Output ASRC2 Mux" }, \
465 	{ "Serial Output " #x " Capture Mux", "Output ASRC3", "Output ASRC3 Mux" }, \
466 	{ "Serial Output " #x " Capture Mux", "Serial Input 0", "Serial Input 0" }, \
467 	{ "Serial Output " #x " Capture Mux", "Serial Input 1", "Serial Input 1" }, \
468 	{ "Serial Output " #x " Capture Mux", "Serial Input 2", "Serial Input 2" }, \
469 	{ "Serial Output " #x " Capture Mux", "Serial Input 3", "Serial Input 3" }, \
470 	{ "Serial Output " #x " Capture Mux", "Serial Input 4", "Serial Input 4" }, \
471 	{ "Serial Output " #x " Capture Mux", "Serial Input 5", "Serial Input 5" }, \
472 	{ "Serial Output " #x " Capture Mux", "Serial Input 6", "Serial Input 6" }, \
473 	{ "Serial Output " #x " Capture Mux", "Serial Input 7", "Serial Input 7" }, \
474 	{ "Serial Output " #x, NULL, "Serial Output " #x " Capture Mux" }, \
475 	{ "Capture", NULL, "Serial Output " #x }
478 	{ "Output ASRC" #x " Mux", "Decimator0", "Decimator0 Mux" }, \
479 	{ "Output ASRC" #x " Mux", "Decimator1", "Decimator1 Mux" }, \
480 	{ "Output ASRC" #x " Mux", "Decimator2", "Decimator2 Mux" }, \
481 	{ "Output ASRC" #x " Mux", "Decimator3", "Decimator3 Mux" }
509 	{ "Output ASRC0 Mux", NULL, "Output ASRC Supply" },
510 	{ "Output ASRC1 Mux", NULL, "Output ASRC Supply" },
511 	{ "Output ASRC2 Mux", NULL, "Output ASRC Supply" },
512 	{ "Output ASRC3 Mux", NULL, "Output ASRC Supply" },
513 	{ "Output ASRC0 Mux", NULL, "Output ASRC0 Decimator" },
514 	{ "Output ASRC1 Mux", NULL, "Output ASRC1 Decimator" },
515 	{ "Output ASRC2 Mux", NULL, "Output ASRC2 Decimator" },
516 	{ "Output ASRC3 Mux", NULL, "Output ASRC3 Decimator" },
532 	{ "Serial Input 0", NULL, "Playback" },
533 	{ "Serial Input 1", NULL, "Playback" },
534 	{ "Serial Input 2", NULL, "Playback" },
535 	{ "Serial Input 3", NULL, "Playback" },
536 	{ "Serial Input 4", NULL, "Playback" },
537 	{ "Serial Input 5", NULL, "Playback" },
538 	{ "Serial Input 6", NULL, "Playback" },
539 	{ "Serial Input 7", NULL, "Playback" },
541 	{ "Input ASRC0 Mux", "Serial Input 0+1", "Serial Input 0" },
542 	{ "Input ASRC1 Mux", "Serial Input 0+1", "Serial Input 1" },
543 	{ "Input ASRC0 Mux", "Serial Input 2+3", "Serial Input 2" },
544 	{ "Input ASRC1 Mux", "Serial Input 2+3", "Serial Input 3" },
545 	{ "Input ASRC0 Mux", "Serial Input 4+5", "Serial Input 4" },
546 	{ "Input ASRC1 Mux", "Serial Input 4+5", "Serial Input 5" },
547 	{ "Input ASRC0 Mux", "Serial Input 6+7", "Serial Input 6" },
548 	{ "Input ASRC1 Mux", "Serial Input 6+7", "Serial Input 7" },
583 		adau1372->clock_provider = true;  in adau1372_set_dai_fmt()
587 		adau1372->clock_provider = false;  in adau1372_set_dai_fmt()
590 		return -EINVAL;  in adau1372_set_dai_fmt()
631 	regmap_update_bits(adau1372->regmap, ADAU1372_REG_SAI0, ADAU1372_SAI0_DELAY_MASK, sai0);  in adau1372_set_dai_fmt()
632 	regmap_update_bits(adau1372->regmap, ADAU1372_REG_SAI1,  in adau1372_set_dai_fmt()
654 		return -EINVAL;  in adau1372_hw_params()
658 	slot_width = adau1372->slot_width;  in adau1372_hw_params()
670 		return -EINVAL;  in adau1372_hw_params()
673 	regmap_update_bits(adau1372->regmap, ADAU1372_REG_SAI0, ADAU1372_SAI0_FS_MASK, sai0);  in adau1372_hw_params()
674 	regmap_update_bits(adau1372->regmap, ADAU1372_REG_SAI1, ADAU1372_SAI1_BCLKRATE, sai1);  in adau1372_hw_params()
688 		regmap_update_bits(adau1372->regmap, ADAU1372_REG_SAI0,  in adau1372_set_tdm_slot()
690 		adau1372->rate_constraints.mask = ADAU1372_RATE_MASK_TDM2;  in adau1372_set_tdm_slot()
691 		adau1372->slot_width = 0;  in adau1372_set_tdm_slot()
697 		return -EINVAL;  in adau1372_set_tdm_slot()
707 		return -EINVAL;  in adau1372_set_tdm_slot()
713 		adau1372->rate_constraints.mask = ADAU1372_RATE_MASK_TDM2;  in adau1372_set_tdm_slot()
717 		if (adau1372->clock_provider)  in adau1372_set_tdm_slot()
718 			adau1372->rate_constraints.mask = ADAU1372_RATE_MASK_TDM4_MASTER;  in adau1372_set_tdm_slot()
720 			adau1372->rate_constraints.mask = ADAU1372_RATE_MASK_TDM4;  in adau1372_set_tdm_slot()
724 		adau1372->rate_constraints.mask = ADAU1372_RATE_MASK_TDM8;  in adau1372_set_tdm_slot()
727 		return -EINVAL;  in adau1372_set_tdm_slot()
730 	adau1372->slot_width = width;  in adau1372_set_tdm_slot()
732 	regmap_update_bits(adau1372->regmap, ADAU1372_REG_SAI0, ADAU1372_SAI0_SAI_MASK, sai0);  in adau1372_set_tdm_slot()
733 	regmap_update_bits(adau1372->regmap, ADAU1372_REG_SAI1, ADAU1372_SAI1_BCLK_TDMC, sai1);  in adau1372_set_tdm_slot()
736 	regmap_write(adau1372->regmap, ADAU1372_REG_SOUT_CTRL, ~tx_mask);  in adau1372_set_tdm_slot()
751 	return regmap_update_bits(adau1372->regmap, ADAU1372_REG_SAI1, ADAU1372_SAI1_TDM_TS, sai1);  in adau1372_set_tristate()
758 	snd_pcm_hw_constraint_list(substream->runtime, 0, SNDRV_PCM_HW_PARAM_RATE,  in adau1372_startup()
759 				   &adau1372->rate_constraints);  in adau1372_startup()
769 	regmap_update_bits(adau1372->regmap, ADAU1372_REG_CLK_CTRL,  in adau1372_enable_pll()
774 		ret = regmap_read(adau1372->regmap, ADAU1372_REG_PLL(5), &val);  in adau1372_enable_pll()
781 		dev_err(adau1372->dev, "Failed to lock PLL\n");  in adau1372_enable_pll()
786 	if (adau1372->enabled == enable)  in adau1372_set_power()
792 		clk_prepare_enable(adau1372->mclk);  in adau1372_set_power()
793 		if (adau1372->pd_gpio)  in adau1372_set_power()
794 			gpiod_set_value(adau1372->pd_gpio, 0);  in adau1372_set_power()
796 		if (adau1372->switch_mode)  in adau1372_set_power()
797 			adau1372->switch_mode(adau1372->dev);  in adau1372_set_power()
799 		regcache_cache_only(adau1372->regmap, false);  in adau1372_set_power()
805 		if (adau1372->use_pll) {  in adau1372_set_power()
810 		regmap_update_bits(adau1372->regmap, ADAU1372_REG_CLK_CTRL,  in adau1372_set_power()
812 		regcache_sync(adau1372->regmap);  in adau1372_set_power()
814 		if (adau1372->pd_gpio) {  in adau1372_set_power()
820 			gpiod_set_value(adau1372->pd_gpio, 1);  in adau1372_set_power()
821 			regcache_mark_dirty(adau1372->regmap);  in adau1372_set_power()
823 			regmap_update_bits(adau1372->regmap, ADAU1372_REG_CLK_CTRL,  in adau1372_set_power()
826 		clk_disable_unprepare(adau1372->mclk);  in adau1372_set_power()
827 		regcache_cache_only(adau1372->regmap, true);  in adau1372_set_power()
830 	adau1372->enabled = enable;  in adau1372_set_power()
908 		regmap_write(adau1372->regmap, ADAU1372_REG_PLL(i), regs[i]);  in adau1372_setup_pll()
926 		return -ENOMEM;  in adau1372_probe()
928 	adau1372->clk = devm_clk_get(dev, "mclk");  in adau1372_probe()
929 	if (IS_ERR(adau1372->clk))  in adau1372_probe()
930 		return PTR_ERR(adau1372->clk);  in adau1372_probe()
932 	adau1372->pd_gpio = devm_gpiod_get_optional(dev, "powerdown", GPIOD_OUT_HIGH);  in adau1372_probe()
933 	if (IS_ERR(adau1372->pd_gpio))  in adau1372_probe()
934 		return PTR_ERR(adau1372->pd_gpio);  in adau1372_probe()
936 	adau1372->regmap = regmap;  in adau1372_probe()
937 	adau1372->switch_mode = switch_mode;  in adau1372_probe()
938 	adau1372->dev = dev;  in adau1372_probe()
939 	adau1372->rate_constraints.list = adau1372_rates;  in adau1372_probe()
940 	adau1372->rate_constraints.count = ARRAY_SIZE(adau1372_rates);  in adau1372_probe()
941 	adau1372->rate_constraints.mask = ADAU1372_RATE_MASK_TDM2;  in adau1372_probe()
950 	rate = clk_get_rate(adau1372->clk);  in adau1372_probe()
964 		adau1372->use_pll = true;  in adau1372_probe()
977 	 * No pinctrl support yet, put the multi-purpose pins in the most  in adau1372_probe()
1062 MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");