Lines Matching +full:0 +full:xc0800000
37 #define FLOAT_ZERO 0x00000000
38 #define FLOAT_ONE 0x3f800000
39 #define FLOAT_TWO 0x40000000
40 #define FLOAT_THREE 0x40400000
41 #define FLOAT_FIVE 0x40a00000
42 #define FLOAT_SIX 0x40c00000
43 #define FLOAT_EIGHT 0x41000000
44 #define FLOAT_MINUS_5 0xc0a00000
46 #define UNSOL_TAG_DSP 0x16
55 #define MASTERCONTROL 0x80
59 #define WIDGET_CHIP_CTRL 0x15
60 #define WIDGET_DSP_CTRL 0x16
70 #define SCP_SET 0
107 #define VNODE_START_NID 0x80
117 #define EFFECT_START_NID 0x90
170 #define DSP_CAPTURE_INIT_LATENCY 0
181 int direct; /* 0:output; 1:input*/
187 #define EFX_DIR_OUT 0
193 .mid = 0x96,
194 .reqs = {0, 1},
197 .def_vals = {0x3F800000, 0x3F2B851F}
201 .mid = 0x96,
205 .def_vals = {0x3F800000, 0x3F266666}
209 .mid = 0x96,
213 .def_vals = {0x00000000, 0x3F000000}
217 .mid = 0x96,
221 .def_vals = {0x3F800000, 0x3F3D70A4, 0x00000000}
225 .mid = 0x96,
229 .def_vals = {0x3F800000, 0x42A00000, 0x3F000000}
233 .mid = 0x96,
238 .def_vals = {0x00000000, 0x00000000, 0x00000000, 0x00000000,
239 0x00000000, 0x00000000, 0x00000000, 0x00000000,
240 0x00000000, 0x00000000, 0x00000000, 0x00000000}
244 .mid = 0x95,
245 .reqs = {0, 1, 2, 3},
248 .def_vals = {0x00000000, 0x3F3A9692, 0x00000000, 0x00000000}
252 .mid = 0x95,
256 .def_vals = {0x3F800000, 0x3D7DF3B6, 0x41F00000, 0x41F00000}
260 .mid = 0x95,
264 .def_vals = {0x00000000, 0x3F3D70A4}
268 .mid = 0x95,
272 .def_vals = {0x3F800000, 0x3F000000}
276 .mid = 0x95,
280 .def_vals = {0x00000000, 0x43C80000, 0x44AF0000, 0x44FA0000,
281 0x3F800000, 0x3F800000, 0x3F800000, 0x00000000,
282 0x00000000}
290 #define TUNING_CTL_START_NID 0xC0
313 int direct; /* 0:output; 1:input*/
321 .mid = 0x95,
324 .def_val = 0x41F00000
329 .mid = 0x95,
332 .def_val = 0x3F3D70A4
337 .mid = 0x96,
340 .def_val = 0x00000000
345 .mid = 0x96,
348 .def_val = 0x00000000
353 .mid = 0x96,
356 .def_val = 0x00000000
361 .mid = 0x96,
364 .def_val = 0x00000000
369 .mid = 0x96,
372 .def_val = 0x00000000
377 .mid = 0x96,
380 .def_val = 0x00000000
385 .mid = 0x96,
388 .def_val = 0x00000000
393 .mid = 0x96,
396 .def_val = 0x00000000
401 .mid = 0x96,
404 .def_val = 0x00000000
409 .mid = 0x96,
412 .def_val = 0x00000000
435 .mid = 0x95,
441 .vals = { 0x00000000, 0x43C80000, 0x44AF0000,
442 0x44FA0000, 0x3F800000, 0x3F800000,
443 0x3F800000, 0x00000000, 0x00000000 }
446 .vals = { 0x3F800000, 0x43C80000, 0x44AF0000,
447 0x44FA0000, 0x3F19999A, 0x3F866666,
448 0x3F800000, 0x00000000, 0x00000000 }
451 .vals = { 0x3F800000, 0x43C80000, 0x44AF0000,
452 0x450AC000, 0x4017AE14, 0x3F6B851F,
453 0x3F800000, 0x00000000, 0x00000000 }
456 .vals = { 0x3F800000, 0x43C80000, 0x44AF0000,
457 0x44FA0000, 0x40400000, 0x3F28F5C3,
458 0x3F800000, 0x00000000, 0x00000000 }
461 .vals = { 0x3F800000, 0x44324000, 0x44BB8000,
462 0x44E10000, 0x3FB33333, 0x3FB9999A,
463 0x3F800000, 0x3E3A2E43, 0x00000000 }
466 .vals = { 0x3F800000, 0x43EA0000, 0x44A52000,
467 0x45098000, 0x3F266666, 0x3FC00000,
468 0x3F800000, 0x00000000, 0x00000000 }
471 .vals = { 0x3F800000, 0x43C70000, 0x44AE6000,
472 0x45193000, 0x3F8E147B, 0x3F75C28F,
473 0x3F800000, 0x00000000, 0x00000000 }
476 .vals = { 0x3F800000, 0x43930000, 0x44BEE000,
477 0x45007000, 0x3F451EB8, 0x3F7851EC,
478 0x3F800000, 0x00000000, 0x00000000 }
481 .vals = { 0x3F800000, 0x43BFC5AC, 0x44B28FDF,
482 0x451F6000, 0x3F266666, 0x3FA7D945,
483 0x3F800000, 0x3CF5C28F, 0x00000000 }
486 .vals = { 0x3F800000, 0x43C80000, 0x44AF0000,
487 0x44FA0000, 0x3FB2718B, 0x3F800000,
488 0xBC07010E, 0x00000000, 0x00000000 }
491 .vals = { 0x3F800000, 0x43C20000, 0x44906000,
492 0x44E70000, 0x3F4CCCCD, 0x3F8A3D71,
493 0x3F0A3D71, 0x00000000, 0x00000000 }
496 .vals = { 0x3F800000, 0x43C80000, 0x44AF0000,
497 0x44FA0000, 0x3F800000, 0x3F800000,
498 0x3E4CCCCD, 0x00000000, 0x00000000 }
501 .vals = { 0x3F800000, 0x43A9C5AC, 0x44AA4FDF,
502 0x44FFC000, 0x3EDBB56F, 0x3F99C4CA,
503 0x3F800000, 0x00000000, 0x00000000 }
506 .vals = { 0x3F800000, 0x43C80000, 0x44AF0000,
507 0x44FA0000, 0x3F800000, 0x3F1A043C,
508 0x3F800000, 0x00000000, 0x00000000 }
531 .mid = 0x96,
538 .vals = { 0x00000000, 0x00000000, 0x00000000,
539 0x00000000, 0x00000000, 0x00000000,
540 0x00000000, 0x00000000, 0x00000000,
541 0x00000000, 0x00000000 }
544 .vals = { 0x00000000, 0x00000000, 0x3F8CCCCD,
545 0x40000000, 0x00000000, 0x00000000,
546 0x00000000, 0x00000000, 0x40000000,
547 0x40000000, 0x40000000 }
550 .vals = { 0x00000000, 0x00000000, 0x40C00000,
551 0x40C00000, 0x40466666, 0x00000000,
552 0x00000000, 0x00000000, 0x00000000,
553 0x40466666, 0x40466666 }
556 .vals = { 0x00000000, 0xBF99999A, 0x00000000,
557 0x3FA66666, 0x3FA66666, 0x3F8CCCCD,
558 0x00000000, 0x00000000, 0x40000000,
559 0x40466666, 0x40800000 }
562 .vals = { 0x00000000, 0xBF99999A, 0x40000000,
563 0x40466666, 0x40866666, 0xBF99999A,
564 0xBF99999A, 0x00000000, 0x00000000,
565 0x40800000, 0x40800000 }
568 .vals = { 0x00000000, 0x00000000, 0x00000000,
569 0x3F8CCCCD, 0x40800000, 0x40800000,
570 0x40800000, 0x00000000, 0x3F8CCCCD,
571 0x40466666, 0x40466666 }
574 .vals = { 0x00000000, 0x00000000, 0x40000000,
575 0x40000000, 0x00000000, 0x00000000,
576 0x00000000, 0x3F8CCCCD, 0x40000000,
577 0x40000000, 0x40000000 }
580 .vals = { 0x00000000, 0xBFCCCCCD, 0x00000000,
581 0x40000000, 0x40000000, 0x00000000,
582 0xBF99999A, 0xBF99999A, 0x00000000,
583 0x40466666, 0x40C00000 }
586 .vals = { 0x00000000, 0xBF99999A, 0xBF99999A,
587 0x3F8CCCCD, 0x40000000, 0xBF99999A,
588 0xBF99999A, 0x00000000, 0x00000000,
589 0x40800000, 0x40800000 }
592 .vals = { 0x00000000, 0xC0000000, 0xBF99999A,
593 0xBF99999A, 0x00000000, 0x40466666,
594 0x40800000, 0x40466666, 0x00000000,
595 0x00000000, 0x3F8CCCCD }
607 SPEAKER_BASS_REDIRECT = 0x15,
608 SPEAKER_BASS_REDIRECT_XOVER_FREQ = 0x16,
609 /* Between 0x16-0x1a are the X-Bass reqs. */
610 SPEAKER_FULL_RANGE_FRONT_L_R = 0x1a,
611 SPEAKER_FULL_RANGE_CENTER_LFE = 0x1b,
612 SPEAKER_FULL_RANGE_REAR_L_R = 0x1c,
613 SPEAKER_FULL_RANGE_SURROUND_L_R = 0x1d,
614 SPEAKER_BASS_REDIRECT_SUB_GAIN = 0x1e,
619 * module ID 0x96, the output effects module.
625 * connect software, the QUERY_SPEAKER_EQ_ADDRESS req on mid 0x80 is
635 SPEAKER_TUNING_USE_SPEAKER_EQ = 0x1f,
636 SPEAKER_TUNING_ENABLE_CENTER_EQ = 0x20,
637 SPEAKER_TUNING_FRONT_LEFT_VOL_LEVEL = 0x21,
638 SPEAKER_TUNING_FRONT_RIGHT_VOL_LEVEL = 0x22,
639 SPEAKER_TUNING_CENTER_VOL_LEVEL = 0x23,
640 SPEAKER_TUNING_LFE_VOL_LEVEL = 0x24,
641 SPEAKER_TUNING_REAR_LEFT_VOL_LEVEL = 0x25,
642 SPEAKER_TUNING_REAR_RIGHT_VOL_LEVEL = 0x26,
643 SPEAKER_TUNING_SURROUND_LEFT_VOL_LEVEL = 0x27,
644 SPEAKER_TUNING_SURROUND_RIGHT_VOL_LEVEL = 0x28,
649 SPEAKER_TUNING_FRONT_LEFT_INVERT = 0x29,
650 SPEAKER_TUNING_FRONT_RIGHT_INVERT = 0x2a,
651 SPEAKER_TUNING_CENTER_INVERT = 0x2b,
652 SPEAKER_TUNING_LFE_INVERT = 0x2c,
653 SPEAKER_TUNING_REAR_LEFT_INVERT = 0x2d,
654 SPEAKER_TUNING_REAR_RIGHT_INVERT = 0x2e,
655 SPEAKER_TUNING_SURROUND_LEFT_INVERT = 0x2f,
656 SPEAKER_TUNING_SURROUND_RIGHT_INVERT = 0x30,
658 SPEAKER_TUNING_FRONT_LEFT_DELAY = 0x31,
659 SPEAKER_TUNING_FRONT_RIGHT_DELAY = 0x32,
660 SPEAKER_TUNING_CENTER_DELAY = 0x33,
661 SPEAKER_TUNING_LFE_DELAY = 0x34,
662 SPEAKER_TUNING_REAR_LEFT_DELAY = 0x35,
663 SPEAKER_TUNING_REAR_RIGHT_DELAY = 0x36,
664 SPEAKER_TUNING_SURROUND_LEFT_DELAY = 0x37,
665 SPEAKER_TUNING_SURROUND_RIGHT_DELAY = 0x38,
667 SPEAKER_TUNING_MAIN_VOLUME = 0x39,
668 SPEAKER_TUNING_MUTE = 0x3a,
709 #define DSP_VOL_OUT 0
720 .mid = 0x32,
724 .mid = 0x37,
738 .group = { 0x30, 0x30, 0x48, 0x48, 0x48, 0x30 },
739 .target = { 0x2e, 0x30, 0x0d, 0x17, 0x19, 0x32 },
741 .vals = { { 0x00, 0x00, 0x40, 0x00, 0x00, 0x3f },
743 { 0x3f, 0x3f, 0x00, 0x00, 0x00, 0x00 } },
747 .group = { 0x30, 0x30, 0x48, 0x48, 0x48, 0x30 },
748 .target = { 0x2e, 0x30, 0x0d, 0x17, 0x19, 0x32 },
750 .vals = { { 0x00, 0x00, 0x40, 0x00, 0x00, 0x3f },
752 { 0x3f, 0x3f, 0x00, 0x00, 0x02, 0x00 } },
764 .vals = { 0xff, 0x2c, 0xf5, 0x32 }
767 .vals = { 0x38, 0xa8, 0x3e, 0x4c }
770 .vals = { 0xff, 0xff, 0xff, 0x7f }
781 .val = 0xa0
784 .val = 0xc0
787 .val = 0x80
804 { .stream_id = 0x14,
805 .count = 0x04,
806 .offset = { 0x00, 0x04, 0x08, 0x0c },
807 .value = { 0x0001f8c0, 0x0001f9c1, 0x0001fac6, 0x0001fbc7 },
809 { .stream_id = 0x0c,
810 .count = 0x0c,
811 .offset = { 0x00, 0x04, 0x08, 0x0c, 0x10, 0x14, 0x18, 0x1c,
812 0x20, 0x24, 0x28, 0x2c },
813 .value = { 0x0001e0c0, 0x0001e1c1, 0x0001e4c2, 0x0001e5c3,
814 0x0001e2c4, 0x0001e3c5, 0x0001e8c6, 0x0001e9c7,
815 0x0001ecc8, 0x0001edc9, 0x0001eaca, 0x0001ebcb },
817 { .stream_id = 0x0c,
818 .count = 0x08,
819 .offset = { 0x08, 0x0c, 0x10, 0x14, 0x20, 0x24, 0x28, 0x2c },
820 .value = { 0x000140c2, 0x000141c3, 0x000150c4, 0x000151c5,
821 0x000142c8, 0x000143c9, 0x000152ca, 0x000153cb },
827 VENDOR_DSPIO_SCP_WRITE_DATA_LOW = 0x000,
828 VENDOR_DSPIO_SCP_WRITE_DATA_HIGH = 0x100,
830 VENDOR_DSPIO_STATUS = 0xF01,
831 VENDOR_DSPIO_SCP_POST_READ_DATA = 0x702,
832 VENDOR_DSPIO_SCP_READ_DATA = 0xF02,
833 VENDOR_DSPIO_DSP_INIT = 0x703,
834 VENDOR_DSPIO_SCP_POST_COUNT_QUERY = 0x704,
835 VENDOR_DSPIO_SCP_READ_COUNT = 0xF04,
838 VENDOR_CHIPIO_ADDRESS_LOW = 0x000,
839 VENDOR_CHIPIO_ADDRESS_HIGH = 0x100,
840 VENDOR_CHIPIO_STREAM_FORMAT = 0x200,
841 VENDOR_CHIPIO_DATA_LOW = 0x300,
842 VENDOR_CHIPIO_DATA_HIGH = 0x400,
844 VENDOR_CHIPIO_8051_WRITE_DIRECT = 0x500,
845 VENDOR_CHIPIO_8051_READ_DIRECT = 0xD00,
847 VENDOR_CHIPIO_GET_PARAMETER = 0xF00,
848 VENDOR_CHIPIO_STATUS = 0xF01,
849 VENDOR_CHIPIO_HIC_POST_READ = 0x702,
850 VENDOR_CHIPIO_HIC_READ_DATA = 0xF03,
852 VENDOR_CHIPIO_8051_DATA_WRITE = 0x707,
853 VENDOR_CHIPIO_8051_DATA_READ = 0xF07,
854 VENDOR_CHIPIO_8051_PMEM_READ = 0xF08,
855 VENDOR_CHIPIO_8051_IRAM_WRITE = 0x709,
856 VENDOR_CHIPIO_8051_IRAM_READ = 0xF09,
858 VENDOR_CHIPIO_CT_EXTENSIONS_ENABLE = 0x70A,
859 VENDOR_CHIPIO_CT_EXTENSIONS_GET = 0xF0A,
861 VENDOR_CHIPIO_PLL_PMU_WRITE = 0x70C,
862 VENDOR_CHIPIO_PLL_PMU_READ = 0xF0C,
863 VENDOR_CHIPIO_8051_ADDRESS_LOW = 0x70D,
864 VENDOR_CHIPIO_8051_ADDRESS_HIGH = 0x70E,
865 VENDOR_CHIPIO_FLAG_SET = 0x70F,
866 VENDOR_CHIPIO_FLAGS_GET = 0xF0F,
867 VENDOR_CHIPIO_PARAM_SET = 0x710,
868 VENDOR_CHIPIO_PARAM_GET = 0xF10,
870 VENDOR_CHIPIO_PORT_ALLOC_CONFIG_SET = 0x711,
871 VENDOR_CHIPIO_PORT_ALLOC_SET = 0x712,
872 VENDOR_CHIPIO_PORT_ALLOC_GET = 0xF12,
873 VENDOR_CHIPIO_PORT_FREE_SET = 0x713,
875 VENDOR_CHIPIO_PARAM_EX_ID_GET = 0xF17,
876 VENDOR_CHIPIO_PARAM_EX_ID_SET = 0x717,
877 VENDOR_CHIPIO_PARAM_EX_VALUE_GET = 0xF18,
878 VENDOR_CHIPIO_PARAM_EX_VALUE_SET = 0x718,
880 VENDOR_CHIPIO_DMIC_CTL_SET = 0x788,
881 VENDOR_CHIPIO_DMIC_CTL_GET = 0xF88,
882 VENDOR_CHIPIO_DMIC_PIN_SET = 0x789,
883 VENDOR_CHIPIO_DMIC_PIN_GET = 0xF89,
884 VENDOR_CHIPIO_DMIC_MCLK_SET = 0x78A,
885 VENDOR_CHIPIO_DMIC_MCLK_GET = 0xF8A,
887 VENDOR_CHIPIO_EAPD_SEL_SET = 0x78D
895 CONTROL_FLAG_C_MGR = 0,
952 /* 0: None, 1: Mic1In*/
954 /* 0: force HDA, 1: allow DSP if HDA Spdif1Out stream is idle */
1000 VENDOR_STATUS_DSPIO_OK = 0x00,
1002 VENDOR_STATUS_DSPIO_BUSY = 0x01,
1004 VENDOR_STATUS_DSPIO_SCP_COMMAND_QUEUE_FULL = 0x02,
1006 VENDOR_STATUS_DSPIO_SCP_RESPONSE_QUEUE_EMPTY = 0x03
1014 VENDOR_STATUS_CHIPIO_OK = 0x00,
1016 VENDOR_STATUS_CHIPIO_BUSY = 0x01
1023 SR_6_000 = 0x00,
1024 SR_8_000 = 0x01,
1025 SR_9_600 = 0x02,
1026 SR_11_025 = 0x03,
1027 SR_16_000 = 0x04,
1028 SR_22_050 = 0x05,
1029 SR_24_000 = 0x06,
1030 SR_32_000 = 0x07,
1031 SR_44_100 = 0x08,
1032 SR_48_000 = 0x09,
1033 SR_88_200 = 0x0A,
1034 SR_96_000 = 0x0B,
1035 SR_144_000 = 0x0C,
1036 SR_176_400 = 0x0D,
1037 SR_192_000 = 0x0E,
1038 SR_384_000 = 0x0F,
1040 SR_COUNT = 0x10,
1042 SR_RATE_UNKNOWN = 0x1F
1047 DSP_DOWNLOAD_INIT = 0,
1053 #define get_hdafmt_chs(fmt) (fmt & 0xf)
1054 #define get_hdafmt_bits(fmt) ((fmt >> 4) & 0x7)
1055 #define get_hdafmt_rate(fmt) ((fmt >> 8) & 0x7f)
1056 #define get_hdafmt_type(fmt) ((fmt >> 15) & 0x1)
1194 { 0x0b, 0x90170110 }, /* Builtin Speaker */
1195 { 0x0c, 0x411111f0 }, /* N/A */
1196 { 0x0d, 0x411111f0 }, /* N/A */
1197 { 0x0e, 0x411111f0 }, /* N/A */
1198 { 0x0f, 0x0321101f }, /* HP */
1199 { 0x10, 0x411111f0 }, /* Headset? disabled for now */
1200 { 0x11, 0x03a11021 }, /* Mic */
1201 { 0x12, 0xd5a30140 }, /* Builtin Mic */
1202 { 0x13, 0x411111f0 }, /* N/A */
1203 { 0x18, 0x411111f0 }, /* N/A */
1209 { 0x0b, 0x01017010 }, /* Port G -- Lineout FRONT L/R */
1210 { 0x0c, 0x014510f0 }, /* SPDIF Out 1 */
1211 { 0x0d, 0x014510f0 }, /* Digital Out */
1212 { 0x0e, 0x01c510f0 }, /* SPDIF In */
1213 { 0x0f, 0x0221701f }, /* Port A -- BackPanel HP */
1214 { 0x10, 0x01017012 }, /* Port D -- Center/LFE or FP Hp */
1215 { 0x11, 0x01017014 }, /* Port B -- LineMicIn2 / Rear L/R */
1216 { 0x12, 0x01a170f0 }, /* Port C -- LineIn1 */
1217 { 0x13, 0x908700f0 }, /* What U Hear In*/
1218 { 0x18, 0x50d000f0 }, /* N/A */
1224 { 0x0b, 0x01047110 }, /* Port G -- Lineout FRONT L/R */
1225 { 0x0c, 0x414510f0 }, /* SPDIF Out 1 - Disabled*/
1226 { 0x0d, 0x014510f0 }, /* Digital Out */
1227 { 0x0e, 0x41c520f0 }, /* SPDIF In - Disabled*/
1228 { 0x0f, 0x0122711f }, /* Port A -- BackPanel HP */
1229 { 0x10, 0x01017111 }, /* Port D -- Center/LFE */
1230 { 0x11, 0x01017114 }, /* Port B -- LineMicIn2 / Rear L/R */
1231 { 0x12, 0x01a271f0 }, /* Port C -- LineIn1 */
1232 { 0x13, 0x908700f0 }, /* What U Hear In*/
1233 { 0x18, 0x50d000f0 }, /* N/A */
1239 { 0x0b, 0x01014110 }, /* Port G -- Lineout FRONT L/R */
1240 { 0x0c, 0x014510f0 }, /* SPDIF Out 1 */
1241 { 0x0d, 0x014510f0 }, /* Digital Out */
1242 { 0x0e, 0x01c520f0 }, /* SPDIF In */
1243 { 0x0f, 0x0221401f }, /* Port A -- BackPanel HP */
1244 { 0x10, 0x01016011 }, /* Port D -- Center/LFE or FP Hp */
1245 { 0x11, 0x01011014 }, /* Port B -- LineMicIn2 / Rear L/R */
1246 { 0x12, 0x02a090f0 }, /* Port C -- LineIn1 */
1247 { 0x13, 0x908700f0 }, /* What U Hear In*/
1248 { 0x18, 0x50d000f0 }, /* N/A */
1254 { 0x0b, 0x01017010 }, /* Port G -- Lineout FRONT L/R */
1255 { 0x0c, 0x014510f0 }, /* SPDIF Out 1 */
1256 { 0x0d, 0x014510f0 }, /* Digital Out */
1257 { 0x0e, 0x01c510f0 }, /* SPDIF In */
1258 { 0x0f, 0x01017114 }, /* Port A -- Rear L/R. */
1259 { 0x10, 0x01017012 }, /* Port D -- Center/LFE or FP Hp */
1260 { 0x11, 0x012170ff }, /* Port B -- LineMicIn2 / Rear Headphone */
1261 { 0x12, 0x01a170f0 }, /* Port C -- LineIn1 */
1262 { 0x13, 0x908700f0 }, /* What U Hear In*/
1263 { 0x18, 0x50d000f0 }, /* N/A */
1269 { 0x0b, 0x01014110 }, /* Port G -- Lineout FRONT L/R */
1270 { 0x0c, 0x014510f0 }, /* SPDIF Out 1 */
1271 { 0x0d, 0x014510f0 }, /* Digital Out */
1272 { 0x0e, 0x41c520f0 }, /* SPDIF In */
1273 { 0x0f, 0x0221401f }, /* Port A -- BackPanel HP */
1274 { 0x10, 0x01016011 }, /* Port D -- Center/LFE or FP Hp */
1275 { 0x11, 0x01011014 }, /* Port B -- LineMicIn2 / Rear L/R */
1276 { 0x12, 0x02a090f0 }, /* Port C -- LineIn1 */
1277 { 0x13, 0x908700f0 }, /* What U Hear In*/
1278 { 0x18, 0x500000f0 }, /* N/A */
1283 { 0x0b, 0x01017010 },
1284 { 0x0c, 0x014510f0 },
1285 { 0x0d, 0x414510f0 },
1286 { 0x0e, 0x01c520f0 },
1287 { 0x0f, 0x01017114 },
1288 { 0x10, 0x01017011 },
1289 { 0x11, 0x018170ff },
1290 { 0x12, 0x01a170f0 },
1291 { 0x13, 0x908700f0 },
1292 { 0x18, 0x500000f0 },
1297 SND_PCI_QUIRK(0x1028, 0x057b, "Alienware M17x R4", QUIRK_ALIENWARE_M17XR4),
1298 SND_PCI_QUIRK(0x1028, 0x0685, "Alienware 15 2015", QUIRK_ALIENWARE),
1299 SND_PCI_QUIRK(0x1028, 0x0688, "Alienware 17 2015", QUIRK_ALIENWARE),
1300 SND_PCI_QUIRK(0x1028, 0x0708, "Alienware 15 R2 2016", QUIRK_ALIENWARE),
1301 SND_PCI_QUIRK(0x1102, 0x0010, "Sound Blaster Z", QUIRK_SBZ),
1302 SND_PCI_QUIRK(0x1102, 0x0023, "Sound Blaster Z", QUIRK_SBZ),
1303 SND_PCI_QUIRK(0x1102, 0x0027, "Sound Blaster Z", QUIRK_SBZ),
1304 SND_PCI_QUIRK(0x1102, 0x0033, "Sound Blaster ZxR", QUIRK_SBZ),
1305 SND_PCI_QUIRK(0x1458, 0xA016, "Recon3Di", QUIRK_R3DI),
1306 SND_PCI_QUIRK(0x1458, 0xA026, "Gigabyte G1.Sniper Z97", QUIRK_R3DI),
1307 SND_PCI_QUIRK(0x1458, 0xA036, "Gigabyte GA-Z170X-Gaming 7", QUIRK_R3DI),
1308 SND_PCI_QUIRK(0x3842, 0x1038, "EVGA X99 Classified", QUIRK_R3DI),
1309 SND_PCI_QUIRK(0x3842, 0x1055, "EVGA Z390 DARK", QUIRK_R3DI),
1310 SND_PCI_QUIRK(0x1102, 0x0013, "Recon3D", QUIRK_R3D),
1311 SND_PCI_QUIRK(0x1102, 0x0018, "Recon3D", QUIRK_R3D),
1312 SND_PCI_QUIRK(0x1102, 0x0051, "Sound Blaster AE-5", QUIRK_AE5),
1313 SND_PCI_QUIRK(0x1102, 0x0191, "Sound Blaster AE-5 Plus", QUIRK_AE5),
1314 SND_PCI_QUIRK(0x1102, 0x0081, "Sound Blaster AE-7", QUIRK_AE7),
1322 unsigned int dac2port; /* ParamID 0x0d value. */
1357 { .dac2port = 0x24,
1361 .mmio_gpio_count = 0,
1362 .scp_cmds_count = 0,
1366 { .dac2port = 0x21,
1369 .hda_gpio_set = 0,
1370 .mmio_gpio_count = 0,
1371 .scp_cmds_count = 0,
1380 { .dac2port = 0x24,
1385 .scp_cmds_count = 0,
1389 { .dac2port = 0x21,
1393 .mmio_gpio_set = { 0 },
1394 .scp_cmds_count = 0,
1403 { .dac2port = 0x18,
1407 .mmio_gpio_set = { 0, 1, 1 },
1408 .scp_cmds_count = 0,
1411 { .dac2port = 0x12,
1415 .mmio_gpio_set = { 1, 1, 0 },
1416 .scp_cmds_count = 0,
1425 { .dac2port = 0x24,
1429 .mmio_gpio_set = { 1, 1, 0 },
1430 .scp_cmds_count = 0,
1434 { .dac2port = 0x21,
1438 .mmio_gpio_set = { 0, 1, 1 },
1439 .scp_cmds_count = 0,
1448 { .dac2port = 0xa4,
1450 .mmio_gpio_count = 0,
1452 .scp_cmd_mid = { 0x96, 0x96 },
1457 .chipio_write_addr = 0x0018b03c,
1458 .chipio_write_data = 0x00000012
1461 { .dac2port = 0xa1,
1463 .mmio_gpio_count = 0,
1465 .scp_cmd_mid = { 0x96, 0x96 },
1470 .chipio_write_addr = 0x0018b03c,
1471 .chipio_write_data = 0x00000012
1479 { .dac2port = 0x58,
1482 .mmio_gpio_pin = { 0 },
1485 .scp_cmd_mid = { 0x96, 0x96 },
1490 .chipio_write_addr = 0x0018b03c,
1491 .chipio_write_data = 0x00000000
1494 { .dac2port = 0x58,
1497 .mmio_gpio_pin = { 0 },
1500 .scp_cmd_mid = { 0x96, 0x96 },
1505 .chipio_write_addr = 0x0018b03c,
1506 .chipio_write_data = 0x00000010
1518 response = snd_hda_codec_read(codec, nid, 0, verb, parm); in codec_send_command()
1521 return ((response == -1) ? -1 : 0); in codec_send_command()
1528 converter_format & 0xffff, res); in codec_set_converter_format()
1535 unsigned char converter_stream_channel = 0; in codec_set_converter_stream_channel()
1537 converter_stream_channel = (stream << 4) | (channel & 0x0f); in codec_set_converter_stream_channel()
1552 res = snd_hda_codec_read(codec, WIDGET_CHIP_CTRL, 0, in chipio_send()
1555 return 0; in chipio_send()
1572 return 0; in chipio_write_address()
1576 chip_addx & 0xffff); in chipio_write_address()
1584 spec->curr_chip_addx = (res < 0) ? ~0U : chip_addx; in chipio_write_address()
1598 res = chipio_send(codec, VENDOR_CHIPIO_DATA_LOW, data & 0xffff); in chipio_write_data()
1609 (spec->curr_chip_addx + 4) : ~0U; in chipio_write_data()
1620 int status = 0; in chipio_write_data_multiple()
1627 while ((count-- != 0) && (status == 0)) in chipio_write_data_multiple()
1643 res = chipio_send(codec, VENDOR_CHIPIO_HIC_POST_READ, 0); in chipio_read_data()
1647 res = chipio_send(codec, VENDOR_CHIPIO_STATUS, 0); in chipio_read_data()
1652 *data = snd_hda_codec_read(codec, WIDGET_CHIP_CTRL, 0, in chipio_read_data()
1654 0); in chipio_read_data()
1660 (spec->curr_chip_addx + 4) : ~0U; in chipio_read_data()
1678 if (err < 0) in chipio_write()
1682 if (err < 0) in chipio_write()
1702 if (err < 0) in chipio_write_no_mutex()
1706 if (err < 0) in chipio_write_no_mutex()
1727 if (status < 0) in chipio_write_multiple()
1751 if (err < 0) in chipio_read()
1755 if (err < 0) in chipio_read()
1773 flag_bit = (flag_state ? 1 : 0); in chipio_set_control_flag()
1775 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in chipio_set_control_flag()
1790 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in chipio_set_control_param()
1794 if (chipio_send(codec, VENDOR_CHIPIO_STATUS, 0) == 0) { in chipio_set_control_param()
1795 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in chipio_set_control_param()
1798 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in chipio_set_control_param()
1816 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in chipio_set_control_param_no_mutex()
1819 if (chipio_send(codec, VENDOR_CHIPIO_STATUS, 0) == 0) { in chipio_set_control_param_no_mutex()
1820 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in chipio_set_control_param_no_mutex()
1823 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in chipio_set_control_param_no_mutex()
1876 *enable = snd_hda_codec_read(codec, WIDGET_CHIP_CTRL, 0, in chipio_get_stream_control()
1907 * 0x80-0xFF.
1915 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, verb, addr); in chipio_8051_write_direct()
1920 * Data at addresses 0x2000-0x7fff is mirrored to 0x8000-0xdfff.
1921 * Data at 0x8000-0xdfff can also be used as program memory for the 8051 by
1923 * 0xe000-0xffff is always mapped as program memory, with only 0xf000-0xffff
1931 tmp = addr & 0xff; in chipio_8051_set_address()
1932 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in chipio_8051_set_address()
1936 tmp = (addr >> 8) & 0xff; in chipio_8051_set_address()
1937 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in chipio_8051_set_address()
1944 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in chipio_8051_set_data()
1945 VENDOR_CHIPIO_8051_DATA_WRITE, data & 0xff); in chipio_8051_set_data()
1950 return snd_hda_codec_read(codec, WIDGET_CHIP_CTRL, 0, in chipio_8051_get_data()
1951 VENDOR_CHIPIO_8051_DATA_READ, 0); in chipio_8051_get_data()
1958 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in chipio_8051_set_data_pll()
1959 VENDOR_CHIPIO_PLL_PMU_WRITE, data & 0xff); in chipio_8051_set_data_pll()
1997 chipio_8051_set_address(codec, addr & 0xff); in chipio_8051_write_pll_pmu()
2006 chipio_8051_set_address(codec, addr & 0xff); in chipio_8051_write_pll_pmu_no_mutex()
2019 chipio_8051_write_pll_pmu_no_mutex(codec, 0x00, 0xff); in chipio_enable_clocks()
2020 chipio_8051_write_pll_pmu_no_mutex(codec, 0x05, 0x0b); in chipio_enable_clocks()
2021 chipio_8051_write_pll_pmu_no_mutex(codec, 0x06, 0xff); in chipio_enable_clocks()
2037 res = snd_hda_codec_read(codec, WIDGET_DSP_CTRL, 0, reg, data); in dspio_send()
2038 if ((res >= 0) && (res != VENDOR_STATUS_DSPIO_BUSY)) in dspio_send()
2055 status = snd_hda_codec_read(codec, WIDGET_DSP_CTRL, 0, in dspio_write_wait()
2056 VENDOR_DSPIO_STATUS, 0); in dspio_write_wait()
2076 scp_data & 0xffff); in dspio_write()
2077 if (status < 0) in dspio_write()
2082 if (status < 0) in dspio_write()
2086 status = snd_hda_codec_read(codec, WIDGET_DSP_CTRL, 0, in dspio_write()
2087 VENDOR_DSPIO_STATUS, 0); in dspio_write()
2092 -EIO : 0; in dspio_write()
2101 int status = 0; in dspio_write_multiple()
2107 count = 0; in dspio_write_multiple()
2110 if (status != 0) in dspio_write_multiple()
2122 status = dspio_send(codec, VENDOR_DSPIO_SCP_POST_READ_DATA, 0); in dspio_read()
2126 status = dspio_send(codec, VENDOR_DSPIO_STATUS, 0); in dspio_read()
2131 *data = snd_hda_codec_read(codec, WIDGET_DSP_CTRL, 0, in dspio_read()
2132 VENDOR_DSPIO_SCP_READ_DATA, 0); in dspio_read()
2134 return 0; in dspio_read()
2140 int status = 0; in dspio_read_multiple()
2149 count = 0; in dspio_read_multiple()
2152 if (status != 0) in dspio_read_multiple()
2158 if (status == 0) { in dspio_read_multiple()
2161 if (status != 0) in dspio_read_multiple()
2180 unsigned int header = 0; in make_scp_header()
2182 header = (data_size & 0x1f) << 27; in make_scp_header()
2183 header |= (error_flag & 0x01) << 26; in make_scp_header()
2184 header |= (resp_flag & 0x01) << 25; in make_scp_header()
2185 header |= (device_flag & 0x01) << 24; in make_scp_header()
2186 header |= (req & 0x7f) << 17; in make_scp_header()
2187 header |= (get_flag & 0x01) << 16; in make_scp_header()
2188 header |= (source_id & 0xff) << 8; in make_scp_header()
2189 header |= target_id & 0xff; in make_scp_header()
2205 *data_size = (header >> 27) & 0x1f; in extract_scp_header()
2207 *error_flag = (header >> 26) & 0x01; in extract_scp_header()
2209 *resp_flag = (header >> 25) & 0x01; in extract_scp_header()
2211 *device_flag = (header >> 24) & 0x01; in extract_scp_header()
2213 *req = (header >> 17) & 0x7f; in extract_scp_header()
2215 *get_flag = (header >> 16) & 0x01; in extract_scp_header()
2217 *source_id = (header >> 8) & 0xff; in extract_scp_header()
2219 *target_id = header & 0xff; in extract_scp_header()
2233 unsigned int dummy = 0; in dspio_clear_response_queue()
2239 } while (status == 0 && time_before(jiffies, timeout)); in dspio_clear_response_queue()
2245 unsigned int data = 0; in dspio_get_response_data()
2248 if (dspio_read(codec, &data) < 0) in dspio_get_response_data()
2251 if ((data & 0x00ffffff) == spec->wait_scp_header) { in dspio_get_response_data()
2257 return 0; in dspio_get_response_data()
2275 unsigned int scp_send_size = 0; in dspio_send_scp_message()
2284 *bytes_returned = 0; in dspio_send_scp_message()
2305 spec->wait_scp_header &= 0xffff0000; in dspio_send_scp_message()
2314 if (status < 0) { in dspio_send_scp_message()
2315 spec->wait_scp = 0; in dspio_send_scp_message()
2321 memset(return_buf, 0, return_buf_size); in dspio_send_scp_message()
2332 status = 0; in dspio_send_scp_message()
2336 spec->wait_scp = 0; in dspio_send_scp_message()
2360 int status = 0; in dspio_scp()
2366 memset(&scp_send, 0, sizeof(scp_send)); in dspio_scp()
2367 memset(&scp_reply, 0, sizeof(scp_reply)); in dspio_scp()
2369 if ((len != 0 && data == NULL) || (len > SCP_MAX_DATA_WORDS)) in dspio_scp()
2377 if (reply != NULL && (reply_len == NULL || (*reply_len == 0))) { in dspio_scp()
2383 0, 0, 0, len/sizeof(unsigned int)); in dspio_scp()
2384 if (data != NULL && len > 0) { in dspio_scp()
2389 ret_bytes = 0; in dspio_scp()
2395 if (status < 0) { in dspio_scp()
2408 return 0; in dspio_scp()
2448 return dspio_set_param(codec, mod_id, 0x20, req, &data, in dspio_set_uint_param()
2457 int status = 0; in dspio_alloc_dma_chan()
2461 status = dspio_scp(codec, MASTERCONTROL, 0x20, in dspio_alloc_dma_chan()
2462 MASTERCONTROL_ALLOC_DMA_CHAN, SCP_GET, NULL, 0, in dspio_alloc_dma_chan()
2465 if (status < 0) { in dspio_alloc_dma_chan()
2470 if ((*dma_chan + 1) == 0) { in dspio_alloc_dma_chan()
2486 int status = 0; in dspio_free_dma_chan()
2487 unsigned int dummy = 0; in dspio_free_dma_chan()
2492 status = dspio_scp(codec, MASTERCONTROL, 0x20, in dspio_free_dma_chan()
2496 if (status < 0) { in dspio_free_dma_chan()
2516 if (err < 0) in dsp_set_run_state()
2522 if (halt_state != 0) { in dsp_set_run_state()
2527 if (err < 0) in dsp_set_run_state()
2534 if (err < 0) in dsp_set_run_state()
2538 return 0; in dsp_set_run_state()
2551 res = dspio_send(codec, VENDOR_DSPIO_DSP_INIT, 0); in dsp_reset()
2560 return 0; in dsp_reset()
2594 (DSPDMAC_CHNLSTART_EN_LOBIT + dma_chan))) != 0); in dsp_is_dma_active()
2603 int status = 0; in dsp_dma_setup_common()
2629 active = 0; in dsp_dma_setup_common()
2637 if (status < 0) { in dsp_dma_setup_common()
2652 if (status < 0) { in dsp_dma_setup_common()
2662 if (status < 0) { in dsp_dma_setup_common()
2673 if (status < 0) { in dsp_dma_setup_common()
2682 if (status < 0) { in dsp_dma_setup_common()
2690 if (status < 0) { in dsp_dma_setup_common()
2697 "ChipA=0x%x,DspA=0x%x,dmaCh=%u, " in dsp_dma_setup_common()
2698 "CHSEL=0x%x,CHPROP=0x%x,Active=0x%x\n", in dsp_dma_setup_common()
2704 return 0; in dsp_dma_setup_common()
2715 int status = 0; in dsp_dma_setup()
2722 unsigned int dma_cfg = 0; in dsp_dma_setup()
2723 unsigned int adr_ofs = 0; in dsp_dma_setup()
2724 unsigned int xfr_cnt = 0; in dsp_dma_setup()
2744 incr_field = 0; in dsp_dma_setup()
2757 if (status < 0) { in dsp_dma_setup()
2764 (code ? 0 : 1)); in dsp_dma_setup()
2768 if (status < 0) { in dsp_dma_setup()
2782 if (status < 0) { in dsp_dma_setup()
2789 "ChipA=0x%x, cnt=0x%x, DMACFG=0x%x, " in dsp_dma_setup()
2790 "ADROFS=0x%x, XFRCNT=0x%x\n", in dsp_dma_setup()
2795 return 0; in dsp_dma_setup()
2804 unsigned int reg = 0; in dsp_dma_start()
2805 int status = 0; in dsp_dma_start()
2813 if (status < 0) { in dsp_dma_start()
2825 if (status < 0) { in dsp_dma_start()
2840 unsigned int reg = 0; in dsp_dma_stop()
2841 int status = 0; in dsp_dma_stop()
2849 if (status < 0) { in dsp_dma_stop()
2860 if (status < 0) { in dsp_dma_stop()
2886 int status = 0; in dsp_allocate_router_ports()
2890 status = chipio_send(codec, VENDOR_CHIPIO_STATUS, 0); in dsp_allocate_router_ports()
2891 if (status < 0) in dsp_allocate_router_ports()
2898 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in dsp_allocate_router_ports()
2902 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in dsp_allocate_router_ports()
2906 status = chipio_send(codec, VENDOR_CHIPIO_STATUS, 0); in dsp_allocate_router_ports()
2907 if (status < 0) in dsp_allocate_router_ports()
2910 res = snd_hda_codec_read(codec, WIDGET_CHIP_CTRL, 0, in dsp_allocate_router_ports()
2911 VENDOR_CHIPIO_PORT_ALLOC_GET, 0); in dsp_allocate_router_ports()
2915 return (res < 0) ? res : 0; in dsp_allocate_router_ports()
2923 int status = 0; in dsp_free_router_ports()
2925 status = chipio_send(codec, VENDOR_CHIPIO_STATUS, 0); in dsp_free_router_ports()
2926 if (status < 0) in dsp_free_router_ports()
2929 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in dsp_free_router_ports()
2933 status = chipio_send(codec, VENDOR_CHIPIO_STATUS, 0); in dsp_free_router_ports()
2955 rate_multi, 0, port_map); in dsp_allocate_ports()
2968 unsigned int sample_rate_div = ((get_hdafmt_rate(fmt) >> 0) & 3) + 1; in dsp_allocate_ports_format()
2992 if (status < 0) { in dsp_free_ports()
3013 DMA_STATE_STOP = 0,
3025 channels, SNDRV_PCM_FORMAT_S32_LE, 32, 0); in dma_convert_to_hda_format()
3030 return 0; in dma_convert_to_hda_format()
3049 if (status < 0) in dma_reset()
3052 return 0; in dma_reset()
3067 return 0; in dma_set_state()
3071 return 0; in dma_set_state()
3089 return 0; in dma_xfer()
3114 static const u32 g_magic_value = 0x4c46584d;
3115 static const u32 g_chip_addr_magic_value = 0xFFFFFF01;
3129 return p->count == 0; in is_last()
3146 #define INVALID_DMA_CHANNEL (~0U)
3168 status = chipio_write(codec, data[0], data[1]); in dspxfr_hci_write()
3169 if (status < 0) { in dspxfr_hci_write()
3176 return 0; in dspxfr_hci_write()
3184 * @reloc: Relocation address for loading single-segment overlays, or 0 for
3201 int status = 0; in dspxfr_one_seg()
3233 if (fls == NULL || dma_engine == NULL || port_map_mask == 0) { in dspxfr_one_seg()
3243 return hci_write ? dspxfr_hci_write(codec, hci_write) : 0; in dspxfr_one_seg()
3245 chip_addx = (chip_addx & (0xFFFF0000 << 2)) + (reloc << 2); in dspxfr_one_seg()
3265 sample_rate_div = ((get_hdafmt_rate(hda_format) >> 0) & 3) + 1; in dspxfr_one_seg()
3269 hda_frame_size_words = ((sample_rate_div == 0) ? 0 : in dspxfr_one_seg()
3272 if (hda_frame_size_words == 0) { in dspxfr_one_seg()
3282 "chpadr=0x%08x frmsz=%u nchan=%u " in dspxfr_one_seg()
3300 while (words_to_write != 0) { in dspxfr_one_seg()
3307 if (status < 0) in dspxfr_one_seg()
3311 if (status < 0) in dspxfr_one_seg()
3318 if (status < 0) in dspxfr_one_seg()
3321 if (status < 0) in dspxfr_one_seg()
3328 if (status < 0) in dspxfr_one_seg()
3330 if (remainder_words != 0) { in dspxfr_one_seg()
3335 if (status < 0) in dspxfr_one_seg()
3337 remainder_words = 0; in dspxfr_one_seg()
3341 if (status < 0) in dspxfr_one_seg()
3360 if (status < 0) in dspxfr_one_seg()
3368 if (remainder_words != 0) { in dspxfr_one_seg()
3381 * @reloc: Relocation address for loading single-segment overlays, or 0 for
3398 unsigned short hda_format = 0; in dspxfr_image()
3400 unsigned char stream_id = 0; in dspxfr_image()
3424 dma_chan = ovly ? INVALID_DMA_CHANNEL : 0; in dspxfr_image()
3429 if (status < 0) { in dspxfr_image()
3438 if (status < 0) in dspxfr_image()
3444 if (status < 0) { in dspxfr_image()
3451 port_map_mask = 0; in dspxfr_image()
3454 if (status < 0) { in dspxfr_image()
3461 WIDGET_CHIP_CTRL, stream_id, 0, &response); in dspxfr_image()
3462 if (status < 0) { in dspxfr_image()
3476 if (status < 0) in dspxfr_image()
3486 if (port_map_mask != 0) in dspxfr_image()
3489 if (status < 0) in dspxfr_image()
3493 WIDGET_CHIP_CTRL, 0, 0, &response); in dspxfr_image()
3516 chipio_write(codec, XRAM_XRAM_INST_OFFSET(0x18), 0x08080080); in dspload_post_setup()
3517 chipio_write(codec, XRAM_XRAM_INST_OFFSET(0x19), 0x3f800000); in dspload_post_setup()
3520 chipio_write(codec, XRAM_XRAM_INST_OFFSET(0x29), 0x00000002); in dspload_post_setup()
3530 * @reloc: Relocation address for loading single-segment overlays, or 0 for
3533 * @router_chans: number of audio router channels to be allocated (0 means use
3549 int status = 0; in dspload_image()
3554 if (router_chans == 0) { in dspload_image()
3574 if (status < 0) in dspload_image()
3581 if (status < 0) in dspload_image()
3591 } while (0); in dspload_image()
3599 unsigned int data = 0; in dspload_is_loaded()
3600 int status = 0; in dspload_is_loaded()
3602 status = chipio_read(codec, 0x40004, &data); in dspload_is_loaded()
3603 if ((status < 0) || (data != 1)) in dspload_is_loaded()
3636 * the mmio address 0x320 is used to set GPIO pins. The format for the data
3649 gpio_data = gpio_pin & 0xF; in ca0113_mmio_gpio_set()
3650 gpio_data |= ((enable << 8) & 0x100); in ca0113_mmio_gpio_set()
3652 writew(gpio_data, spec->mem_base + 0x320); in ca0113_mmio_gpio_set()
3669 writel(0x0000007e, spec->mem_base + 0x210); in ca0113_mmio_command_set()
3670 readl(spec->mem_base + 0x210); in ca0113_mmio_command_set()
3671 writel(0x0000005a, spec->mem_base + 0x210); in ca0113_mmio_command_set()
3672 readl(spec->mem_base + 0x210); in ca0113_mmio_command_set()
3673 readl(spec->mem_base + 0x210); in ca0113_mmio_command_set()
3675 writel(0x00800005, spec->mem_base + 0x20c); in ca0113_mmio_command_set()
3676 writel(group, spec->mem_base + 0x804); in ca0113_mmio_command_set()
3678 writel(0x00800005, spec->mem_base + 0x20c); in ca0113_mmio_command_set()
3679 write_val = (target & 0xff); in ca0113_mmio_command_set()
3683 writel(write_val, spec->mem_base + 0x204); in ca0113_mmio_command_set()
3689 readl(spec->mem_base + 0x860); in ca0113_mmio_command_set()
3690 readl(spec->mem_base + 0x854); in ca0113_mmio_command_set()
3691 readl(spec->mem_base + 0x840); in ca0113_mmio_command_set()
3693 writel(0x00800004, spec->mem_base + 0x20c); in ca0113_mmio_command_set()
3694 writel(0x00000000, spec->mem_base + 0x210); in ca0113_mmio_command_set()
3695 readl(spec->mem_base + 0x210); in ca0113_mmio_command_set()
3696 readl(spec->mem_base + 0x210); in ca0113_mmio_command_set()
3708 writel(0x0000007e, spec->mem_base + 0x210); in ca0113_mmio_command_set_type2()
3709 readl(spec->mem_base + 0x210); in ca0113_mmio_command_set_type2()
3710 writel(0x0000005a, spec->mem_base + 0x210); in ca0113_mmio_command_set_type2()
3711 readl(spec->mem_base + 0x210); in ca0113_mmio_command_set_type2()
3712 readl(spec->mem_base + 0x210); in ca0113_mmio_command_set_type2()
3714 writel(0x00800003, spec->mem_base + 0x20c); in ca0113_mmio_command_set_type2()
3715 writel(group, spec->mem_base + 0x804); in ca0113_mmio_command_set_type2()
3717 writel(0x00800005, spec->mem_base + 0x20c); in ca0113_mmio_command_set_type2()
3718 write_val = (target & 0xff); in ca0113_mmio_command_set_type2()
3722 writel(write_val, spec->mem_base + 0x204); in ca0113_mmio_command_set_type2()
3724 readl(spec->mem_base + 0x860); in ca0113_mmio_command_set_type2()
3725 readl(spec->mem_base + 0x854); in ca0113_mmio_command_set_type2()
3726 readl(spec->mem_base + 0x840); in ca0113_mmio_command_set_type2()
3728 writel(0x00800004, spec->mem_base + 0x20c); in ca0113_mmio_command_set_type2()
3729 writel(0x00000000, spec->mem_base + 0x210); in ca0113_mmio_command_set_type2()
3730 readl(spec->mem_base + 0x210); in ca0113_mmio_command_set_type2()
3731 readl(spec->mem_base + 0x210); in ca0113_mmio_command_set_type2()
3750 snd_hda_codec_write(codec, 0x01, 0, 0x793, 0x00); in ca0132_gpio_init()
3751 snd_hda_codec_write(codec, 0x01, 0, 0x794, 0x53); in ca0132_gpio_init()
3752 snd_hda_codec_write(codec, 0x01, 0, 0x790, 0x23); in ca0132_gpio_init()
3755 snd_hda_codec_write(codec, 0x01, 0, 0x793, 0x00); in ca0132_gpio_init()
3756 snd_hda_codec_write(codec, 0x01, 0, 0x794, 0x5B); in ca0132_gpio_init()
3771 snd_hda_codec_write(codec, 0x01, 0, in ca0132_gpio_setup()
3772 AC_VERB_SET_GPIO_DIRECTION, 0x07); in ca0132_gpio_setup()
3773 snd_hda_codec_write(codec, 0x01, 0, in ca0132_gpio_setup()
3774 AC_VERB_SET_GPIO_MASK, 0x07); in ca0132_gpio_setup()
3775 snd_hda_codec_write(codec, 0x01, 0, in ca0132_gpio_setup()
3776 AC_VERB_SET_GPIO_DATA, 0x04); in ca0132_gpio_setup()
3777 snd_hda_codec_write(codec, 0x01, 0, in ca0132_gpio_setup()
3778 AC_VERB_SET_GPIO_DATA, 0x06); in ca0132_gpio_setup()
3781 snd_hda_codec_write(codec, 0x01, 0, in ca0132_gpio_setup()
3782 AC_VERB_SET_GPIO_DIRECTION, 0x1E); in ca0132_gpio_setup()
3783 snd_hda_codec_write(codec, 0x01, 0, in ca0132_gpio_setup()
3784 AC_VERB_SET_GPIO_MASK, 0x1F); in ca0132_gpio_setup()
3785 snd_hda_codec_write(codec, 0x01, 0, in ca0132_gpio_setup()
3786 AC_VERB_SET_GPIO_DATA, 0x0C); in ca0132_gpio_setup()
3798 /* Bit 1 - Switch between front/rear mic. 0 = rear, 1 = front */
3800 /* Bit 2 - Switch between headphone/line out. 0 = Headphone, 1 = Line */
3815 /* Set GPIO bit 1 to 0 for rear mic */
3816 R3DI_REAR_MIC = 0,
3822 /* Set GPIO bit 2 to 0 for headphone */
3823 R3DI_HEADPHONE_OUT = 0,
3829 R3DI_DSP_DOWNLOADING = 0,
3841 cur_gpio = snd_hda_codec_read(codec, 0x01, 0, AC_VERB_GET_GPIO_DATA, 0); in r3di_gpio_mic_set()
3851 snd_hda_codec_write(codec, codec->core.afg, 0, in r3di_gpio_mic_set()
3861 cur_gpio = snd_hda_codec_read(codec, 0x01, 0, AC_VERB_GET_GPIO_DATA, 0); in r3di_gpio_dsp_status_set()
3866 snd_hda_codec_write(codec, codec->core.afg, 0, in r3di_gpio_dsp_status_set()
3870 /* Set DOWNLOADING bit to 0. */ in r3di_gpio_dsp_status_set()
3873 snd_hda_codec_write(codec, codec->core.afg, 0, in r3di_gpio_dsp_status_set()
3880 snd_hda_codec_write(codec, codec->core.afg, 0, in r3di_gpio_dsp_status_set()
3895 snd_hda_codec_setup_stream(codec, spec->dacs[0], stream_tag, 0, format); in ca0132_playback_pcm_prepare()
3897 return 0; in ca0132_playback_pcm_prepare()
3907 return 0; in ca0132_playback_pcm_cleanup()
3914 snd_hda_codec_cleanup_stream(codec, spec->dacs[0]); in ca0132_playback_pcm_cleanup()
3916 return 0; in ca0132_playback_pcm_cleanup()
3928 return 0; in ca0132_playback_pcm_delay()
3992 stream_tag, 0, format); in ca0132_capture_pcm_prepare()
3994 return 0; in ca0132_capture_pcm_prepare()
4004 return 0; in ca0132_capture_pcm_cleanup()
4007 return 0; in ca0132_capture_pcm_cleanup()
4019 return 0; in ca0132_capture_pcm_delay()
4045 .private_value = HDA_COMPOSE_AMP_VAL(nid, channel, 0, dir) }
4063 .private_value = HDA_COMPOSE_AMP_VAL(nid, channel, 0, dir) }
4072 .private_value = HDA_COMPOSE_AMP_VAL(nid, channel, 0, dir) }
4092 0xC2B40000, 0xC2B20000, 0xC2B00000, 0xC2AE0000, 0xC2AC0000, 0xC2AA0000,
4093 0xC2A80000, 0xC2A60000, 0xC2A40000, 0xC2A20000, 0xC2A00000, 0xC29E0000,
4094 0xC29C0000, 0xC29A0000, 0xC2980000, 0xC2960000, 0xC2940000, 0xC2920000,
4095 0xC2900000, 0xC28E0000, 0xC28C0000, 0xC28A0000, 0xC2880000, 0xC2860000,
4096 0xC2840000, 0xC2820000, 0xC2800000, 0xC27C0000, 0xC2780000, 0xC2740000,
4097 0xC2700000, 0xC26C0000, 0xC2680000, 0xC2640000, 0xC2600000, 0xC25C0000,
4098 0xC2580000, 0xC2540000, 0xC2500000, 0xC24C0000, 0xC2480000, 0xC2440000,
4099 0xC2400000, 0xC23C0000, 0xC2380000, 0xC2340000, 0xC2300000, 0xC22C0000,
4100 0xC2280000, 0xC2240000, 0xC2200000, 0xC21C0000, 0xC2180000, 0xC2140000,
4101 0xC2100000, 0xC20C0000, 0xC2080000, 0xC2040000, 0xC2000000, 0xC1F80000,
4102 0xC1F00000, 0xC1E80000, 0xC1E00000, 0xC1D80000, 0xC1D00000, 0xC1C80000,
4103 0xC1C00000, 0xC1B80000, 0xC1B00000, 0xC1A80000, 0xC1A00000, 0xC1980000,
4104 0xC1900000, 0xC1880000, 0xC1800000, 0xC1700000, 0xC1600000, 0xC1500000,
4105 0xC1400000, 0xC1300000, 0xC1200000, 0xC1100000, 0xC1000000, 0xC0E00000,
4106 0xC0C00000, 0xC0A00000, 0xC0800000, 0xC0400000, 0xC0000000, 0xBF800000,
4107 0x00000000, 0x3F800000, 0x40000000, 0x40400000, 0x40800000, 0x40A00000,
4108 0x40C00000, 0x40E00000, 0x41000000, 0x41100000
4112 * This table counts from float 0 to 1 in increments of .01, which is
4116 0x00000000, 0x3C23D70A, 0x3CA3D70A, 0x3CF5C28F, 0x3D23D70A, 0x3D4CCCCD,
4117 0x3D75C28F, 0x3D8F5C29, 0x3DA3D70A, 0x3DB851EC, 0x3DCCCCCD, 0x3DE147AE,
4118 0x3DF5C28F, 0x3E051EB8, 0x3E0F5C29, 0x3E19999A, 0x3E23D70A, 0x3E2E147B,
4119 0x3E3851EC, 0x3E428F5C, 0x3E4CCCCD, 0x3E570A3D, 0x3E6147AE, 0x3E6B851F,
4120 0x3E75C28F, 0x3E800000, 0x3E851EB8, 0x3E8A3D71, 0x3E8F5C29, 0x3E947AE1,
4121 0x3E99999A, 0x3E9EB852, 0x3EA3D70A, 0x3EA8F5C3, 0x3EAE147B, 0x3EB33333,
4122 0x3EB851EC, 0x3EBD70A4, 0x3EC28F5C, 0x3EC7AE14, 0x3ECCCCCD, 0x3ED1EB85,
4123 0x3ED70A3D, 0x3EDC28F6, 0x3EE147AE, 0x3EE66666, 0x3EEB851F, 0x3EF0A3D7,
4124 0x3EF5C28F, 0x3EFAE148, 0x3F000000, 0x3F028F5C, 0x3F051EB8, 0x3F07AE14,
4125 0x3F0A3D71, 0x3F0CCCCD, 0x3F0F5C29, 0x3F11EB85, 0x3F147AE1, 0x3F170A3D,
4126 0x3F19999A, 0x3F1C28F6, 0x3F1EB852, 0x3F2147AE, 0x3F23D70A, 0x3F266666,
4127 0x3F28F5C3, 0x3F2B851F, 0x3F2E147B, 0x3F30A3D7, 0x3F333333, 0x3F35C28F,
4128 0x3F3851EC, 0x3F3AE148, 0x3F3D70A4, 0x3F400000, 0x3F428F5C, 0x3F451EB8,
4129 0x3F47AE14, 0x3F4A3D71, 0x3F4CCCCD, 0x3F4F5C29, 0x3F51EB85, 0x3F547AE1,
4130 0x3F570A3D, 0x3F59999A, 0x3F5C28F6, 0x3F5EB852, 0x3F6147AE, 0x3F63D70A,
4131 0x3F666666, 0x3F68F5C3, 0x3F6B851F, 0x3F6E147B, 0x3F70A3D7, 0x3F733333,
4132 0x3F75C28F, 0x3F7851EC, 0x3F7AE148, 0x3F7D70A4, 0x3F800000
4140 0x41200000, 0x41A00000, 0x41F00000, 0x42200000, 0x42480000, 0x42700000,
4141 0x428C0000, 0x42A00000, 0x42B40000, 0x42C80000, 0x42DC0000, 0x42F00000,
4142 0x43020000, 0x430C0000, 0x43160000, 0x43200000, 0x432A0000, 0x43340000,
4143 0x433E0000, 0x43480000, 0x43520000, 0x435C0000, 0x43660000, 0x43700000,
4144 0x437A0000, 0x43820000, 0x43870000, 0x438C0000, 0x43910000, 0x43960000,
4145 0x439B0000, 0x43A00000, 0x43A50000, 0x43AA0000, 0x43AF0000, 0x43B40000,
4146 0x43B90000, 0x43BE0000, 0x43C30000, 0x43C80000, 0x43CD0000, 0x43D20000,
4147 0x43D70000, 0x43DC0000, 0x43E10000, 0x43E60000, 0x43EB0000, 0x43F00000,
4148 0x43F50000, 0x43FA0000, 0x43FF0000, 0x44020000, 0x44048000, 0x44070000,
4149 0x44098000, 0x440C0000, 0x440E8000, 0x44110000, 0x44138000, 0x44160000,
4150 0x44188000, 0x441B0000, 0x441D8000, 0x44200000, 0x44228000, 0x44250000,
4151 0x44278000, 0x442A0000, 0x442C8000, 0x442F0000, 0x44318000, 0x44340000,
4152 0x44368000, 0x44390000, 0x443B8000, 0x443E0000, 0x44408000, 0x44430000,
4153 0x44458000, 0x44480000, 0x444A8000, 0x444D0000, 0x444F8000, 0x44520000,
4154 0x44548000, 0x44570000, 0x44598000, 0x445C0000, 0x445E8000, 0x44610000,
4155 0x44638000, 0x44660000, 0x44688000, 0x446B0000, 0x446D8000, 0x44700000,
4156 0x44728000, 0x44750000, 0x44778000, 0x447A0000
4163 0x41A00000, 0x41A80000, 0x41B00000, 0x41B80000, 0x41C00000, 0x41C80000,
4164 0x41D00000, 0x41D80000, 0x41E00000, 0x41E80000, 0x41F00000, 0x41F80000,
4165 0x42000000, 0x42040000, 0x42080000, 0x420C0000, 0x42100000, 0x42140000,
4166 0x42180000, 0x421C0000, 0x42200000, 0x42240000, 0x42280000, 0x422C0000,
4167 0x42300000, 0x42340000, 0x42380000, 0x423C0000, 0x42400000, 0x42440000,
4168 0x42480000, 0x424C0000, 0x42500000, 0x42540000, 0x42580000, 0x425C0000,
4169 0x42600000, 0x42640000, 0x42680000, 0x426C0000, 0x42700000, 0x42740000,
4170 0x42780000, 0x427C0000, 0x42800000, 0x42820000, 0x42840000, 0x42860000,
4171 0x42880000, 0x428A0000, 0x428C0000, 0x428E0000, 0x42900000, 0x42920000,
4172 0x42940000, 0x42960000, 0x42980000, 0x429A0000, 0x429C0000, 0x429E0000,
4173 0x42A00000, 0x42A20000, 0x42A40000, 0x42A60000, 0x42A80000, 0x42AA0000,
4174 0x42AC0000, 0x42AE0000, 0x42B00000, 0x42B20000, 0x42B40000, 0x42B60000,
4175 0x42B80000, 0x42BA0000, 0x42BC0000, 0x42BE0000, 0x42C00000, 0x42C20000,
4176 0x42C40000, 0x42C60000, 0x42C80000, 0x42CA0000, 0x42CC0000, 0x42CE0000,
4177 0x42D00000, 0x42D20000, 0x42D40000, 0x42D60000, 0x42D80000, 0x42DA0000,
4178 0x42DC0000, 0x42DE0000, 0x42E00000, 0x42E20000, 0x42E40000, 0x42E60000,
4179 0x42E80000, 0x42EA0000, 0x42EC0000, 0x42EE0000, 0x42F00000, 0x42F20000,
4180 0x42F40000, 0x42F60000, 0x42F80000, 0x42FA0000, 0x42FC0000, 0x42FE0000,
4181 0x43000000, 0x43010000, 0x43020000, 0x43030000, 0x43040000, 0x43050000,
4182 0x43060000, 0x43070000, 0x43080000, 0x43090000, 0x430A0000, 0x430B0000,
4183 0x430C0000, 0x430D0000, 0x430E0000, 0x430F0000, 0x43100000, 0x43110000,
4184 0x43120000, 0x43130000, 0x43140000, 0x43150000, 0x43160000, 0x43170000,
4185 0x43180000, 0x43190000, 0x431A0000, 0x431B0000, 0x431C0000, 0x431D0000,
4186 0x431E0000, 0x431F0000, 0x43200000, 0x43210000, 0x43220000, 0x43230000,
4187 0x43240000, 0x43250000, 0x43260000, 0x43270000, 0x43280000, 0x43290000,
4188 0x432A0000, 0x432B0000, 0x432C0000, 0x432D0000, 0x432E0000, 0x432F0000,
4189 0x43300000, 0x43310000, 0x43320000, 0x43330000, 0x43340000
4193 0x00000000, 0x3C23D70A, 0x3CA3D70A, 0x3CF5C28F, 0x3D23D70A, 0x3D4CCCCD,
4194 0x3D75C28F, 0x3D8F5C29, 0x3DA3D70A, 0x3DB851EC, 0x3DCCCCCD, 0x3DE147AE,
4195 0x3DF5C28F, 0x3E051EB8, 0x3E0F5C29, 0x3E19999A, 0x3E23D70A, 0x3E2E147B,
4196 0x3E3851EC, 0x3E428F5C, 0x3E4CCCCD, 0x3E570A3D, 0x3E6147AE, 0x3E6B851F,
4197 0x3E75C28F, 0x3E800000, 0x3E851EB8, 0x3E8A3D71, 0x3E8F5C29, 0x3E947AE1,
4198 0x3E99999A, 0x3E9EB852, 0x3EA3D70A, 0x3EA8F5C3, 0x3EAE147B, 0x3EB33333,
4199 0x3EB851EC, 0x3EBD70A4, 0x3EC28F5C, 0x3EC7AE14, 0x3ECCCCCD, 0x3ED1EB85,
4200 0x3ED70A3D, 0x3EDC28F6, 0x3EE147AE, 0x3EE66666, 0x3EEB851F, 0x3EF0A3D7,
4201 0x3EF5C28F, 0x3EFAE148, 0x3F000000, 0x3F028F5C, 0x3F051EB8, 0x3F07AE14,
4202 0x3F0A3D71, 0x3F0CCCCD, 0x3F0F5C29, 0x3F11EB85, 0x3F147AE1, 0x3F170A3D,
4203 0x3F19999A, 0x3F1C28F6, 0x3F1EB852, 0x3F2147AE, 0x3F23D70A, 0x3F266666,
4204 0x3F28F5C3, 0x3F2B851F, 0x3F2E147B, 0x3F30A3D7, 0x3F333333, 0x3F35C28F,
4205 0x3F3851EC, 0x3F3AE148, 0x3F3D70A4, 0x3F400000, 0x3F428F5C, 0x3F451EB8,
4206 0x3F47AE14, 0x3F4A3D71, 0x3F4CCCCD, 0x3F4F5C29, 0x3F51EB85, 0x3F547AE1,
4207 0x3F570A3D, 0x3F59999A, 0x3F5C28F6, 0x3F5EB852, 0x3F6147AE, 0x3F63D70A,
4208 0x3F666666, 0x3F68F5C3, 0x3F6B851F, 0x3F6E147B, 0x3F70A3D7, 0x3F733333,
4209 0x3F75C28F, 0x3F7851EC, 0x3F7AE148, 0x3F7D70A4, 0x3F800000
4213 0xC1C00000, 0xC1B80000, 0xC1B00000, 0xC1A80000, 0xC1A00000, 0xC1980000,
4214 0xC1900000, 0xC1880000, 0xC1800000, 0xC1700000, 0xC1600000, 0xC1500000,
4215 0xC1400000, 0xC1300000, 0xC1200000, 0xC1100000, 0xC1000000, 0xC0E00000,
4216 0xC0C00000, 0xC0A00000, 0xC0800000, 0xC0400000, 0xC0000000, 0xBF800000,
4217 0x00000000, 0x3F800000, 0x40000000, 0x40400000, 0x40800000, 0x40A00000,
4218 0x40C00000, 0x40E00000, 0x41000000, 0x41100000, 0x41200000, 0x41300000,
4219 0x41400000, 0x41500000, 0x41600000, 0x41700000, 0x41800000, 0x41880000,
4220 0x41900000, 0x41980000, 0x41A00000, 0x41A80000, 0x41B00000, 0x41B80000,
4221 0x41C00000
4227 int i = 0; in tuning_ctl_set()
4229 for (i = 0; i < TUNING_CTLS_COUNT; i++) in tuning_ctl_set()
4234 dspio_set_param(codec, ca0132_tuning_ctls[i].mid, 0x20, in tuning_ctl_set()
4252 return 0; in tuning_ctl_get()
4265 return 0; in voice_focus_ctl_info()
4280 return 0; in voice_focus_ctl_put()
4296 uinfo->value.integer.min = 0; in mic_svm_ctl_info()
4300 return 0; in mic_svm_ctl_info()
4315 return 0; in mic_svm_ctl_put()
4322 return 0; in mic_svm_ctl_put()
4331 uinfo->value.integer.min = 0; in equalizer_ctl_info()
4335 return 0; in equalizer_ctl_info()
4350 return 0; in equalizer_ctl_put()
4360 static const SNDRV_CTL_TLVD_DECLARE_DB_SCALE(voice_focus_db_scale, 2000, 100, 0);
4361 static const SNDRV_CTL_TLVD_DECLARE_DB_SCALE(eq_db_scale, -2400, 100, 0);
4370 HDA_CODEC_VOLUME_MONO(namestr, nid, 1, 0, type); in add_tuning_control()
4374 knew.tlv.c = 0; in add_tuning_control()
4375 knew.tlv.p = 0; in add_tuning_control()
4395 return 0; in add_tuning_control()
4398 HDA_COMPOSE_AMP_VAL(nid, 1, 0, type); in add_tuning_control()
4408 for (i = 0; i < TUNING_CTLS_COUNT; i++) { in add_tuning_ctls()
4414 if (err < 0) in add_tuning_ctls()
4418 return 0; in add_tuning_ctls()
4431 /* EQ defaults to 0dB. */ in ca0132_init_tuning_defaults()
4473 err = dspio_set_uint_param(codec, 0x80, 0x04, tmp); in ca0132_select_out()
4474 if (err < 0) in ca0132_select_out()
4478 err = dspio_set_uint_param(codec, 0x8f, 0x00, tmp); in ca0132_select_out()
4479 if (err < 0) in ca0132_select_out()
4483 snd_hda_codec_write(codec, spec->out_pins[1], 0, in ca0132_select_out()
4484 VENDOR_CHIPIO_EAPD_SEL_SET, 0x02); in ca0132_select_out()
4485 snd_hda_codec_write(codec, spec->out_pins[0], 0, in ca0132_select_out()
4486 AC_VERB_SET_EAPD_BTLENABLE, 0x00); in ca0132_select_out()
4487 snd_hda_codec_write(codec, spec->out_pins[0], 0, in ca0132_select_out()
4488 VENDOR_CHIPIO_EAPD_SEL_SET, 0x00); in ca0132_select_out()
4489 snd_hda_codec_write(codec, spec->out_pins[0], 0, in ca0132_select_out()
4490 AC_VERB_SET_EAPD_BTLENABLE, 0x02); in ca0132_select_out()
4493 pin_ctl = snd_hda_codec_read(codec, spec->out_pins[1], 0, in ca0132_select_out()
4494 AC_VERB_GET_PIN_WIDGET_CONTROL, 0); in ca0132_select_out()
4498 pin_ctl = snd_hda_codec_read(codec, spec->out_pins[0], 0, in ca0132_select_out()
4499 AC_VERB_GET_PIN_WIDGET_CONTROL, 0); in ca0132_select_out()
4500 snd_hda_set_pin_ctl(codec, spec->out_pins[0], in ca0132_select_out()
4506 err = dspio_set_uint_param(codec, 0x80, 0x04, tmp); in ca0132_select_out()
4507 if (err < 0) in ca0132_select_out()
4511 err = dspio_set_uint_param(codec, 0x8f, 0x00, tmp); in ca0132_select_out()
4512 if (err < 0) in ca0132_select_out()
4516 snd_hda_codec_write(codec, spec->out_pins[0], 0, in ca0132_select_out()
4517 VENDOR_CHIPIO_EAPD_SEL_SET, 0x00); in ca0132_select_out()
4518 snd_hda_codec_write(codec, spec->out_pins[0], 0, in ca0132_select_out()
4519 AC_VERB_SET_EAPD_BTLENABLE, 0x00); in ca0132_select_out()
4520 snd_hda_codec_write(codec, spec->out_pins[1], 0, in ca0132_select_out()
4521 VENDOR_CHIPIO_EAPD_SEL_SET, 0x02); in ca0132_select_out()
4522 snd_hda_codec_write(codec, spec->out_pins[0], 0, in ca0132_select_out()
4523 AC_VERB_SET_EAPD_BTLENABLE, 0x02); in ca0132_select_out()
4526 pin_ctl = snd_hda_codec_read(codec, spec->out_pins[0], 0, in ca0132_select_out()
4527 AC_VERB_GET_PIN_WIDGET_CONTROL, 0); in ca0132_select_out()
4528 snd_hda_set_pin_ctl(codec, spec->out_pins[0], in ca0132_select_out()
4531 pin_ctl = snd_hda_codec_read(codec, spec->out_pins[1], 0, in ca0132_select_out()
4532 AC_VERB_GET_PIN_WIDGET_CONTROL, 0); in ca0132_select_out()
4540 return err < 0 ? err : 0; in ca0132_select_out()
4558 for (i = 0; i < AE_CA0113_OUT_SET_COMMANDS; i++) in ae5_mmio_select_out()
4574 return 0; in ca0132_alt_set_full_range_speaker()
4577 tmp = spec->speaker_range_val[0] ? FLOAT_ZERO : FLOAT_ONE; in ca0132_alt_set_full_range_speaker()
4578 err = dspio_set_uint_param(codec, 0x96, in ca0132_alt_set_full_range_speaker()
4580 if (err < 0) in ca0132_alt_set_full_range_speaker()
4585 err = dspio_set_uint_param(codec, 0x96, in ca0132_alt_set_full_range_speaker()
4587 if (err < 0) in ca0132_alt_set_full_range_speaker()
4590 err = dspio_set_uint_param(codec, 0x96, in ca0132_alt_set_full_range_speaker()
4592 if (err < 0) in ca0132_alt_set_full_range_speaker()
4600 err = dspio_set_uint_param(codec, 0x96, in ca0132_alt_set_full_range_speaker()
4602 if (err < 0) in ca0132_alt_set_full_range_speaker()
4606 return 0; in ca0132_alt_set_full_range_speaker()
4622 err = dspio_set_uint_param(codec, 0x96, SPEAKER_BASS_REDIRECT, tmp); in ca0132_alt_surround_set_bass_redirection()
4623 if (err < 0) in ca0132_alt_surround_set_bass_redirection()
4629 err = dspio_set_uint_param(codec, 0x96, in ca0132_alt_surround_set_bass_redirection()
4631 if (err < 0) in ca0132_alt_surround_set_bass_redirection()
4635 return 0; in ca0132_alt_surround_set_bass_redirection()
4650 for (i = 0; i < ARRAY_SIZE(quirk_out_set_data); i++) { in ca0132_alt_select_out_get_quirk_data()
4668 return 0; in ca0132_alt_select_out_quirk_set()
4675 gpio_data = snd_hda_codec_read(codec, codec->core.afg, 0, in ca0132_alt_select_out_quirk_set()
4676 AC_VERB_GET_GPIO_DATA, 0); in ca0132_alt_select_out_quirk_set()
4683 snd_hda_codec_write(codec, codec->core.afg, 0, in ca0132_alt_select_out_quirk_set()
4688 for (i = 0; i < out_info->mmio_gpio_count; i++) { in ca0132_alt_select_out_quirk_set()
4695 for (i = 0; i < out_info->scp_cmds_count; i++) { in ca0132_alt_select_out_quirk_set()
4700 if (err < 0) in ca0132_alt_select_out_quirk_set()
4705 chipio_set_control_param(codec, 0x0d, out_info->dac2port); in ca0132_alt_select_out_quirk_set()
4717 zxr_headphone_gain_set(codec, 0); in ca0132_alt_select_out_quirk_set()
4728 return 0; in ca0132_alt_select_out_quirk_set()
4736 pin_ctl = snd_hda_codec_read(codec, nid, 0, in ca0132_set_out_node_pincfg()
4737 AC_VERB_GET_PIN_WIDGET_CONTROL, 0); in ca0132_set_out_node_pincfg()
4787 err = dspio_set_uint_param(codec, 0x96, SPEAKER_TUNING_MUTE, FLOAT_ONE); in ca0132_alt_select_out()
4788 if (err < 0) in ca0132_alt_select_out()
4791 if (ca0132_alt_select_out_quirk_set(codec) < 0) in ca0132_alt_select_out()
4799 snd_hda_codec_write(codec, spec->out_pins[0], 0, in ca0132_alt_select_out()
4800 AC_VERB_SET_EAPD_BTLENABLE, 0x01); in ca0132_alt_select_out()
4803 ca0132_set_out_node_pincfg(codec, spec->out_pins[1], 0, 0); in ca0132_alt_select_out()
4805 ca0132_set_out_node_pincfg(codec, spec->out_pins[0], 1, 0); in ca0132_alt_select_out()
4807 ca0132_set_out_node_pincfg(codec, spec->out_pins[2], 1, 0); in ca0132_alt_select_out()
4809 ca0132_set_out_node_pincfg(codec, spec->out_pins[3], 1, 0); in ca0132_alt_select_out()
4821 err = dspio_set_uint_param(codec, 0x80, 0x04, tmp); in ca0132_alt_select_out()
4822 if (err < 0) in ca0132_alt_select_out()
4828 snd_hda_codec_write(codec, spec->out_pins[0], 0, in ca0132_alt_select_out()
4829 AC_VERB_SET_EAPD_BTLENABLE, 0x00); in ca0132_alt_select_out()
4832 ca0132_set_out_node_pincfg(codec, spec->out_pins[0], 0, 0); in ca0132_alt_select_out()
4833 ca0132_set_out_node_pincfg(codec, spec->out_pins[2], 0, 0); in ca0132_alt_select_out()
4834 ca0132_set_out_node_pincfg(codec, spec->out_pins[3], 0, 0); in ca0132_alt_select_out()
4845 err = dspio_set_uint_param(codec, 0x80, 0x04, FLOAT_ONE); in ca0132_alt_select_out()
4847 err = dspio_set_uint_param(codec, 0x80, 0x04, FLOAT_ZERO); in ca0132_alt_select_out()
4849 if (err < 0) in ca0132_alt_select_out()
4862 /* Set speaker EQ bypass attenuation to 0. */ in ca0132_alt_select_out()
4863 err = dspio_set_uint_param(codec, 0x8f, 0x01, FLOAT_ZERO); in ca0132_alt_select_out()
4864 if (err < 0) in ca0132_alt_select_out()
4871 err = dspio_set_uint_param(codec, 0x96, in ca0132_alt_select_out()
4873 if (err < 0) in ca0132_alt_select_out()
4880 err = ca0132_alt_surround_set_bass_redirection(codec, 0); in ca0132_alt_select_out()
4883 err = dspio_set_uint_param(codec, 0x96, in ca0132_alt_select_out()
4885 if (err < 0) in ca0132_alt_select_out()
4890 if (err < 0) in ca0132_alt_select_out()
4897 return err < 0 ? err : 0; in ca0132_alt_select_out()
4913 jack->block_report = 0; in ca0132_unsol_hp_delayed()
4934 return 0; in ca0132_set_vipsource()
4936 /* if CrystalVoice if off, vipsource should be 0 */ in ca0132_set_vipsource()
4938 (val == 0)) { in ca0132_set_vipsource()
4939 chipio_set_control_param(codec, CONTROL_PARAM_VIP_SOURCE, 0); in ca0132_set_vipsource()
4946 dspio_set_uint_param(codec, 0x80, 0x00, tmp); in ca0132_set_vipsource()
4948 dspio_set_uint_param(codec, 0x80, 0x05, tmp); in ca0132_set_vipsource()
4956 dspio_set_uint_param(codec, 0x80, 0x00, tmp); in ca0132_set_vipsource()
4958 dspio_set_uint_param(codec, 0x80, 0x05, tmp); in ca0132_set_vipsource()
4972 return 0; in ca0132_alt_set_vipsource()
4976 chipio_set_stream_control(codec, 0x03, 0); in ca0132_alt_set_vipsource()
4977 chipio_set_stream_control(codec, 0x04, 0); in ca0132_alt_set_vipsource()
4979 /* if CrystalVoice is off, vipsource should be 0 */ in ca0132_alt_set_vipsource()
4981 (val == 0) || spec->in_enum_val == REAR_LINE_IN) { in ca0132_alt_set_vipsource()
4983 chipio_set_control_param(codec, CONTROL_PARAM_VIP_SOURCE, 0); in ca0132_alt_set_vipsource()
4986 dspio_set_uint_param(codec, 0x80, 0x05, tmp); in ca0132_alt_set_vipsource()
4991 chipio_set_conn_rate(codec, 0x0F, SR_96_000); in ca0132_alt_set_vipsource()
5003 dspio_set_uint_param(codec, 0x80, 0x00, tmp); in ca0132_alt_set_vipsource()
5010 chipio_set_conn_rate(codec, 0x0F, SR_16_000); in ca0132_alt_set_vipsource()
5016 dspio_set_uint_param(codec, 0x80, 0x00, tmp); in ca0132_alt_set_vipsource()
5019 dspio_set_uint_param(codec, 0x80, 0x05, tmp); in ca0132_alt_set_vipsource()
5025 chipio_set_stream_control(codec, 0x03, 1); in ca0132_alt_set_vipsource()
5026 chipio_set_stream_control(codec, 0x04, 1); in ca0132_alt_set_vipsource()
5064 ca0132_mic_boost_set(codec, 0); in ca0132_select_mic()
5072 ca0132_set_dmic(codec, 0); in ca0132_select_mic()
5075 ca0132_effects_set(codec, VOICE_FOCUS, 0); in ca0132_select_mic()
5080 return 0; in ca0132_select_mic()
5098 chipio_set_stream_control(codec, 0x03, 0); in ca0132_alt_select_in()
5099 chipio_set_stream_control(codec, 0x04, 0); in ca0132_alt_select_in()
5108 ca0113_mmio_gpio_set(codec, 0, false); in ca0132_alt_select_in()
5119 ca0113_mmio_command_set(codec, 0x30, 0x28, 0x00); in ca0132_alt_select_in()
5123 ca0113_mmio_command_set(codec, 0x30, 0x28, 0x00); in ca0132_alt_select_in()
5129 dspio_set_uint_param(codec, 0x80, 0x01, FLOAT_ZERO); in ca0132_alt_select_in()
5139 chipio_set_conn_rate(codec, 0x0F, SR_96_000); in ca0132_alt_select_in()
5141 dspio_set_uint_param(codec, 0x80, 0x00, tmp); in ca0132_alt_select_in()
5143 chipio_set_stream_control(codec, 0x03, 1); in ca0132_alt_select_in()
5144 chipio_set_stream_control(codec, 0x04, 1); in ca0132_alt_select_in()
5147 chipio_write(codec, 0x18B098, 0x0000000C); in ca0132_alt_select_in()
5148 chipio_write(codec, 0x18B09C, 0x0000000C); in ca0132_alt_select_in()
5151 chipio_write(codec, 0x18B098, 0x0000000C); in ca0132_alt_select_in()
5152 chipio_write(codec, 0x18B09C, 0x000000CC); in ca0132_alt_select_in()
5155 chipio_write(codec, 0x18B098, 0x0000000C); in ca0132_alt_select_in()
5156 chipio_write(codec, 0x18B09C, 0x0000004C); in ca0132_alt_select_in()
5164 ca0132_mic_boost_set(codec, 0); in ca0132_alt_select_in()
5168 ca0113_mmio_gpio_set(codec, 0, false); in ca0132_alt_select_in()
5174 ca0113_mmio_command_set(codec, 0x30, 0x28, 0x00); in ca0132_alt_select_in()
5177 ca0113_mmio_command_set(codec, 0x30, 0x28, 0x3f); in ca0132_alt_select_in()
5182 dspio_set_uint_param(codec, 0x80, 0x01, FLOAT_ZERO); in ca0132_alt_select_in()
5191 chipio_set_conn_rate(codec, 0x0F, SR_96_000); in ca0132_alt_select_in()
5197 dspio_set_uint_param(codec, 0x80, 0x00, tmp); in ca0132_alt_select_in()
5202 chipio_write(codec, 0x18B098, 0x00000000); in ca0132_alt_select_in()
5203 chipio_write(codec, 0x18B09C, 0x00000000); in ca0132_alt_select_in()
5208 chipio_set_stream_control(codec, 0x03, 1); in ca0132_alt_select_in()
5209 chipio_set_stream_control(codec, 0x04, 1); in ca0132_alt_select_in()
5215 ca0113_mmio_gpio_set(codec, 0, true); in ca0132_alt_select_in()
5224 ca0113_mmio_command_set(codec, 0x30, 0x28, 0x3f); in ca0132_alt_select_in()
5235 chipio_set_conn_rate(codec, 0x0F, SR_96_000); in ca0132_alt_select_in()
5237 dspio_set_uint_param(codec, 0x80, 0x00, tmp); in ca0132_alt_select_in()
5239 chipio_set_stream_control(codec, 0x03, 1); in ca0132_alt_select_in()
5240 chipio_set_stream_control(codec, 0x04, 1); in ca0132_alt_select_in()
5244 chipio_write(codec, 0x18B098, 0x0000000C); in ca0132_alt_select_in()
5245 chipio_write(codec, 0x18B09C, 0x000000CC); in ca0132_alt_select_in()
5248 chipio_write(codec, 0x18B098, 0x0000000C); in ca0132_alt_select_in()
5249 chipio_write(codec, 0x18B09C, 0x0000004C); in ca0132_alt_select_in()
5260 return 0; in ca0132_alt_select_in()
5292 * They return 0 if no changed. Return 1 if changed.
5308 ca0132_voicefx.reqs[0], tmp); in ca0132_voicefx_set()
5321 int err = 0; in ca0132_effects_set()
5324 if ((idx < 0) || (idx >= num_fx)) in ca0132_effects_set()
5325 return 0; /* no changed */ in ca0132_effects_set()
5331 val = 0; in ca0132_effects_set()
5336 val = 0; in ca0132_effects_set()
5344 val = 0; in ca0132_effects_set()
5348 val = 0; in ca0132_effects_set()
5363 dspio_set_uint_param(codec, 0x80, 0x00, tmp); in ca0132_effects_set()
5368 * to module ID 0x47. No clue why. in ca0132_effects_set()
5382 dspio_set_uint_param(codec, 0x47, 0x00, tmp); in ca0132_effects_set()
5388 val = 0; in ca0132_effects_set()
5391 codec_dbg(codec, "ca0132_effect_set: nid=0x%x, val=%ld\n", in ca0132_effects_set()
5394 on = (val == 0) ? FLOAT_ZERO : FLOAT_ONE; in ca0132_effects_set()
5396 ca0132_effects[idx].reqs[0], on); in ca0132_effects_set()
5398 if (err < 0) in ca0132_effects_set()
5399 return 0; /* no changed */ in ca0132_effects_set()
5411 int i, ret = 0; in ca0132_pe_switch_set()
5432 unsigned int oldval = snd_hda_codec_read(codec, spec->adcs[0], 0, in stop_mic1()
5433 AC_VERB_GET_CONV, 0); in stop_mic1()
5434 if (oldval != 0) in stop_mic1()
5435 snd_hda_codec_write(codec, spec->adcs[0], 0, in stop_mic1()
5437 0); in stop_mic1()
5446 if (oldval != 0) in resume_mic1()
5447 snd_hda_codec_write(codec, spec->adcs[0], 0, in resume_mic1()
5459 int i, ret = 0; in ca0132_cvoice_switch_set()
5472 ret |= ca0132_voicefx_set(codec, (spec->voicefx_val ? 1 : 0)); in ca0132_cvoice_switch_set()
5487 int ret = 0; in ca0132_mic_boost_set()
5490 ret = snd_hda_codec_amp_update(codec, spec->input_pins[0], 0, in ca0132_mic_boost_set()
5491 HDA_INPUT, 0, HDA_AMP_VOLMASK, 3); in ca0132_mic_boost_set()
5493 ret = snd_hda_codec_amp_update(codec, spec->input_pins[0], 0, in ca0132_mic_boost_set()
5494 HDA_INPUT, 0, HDA_AMP_VOLMASK, 0); in ca0132_mic_boost_set()
5502 int ret = 0; in ca0132_alt_mic_boost_set()
5504 ret = snd_hda_codec_amp_update(codec, spec->input_pins[0], 0, in ca0132_alt_mic_boost_set()
5505 HDA_INPUT, 0, HDA_AMP_VOLMASK, val); in ca0132_alt_mic_boost_set()
5513 for (i = 0; i < 4; i++) in ae5_headphone_gain_set()
5514 ca0113_mmio_command_set(codec, 0x48, 0x11 + i, in ae5_headphone_gain_set()
5516 return 0; in ae5_headphone_gain_set()
5527 return 0; in zxr_headphone_gain_set()
5535 hda_nid_t shared_nid = 0; in ca0132_vnode_switch_set()
5537 int ret = 0; in ca0132_vnode_switch_set()
5584 0, dir); in ca0132_vnode_switch_set()
5599 dspio_set_param(codec, 0x96, 0x20, SPEAKER_BASS_REDIRECT_XOVER_FREQ, in ca0132_alt_bass_redirection_xover_set()
5617 int i = 0; in ca0132_alt_slider_ctl_set()
5630 for (i = 0; i < OUT_EFFECTS_COUNT; i++) in ca0132_alt_slider_ctl_set()
5634 dspio_set_param(codec, ca0132_effects[i].mid, 0x20, in ca0132_alt_slider_ctl_set()
5639 for (i = 0; i < OUT_EFFECTS_COUNT; i++) in ca0132_alt_slider_ctl_set()
5643 dspio_set_param(codec, ca0132_effects[i].mid, 0x20, in ca0132_alt_slider_ctl_set()
5650 return 0; in ca0132_alt_slider_ctl_set()
5666 return 0; in ca0132_alt_xbass_xover_slider_ctl_get()
5679 return 0; in ca0132_alt_slider_ctl_get()
5695 return 0; in ca0132_alt_xbass_xover_slider_info()
5705 uinfo->value.integer.min = 0; in ca0132_alt_effect_slider_info()
5709 return 0; in ca0132_alt_effect_slider_info()
5729 return 0; in ca0132_alt_xbass_xover_slider_put()
5739 return 0; in ca0132_alt_xbass_xover_slider_put()
5754 return 0; in ca0132_alt_effect_slider_put()
5761 return 0; in ca0132_alt_effect_slider_put()
5768 * traditional 0-100 in alsamixer that goes in big steps. I like enum better.
5786 return 0; in ca0132_alt_mic_boost_info()
5795 ucontrol->value.enumerated.item[0] = spec->mic_boost_enum_val; in ca0132_alt_mic_boost_get()
5796 return 0; in ca0132_alt_mic_boost_get()
5804 int sel = ucontrol->value.enumerated.item[0]; in ca0132_alt_mic_boost_put()
5808 return 0; in ca0132_alt_mic_boost_put()
5840 return 0; in ae5_headphone_gain_info()
5849 ucontrol->value.enumerated.item[0] = spec->ae5_headphone_gain_val; in ae5_headphone_gain_get()
5850 return 0; in ae5_headphone_gain_get()
5858 int sel = ucontrol->value.enumerated.item[0]; in ae5_headphone_gain_put()
5862 return 0; in ae5_headphone_gain_put()
5893 return 0; in ae5_sound_filter_info()
5902 ucontrol->value.enumerated.item[0] = spec->ae5_filter_val; in ae5_sound_filter_get()
5903 return 0; in ae5_sound_filter_get()
5911 int sel = ucontrol->value.enumerated.item[0]; in ae5_sound_filter_put()
5915 return 0; in ae5_sound_filter_put()
5922 ca0113_mmio_command_set_type2(codec, 0x48, 0x07, in ae5_sound_filter_put()
5943 return 0; in ca0132_alt_input_source_info()
5952 ucontrol->value.enumerated.item[0] = spec->in_enum_val; in ca0132_alt_input_source_get()
5953 return 0; in ca0132_alt_input_source_get()
5961 int sel = ucontrol->value.enumerated.item[0]; in ca0132_alt_input_source_put()
5972 return 0; in ca0132_alt_input_source_put()
5995 return 0; in ca0132_alt_output_select_get_info()
6004 ucontrol->value.enumerated.item[0] = spec->out_enum_val; in ca0132_alt_output_select_get()
6005 return 0; in ca0132_alt_output_select_get()
6013 int sel = ucontrol->value.enumerated.item[0]; in ca0132_alt_output_select_put()
6018 return 0; in ca0132_alt_output_select_put()
6046 return 0; in ca0132_alt_speaker_channel_cfg_get_info()
6055 ucontrol->value.enumerated.item[0] = spec->channel_cfg_val; in ca0132_alt_speaker_channel_cfg_get()
6056 return 0; in ca0132_alt_speaker_channel_cfg_get()
6064 int sel = ucontrol->value.enumerated.item[0]; in ca0132_alt_speaker_channel_cfg_put()
6068 return 0; in ca0132_alt_speaker_channel_cfg_put()
6099 return 0; in ca0132_alt_svm_setting_info()
6108 ucontrol->value.enumerated.item[0] = spec->smart_volume_setting; in ca0132_alt_svm_setting_get()
6109 return 0; in ca0132_alt_svm_setting_get()
6117 int sel = ucontrol->value.enumerated.item[0]; in ca0132_alt_svm_setting_put()
6123 return 0; in ca0132_alt_svm_setting_put()
6131 case 0: in ca0132_alt_svm_setting_put()
6163 return 0; in ca0132_alt_eq_preset_info()
6172 ucontrol->value.enumerated.item[0] = spec->eq_preset_val; in ca0132_alt_eq_preset_get()
6173 return 0; in ca0132_alt_eq_preset_get()
6181 int i, err = 0; in ca0132_alt_eq_preset_put()
6182 int sel = ucontrol->value.enumerated.item[0]; in ca0132_alt_eq_preset_put()
6186 return 0; in ca0132_alt_eq_preset_put()
6191 * Idx 0 is default. in ca0132_alt_eq_preset_put()
6194 for (i = 0; i < EQ_PRESET_MAX_PARAM_COUNT; i++) { in ca0132_alt_eq_preset_put()
6198 if (err < 0) in ca0132_alt_eq_preset_put()
6202 if (err >= 0) in ca0132_alt_eq_preset_put()
6220 return 0; in ca0132_voicefx_info()
6229 ucontrol->value.enumerated.item[0] = spec->voicefx_val; in ca0132_voicefx_get()
6230 return 0; in ca0132_voicefx_get()
6238 int i, err = 0; in ca0132_voicefx_put()
6239 int sel = ucontrol->value.enumerated.item[0]; in ca0132_voicefx_put()
6242 return 0; in ca0132_voicefx_put()
6248 * Idx 0 is default. in ca0132_voicefx_put()
6251 for (i = 0; i < VOICEFX_MAX_PARAM_COUNT; i++) { in ca0132_voicefx_put()
6255 if (err < 0) in ca0132_voicefx_put()
6259 if (err >= 0) { in ca0132_voicefx_put()
6262 ca0132_voicefx_set(codec, (sel ? 1 : 0)); in ca0132_voicefx_put()
6287 return 0; in ca0132_switch_get()
6293 return 0; in ca0132_switch_get()
6297 if (nid == spec->input_pins[0]) { in ca0132_switch_get()
6299 return 0; in ca0132_switch_get()
6304 return 0; in ca0132_switch_get()
6309 return 0; in ca0132_switch_get()
6314 return 0; in ca0132_switch_get()
6317 return 0; in ca0132_switch_get()
6330 codec_dbg(codec, "ca0132_switch_put: nid=0x%x, val=%ld\n", in ca0132_switch_put()
6371 if (nid == spec->input_pins[0]) { in ca0132_switch_put()
6390 changed = 0; in ca0132_switch_put()
6400 changed = 0; in ca0132_switch_put()
6408 changed = 0; in ca0132_switch_put()
6439 ca0132_alt_vol_ctls[dsp_dir].reqs[0], in ca0132_alt_dsp_volume_put()
6471 kcontrol->private_value = HDA_COMPOSE_AMP_VAL(nid, ch, 0, dir); in ca0132_volume_info()
6481 kcontrol->private_value = HDA_COMPOSE_AMP_VAL(nid, ch, 0, dir); in ca0132_volume_info()
6510 return 0; in ca0132_volume_get()
6521 hda_nid_t shared_nid = 0; in ca0132_volume_put()
6545 0, dir); in ca0132_volume_put()
6568 hda_nid_t vnid = 0; in ca0132_alt_volume_put()
6572 case 0x02: in ca0132_alt_volume_put()
6575 case 0x07: in ca0132_alt_volume_put()
6617 kcontrol->private_value = HDA_COMPOSE_AMP_VAL(nid, ch, 0, dir); in ca0132_volume_tlv()
6627 kcontrol->private_value = HDA_COMPOSE_AMP_VAL(nid, ch, 0, dir); in ca0132_volume_tlv()
6645 HDA_CODEC_VOLUME_MONO(namestr, nid, 1, 0, type); in ca0132_alt_add_effect_slider()
6662 HDA_COMPOSE_AMP_VAL(nid, 1, 0, type); in ca0132_alt_add_effect_slider()
6697 VOICEFX, 1, 0, HDA_INPUT); in add_voicefx()
6709 EQ_PRESET_ENUM, 1, 0, HDA_OUTPUT); in add_ca0132_alt_eq_presets()
6726 SMART_VOLUME_ENUM, 1, 0, HDA_OUTPUT); in ca0132_alt_add_svm_enum()
6743 OUTPUT_SOURCE_ENUM, 1, 0, HDA_OUTPUT); in ca0132_alt_add_output_enum()
6760 SPEAKER_CHANNEL_CFG_ENUM, 1, 0, HDA_OUTPUT); in ca0132_alt_add_speaker_channel_cfg_enum()
6803 HDA_CODEC_VOLUME_MONO(namestr, BASS_REDIRECTION_XOVER, 1, 0, in ca0132_alt_add_bass_redirection_crossover()
6835 INPUT_SOURCE_ENUM, 1, 0, HDA_INPUT); in ca0132_alt_add_input_enum()
6844 * Add mic boost enumerated control. Switches through 0dB to 30dB. This adds
6851 MIC_BOOST_ENUM, 1, 0, HDA_INPUT); in ca0132_alt_add_mic_boost_enum()
6869 AE5_HEADPHONE_GAIN_ENUM, 1, 0, HDA_OUTPUT); in ae5_add_headphone_gain_enum()
6886 AE5_SOUND_FILTER_ENUM, 1, 0, HDA_OUTPUT); in ae5_add_sound_filter_enum()
6914 * I think this has to do with the pin for rear surround being 0x11,
6915 * and the center/lfe being 0x10. Usually the pin order is the opposite.
6933 int err = 0; in ca0132_alt_add_chmap_ctls()
6946 elem, hinfo->channels_max, 0, &chmap); in ca0132_alt_add_chmap_ctls()
6947 if (err < 0) in ca0132_alt_add_chmap_ctls()
6962 HDA_CODEC_VOLUME("Analog-Mic2 Capture Volume", 0x08, 0, HDA_INPUT),
6963 HDA_CODEC_MUTE("Analog-Mic2 Capture Switch", 0x08, 0, HDA_INPUT),
6964 HDA_CODEC_VOLUME("What U Hear Capture Volume", 0x0a, 0, HDA_INPUT),
6965 HDA_CODEC_MUTE("What U Hear Capture Switch", 0x0a, 0, HDA_INPUT),
6967 0x12, 1, HDA_INPUT),
6985 CA0132_ALT_CODEC_VOL("Front Playback Volume", 0x02, HDA_OUTPUT),
6987 HDA_CODEC_VOLUME("Surround Playback Volume", 0x04, 0, HDA_OUTPUT),
6988 HDA_CODEC_MUTE("Surround Playback Switch", 0x04, 0, HDA_OUTPUT),
6989 HDA_CODEC_VOLUME_MONO("Center Playback Volume", 0x03, 1, 0, HDA_OUTPUT),
6990 HDA_CODEC_MUTE_MONO("Center Playback Switch", 0x03, 1, 0, HDA_OUTPUT),
6991 HDA_CODEC_VOLUME_MONO("LFE Playback Volume", 0x03, 2, 0, HDA_OUTPUT),
6992 HDA_CODEC_MUTE_MONO("LFE Playback Switch", 0x03, 2, 0, HDA_OUTPUT),
6993 CA0132_ALT_CODEC_VOL("Capture Volume", 0x07, HDA_INPUT),
6995 HDA_CODEC_VOLUME("What U Hear Capture Volume", 0x0a, 0, HDA_INPUT),
6996 HDA_CODEC_MUTE("What U Hear Capture Switch", 0x0a, 0, HDA_INPUT),
7007 CA0132_ALT_CODEC_VOL("Front Playback Volume", 0x02, HDA_OUTPUT),
7009 HDA_CODEC_VOLUME("Surround Playback Volume", 0x04, 0, HDA_OUTPUT),
7010 HDA_CODEC_MUTE("Surround Playback Switch", 0x04, 0, HDA_OUTPUT),
7011 HDA_CODEC_VOLUME_MONO("Center Playback Volume", 0x03, 1, 0, HDA_OUTPUT),
7012 HDA_CODEC_MUTE_MONO("Center Playback Switch", 0x03, 1, 0, HDA_OUTPUT),
7013 HDA_CODEC_VOLUME_MONO("LFE Playback Volume", 0x03, 2, 0, HDA_OUTPUT),
7014 HDA_CODEC_MUTE_MONO("LFE Playback Switch", 0x03, 2, 0, HDA_OUTPUT),
7017 HDA_CODEC_VOLUME("What U Hear Capture Volume", 0x0a, 0, HDA_INPUT),
7018 HDA_CODEC_MUTE("What U Hear Capture Switch", 0x0a, 0, HDA_INPUT),
7028 int err = 0; in ca0132_build_controls()
7031 for (i = 0; i < spec->num_mixers; i++) { in ca0132_build_controls()
7033 if (err < 0) in ca0132_build_controls()
7038 snd_hda_set_vmaster_tlv(codec, spec->dacs[0], HDA_OUTPUT, in ca0132_build_controls()
7042 "Playback Volume", 0); in ca0132_build_controls()
7046 true, 0, &spec->vmaster_mute.sw_kctl); in ca0132_build_controls()
7047 if (err < 0) in ca0132_build_controls()
7055 for (i = 0; i < num_fx; i++) { in ca0132_build_controls()
7066 if (err < 0) in ca0132_build_controls()
7076 if (err < 0) in ca0132_build_controls()
7080 if (err < 0) in ca0132_build_controls()
7084 "Enable OutFX", 0); in ca0132_build_controls()
7085 if (err < 0) in ca0132_build_controls()
7090 if (err < 0) in ca0132_build_controls()
7094 for (i = 0; i < num_sliders; i++) { in ca0132_build_controls()
7099 if (err < 0) in ca0132_build_controls()
7106 if (err < 0) in ca0132_build_controls()
7110 "PlayEnhancement", 0); in ca0132_build_controls()
7111 if (err < 0) in ca0132_build_controls()
7116 if (err < 0) in ca0132_build_controls()
7120 if (err < 0) in ca0132_build_controls()
7130 if (err < 0) in ca0132_build_controls()
7133 if (err < 0) in ca0132_build_controls()
7136 if (err < 0) in ca0132_build_controls()
7139 if (err < 0) in ca0132_build_controls()
7142 if (err < 0) in ca0132_build_controls()
7145 if (err < 0) in ca0132_build_controls()
7148 if (err < 0) in ca0132_build_controls()
7156 if (err < 0) in ca0132_build_controls()
7165 if (err < 0) in ca0132_build_controls()
7168 if (err < 0) in ca0132_build_controls()
7173 if (err < 0) in ca0132_build_controls()
7185 if (err < 0) in ca0132_build_controls()
7191 if (err < 0) in ca0132_build_controls()
7194 if (err < 0) in ca0132_build_controls()
7201 if (err < 0) in ca0132_build_controls()
7208 return 0; in ca0132_build_controls()
7214 int err = 0; in dbpro_build_controls()
7219 if (err < 0) in dbpro_build_controls()
7225 if (err < 0) in dbpro_build_controls()
7229 return 0; in dbpro_build_controls()
7289 info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid = spec->dacs[0]; in ca0132_build_pcms()
7294 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->adcs[0]; in ca0132_build_pcms()
7315 return 0; in ca0132_build_pcms()
7332 return 0; in ca0132_build_pcms()
7345 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->adcs[0]; in dbpro_build_pcms()
7349 return 0; in dbpro_build_pcms()
7366 return 0; in dbpro_build_pcms()
7374 snd_hda_codec_write(codec, pin, 0, in init_output()
7379 snd_hda_codec_write(codec, dac, 0, in init_output()
7388 snd_hda_codec_write(codec, pin, 0, in init_input()
7390 AMP_IN_UNMUTE(0)); in init_input()
7393 snd_hda_codec_write(codec, adc, 0, AC_VERB_SET_AMP_GAIN_MUTE, in init_input()
7394 AMP_IN_UNMUTE(0)); in init_input()
7396 /* init to 0 dB and unmute. */ in init_input()
7397 snd_hda_codec_amp_stereo(codec, adc, HDA_INPUT, 0, in init_input()
7398 HDA_AMP_VOLMASK, 0x5a); in init_input()
7399 snd_hda_codec_amp_stereo(codec, adc, HDA_INPUT, 0, in init_input()
7400 HDA_AMP_MUTE, 0); in init_input()
7426 ca0132_set_vipsource(codec, 0); in ca0132_set_dmic()
7430 dspio_set_uint_param(codec, 0x80, 0x00, tmp); in ca0132_set_dmic()
7433 val |= 0x80; in ca0132_set_dmic()
7434 snd_hda_codec_write(codec, spec->input_pins[0], 0, in ca0132_set_dmic()
7437 if (!(spec->dmic_ctl & 0x20)) in ca0132_set_dmic()
7442 dspio_set_uint_param(codec, 0x80, 0x00, tmp); in ca0132_set_dmic()
7446 val &= 0x5f; in ca0132_set_dmic()
7447 snd_hda_codec_write(codec, spec->input_pins[0], 0, in ca0132_set_dmic()
7450 if (!(spec->dmic_ctl & 0x20)) in ca0132_set_dmic()
7451 chipio_set_control_flag(codec, CONTROL_FLAG_DMIC, 0); in ca0132_set_dmic()
7470 * Bit 2-0: MPIO select in ca0132_init_dmic()
7474 val = 0x01; in ca0132_init_dmic()
7475 snd_hda_codec_write(codec, spec->input_pins[0], 0, in ca0132_init_dmic()
7479 * Bit 2-0: Data1 MPIO select in ca0132_init_dmic()
7484 val = 0x83; in ca0132_init_dmic()
7485 snd_hda_codec_write(codec, spec->input_pins[0], 0, in ca0132_init_dmic()
7488 /* Use Ch-0 and Ch-1. Rate is 48K, mode 1. Disable DMic first. in ca0132_init_dmic()
7489 * Bit 3-0: Channel mask in ca0132_init_dmic()
7496 val = 0x33; in ca0132_init_dmic()
7498 val = 0x23; in ca0132_init_dmic()
7501 snd_hda_codec_write(codec, spec->input_pins[0], 0, in ca0132_init_dmic()
7514 chipio_8051_write_exram_no_mutex(codec, 0x1920, 0x00); in ca0132_init_analog_mic2()
7515 chipio_8051_write_exram_no_mutex(codec, 0x192d, 0x00); in ca0132_init_analog_mic2()
7528 for (i = 0; i < spec->multiout.num_dacs; i++) in ca0132_refresh_widget_caps()
7531 for (i = 0; i < spec->num_outputs; i++) in ca0132_refresh_widget_caps()
7534 for (i = 0; i < spec->num_inputs; i++) { in ca0132_refresh_widget_caps()
7549 if (status >= 0) { in ca0132_alt_free_active_dma_channels()
7550 /* AND against 0xfff to get the active channel bits. */ in ca0132_alt_free_active_dma_channels()
7551 tmp = tmp & 0xfff; in ca0132_alt_free_active_dma_channels()
7566 for (i = 0; i < DSPDMAC_DMA_CFG_CHANNEL_COUNT; i++) { in ca0132_alt_free_active_dma_channels()
7569 if (status < 0) in ca0132_alt_free_active_dma_channels()
7594 * DSP stream that uses the DMA channels. These are 0x0c, the audio output
7595 * stream, 0x03, analog mic 1, and 0x04, analog mic 2.
7599 static const unsigned int dsp_dma_stream_ids[] = { 0x0c, 0x03, 0x04 }; in ca0132_alt_start_dsp_audio_streams()
7609 for (i = 0; i < ARRAY_SIZE(dsp_dma_stream_ids); i++) { in ca0132_alt_start_dsp_audio_streams()
7614 dsp_dma_stream_ids[i], 0); in ca0132_alt_start_dsp_audio_streams()
7629 /* Make sure stream 0x0c is six channels. */ in ca0132_alt_start_dsp_audio_streams()
7630 chipio_set_stream_channels(codec, 0x0c, 6); in ca0132_alt_start_dsp_audio_streams()
7632 for (i = 0; i < ARRAY_SIZE(dsp_dma_stream_ids); i++) { in ca0132_alt_start_dsp_audio_streams()
7644 * The region of ChipIO memory from 0x190000-0x1903fc is a sort of 'audio
7647 * value. The 2-bit number value is seemingly 0 if inactive, 1 if active,
7650 * 0x0001f8c0
7654 * the region of exram memory from 0x1477-0x1575 has each byte represent an
7655 * entry within the 0x190000 range, and when a range of entries is in use, the
7656 * ending value is overwritten with 0xff.
7657 * 0x1578 in exram is a table of 0x25 entries, corresponding to the ChipIO
7658 * streamID's, where each entry is a starting 0x190000 port offset.
7659 * 0x159d in exram is the same as 0x1578, except it contains the ending port
7667 * 0x00-0x1f: HDA audio stream input/output ports.
7668 * 0x80-0xbf: Sample rate converter input/outputs. Only valid ports seem to
7669 * have the lower-nibble set to 0x1, 0x2, and 0x9.
7670 * 0xc0-0xdf: DSP DMA input/output ports. Dynamically assigned.
7671 * 0xe0-0xff: DAC/ADC audio input/output ports.
7674 * 0x03: Mic1 ADC to DSP.
7675 * 0x04: Mic2 ADC to DSP.
7676 * 0x05: HDA node 0x02 audio stream to DSP.
7677 * 0x0f: DSP Mic exit to HDA node 0x07.
7678 * 0x0c: DSP processed audio to DACs.
7679 * 0x14: DAC0, front L/R.
7693 chipio_8051_read_exram(codec, 0x1578 + remap_data->stream_id, in chipio_remap_stream()
7697 * Check if the stream's port value is 0xff, because the 8051 may not in chipio_remap_stream()
7701 if (stream_offset == 0xff) { in chipio_remap_stream()
7702 for (i = 0; i < 5; i++) { in chipio_remap_stream()
7705 chipio_8051_read_exram(codec, 0x1578 + remap_data->stream_id, in chipio_remap_stream()
7708 if (stream_offset != 0xff) in chipio_remap_stream()
7713 if (stream_offset == 0xff) { in chipio_remap_stream()
7714 codec_info(codec, "%s: Stream 0x%02x ports aren't allocated, remap failed!\n", in chipio_remap_stream()
7720 stream_offset *= 0x04; in chipio_remap_stream()
7721 stream_offset += 0x190000; in chipio_remap_stream()
7723 for (i = 0; i < remap_data->count; i++) { in chipio_remap_stream()
7730 chipio_write_no_mutex(codec, 0x19042c, 0x00000001); in chipio_remap_stream()
7738 0x394f9e38, 0x394f9e38, 0x00000000, 0x00000000, 0x00000000, 0x00000000
7743 0x00000000, 0x00000000, 0x3966afcd, 0x3966afcd, 0x3966afcd, 0x3966afcd
7748 0x00000000, 0x00000000, 0x38d1b717, 0x38d1b717, 0x38d1b717, 0x38d1b717
7777 dspio_set_uint_param(codec, 0x96, SPEAKER_TUNING_ENABLE_CENTER_EQ, tmp); in ca0132_alt_init_speaker_tuning()
7782 dspio_set_uint_param(codec, 0x96, i, tmp); in ca0132_alt_init_speaker_tuning()
7787 dspio_set_uint_param(codec, 0x96, i, tmp); in ca0132_alt_init_speaker_tuning()
7790 for (i = 0; i < 6; i++) in ca0132_alt_init_speaker_tuning()
7791 dspio_set_uint_param(codec, 0x96, in ca0132_alt_init_speaker_tuning()
7807 chipio_set_conn_rate(codec, 0x0F, SR_96_000); in ca0132_alt_init_analog_mics()
7811 dspio_set_uint_param(codec, 0x80, 0x00, tmp); in ca0132_alt_init_analog_mics()
7817 chipio_set_conn_rate(codec, 0x0F, SR_96_000); in ca0132_alt_init_analog_mics()
7819 dspio_set_uint_param(codec, 0x80, 0x01, tmp); in ca0132_alt_init_analog_mics()
7823 * Sets the source of stream 0x14 to connpointID 0x48, and the destination
7824 * connpointID to 0x91. If this isn't done, the destination is 0x71, and
7836 /* This value is 0x43 for 96khz, and 0x83 for 192khz. */ in sbz_connect_streams()
7837 chipio_write_no_mutex(codec, 0x18a020, 0x00000043); in sbz_connect_streams()
7839 /* Setup stream 0x14 with it's source and destination points */ in sbz_connect_streams()
7840 chipio_set_stream_source_dest(codec, 0x14, 0x48, 0x91); in sbz_connect_streams()
7841 chipio_set_conn_rate_no_mutex(codec, 0x48, SR_96_000); in sbz_connect_streams()
7842 chipio_set_conn_rate_no_mutex(codec, 0x91, SR_96_000); in sbz_connect_streams()
7843 chipio_set_stream_channels(codec, 0x14, 2); in sbz_connect_streams()
7844 chipio_set_stream_control(codec, 0x14, 1); in sbz_connect_streams()
7866 chipio_remap_stream(codec, &stream_remap_data[0]); in sbz_chipio_startup_data()
7895 chipio_set_stream_control(codec, 0x03, 0); in ca0132_alt_dsp_initial_mic_setup()
7896 chipio_set_stream_control(codec, 0x04, 0); in ca0132_alt_dsp_initial_mic_setup()
7902 dspio_set_uint_param(codec, 0x80, 0x00, tmp); in ca0132_alt_dsp_initial_mic_setup()
7904 chipio_set_stream_control(codec, 0x03, 1); in ca0132_alt_dsp_initial_mic_setup()
7905 chipio_set_stream_control(codec, 0x04, 1); in ca0132_alt_dsp_initial_mic_setup()
7909 chipio_write(codec, 0x18b098, 0x0000000c); in ca0132_alt_dsp_initial_mic_setup()
7910 chipio_write(codec, 0x18b09C, 0x0000000c); in ca0132_alt_dsp_initial_mic_setup()
7913 chipio_write(codec, 0x18b098, 0x0000000c); in ca0132_alt_dsp_initial_mic_setup()
7914 chipio_write(codec, 0x18b09c, 0x0000004c); in ca0132_alt_dsp_initial_mic_setup()
7925 chipio_8051_write_direct(codec, 0x93, 0x10); in ae5_post_dsp_register_set()
7926 chipio_8051_write_pll_pmu(codec, 0x44, 0xc2); in ae5_post_dsp_register_set()
7928 writeb(0xff, spec->mem_base + 0x304); in ae5_post_dsp_register_set()
7929 writeb(0xff, spec->mem_base + 0x304); in ae5_post_dsp_register_set()
7930 writeb(0xff, spec->mem_base + 0x304); in ae5_post_dsp_register_set()
7931 writeb(0xff, spec->mem_base + 0x304); in ae5_post_dsp_register_set()
7932 writeb(0x00, spec->mem_base + 0x100); in ae5_post_dsp_register_set()
7933 writeb(0xff, spec->mem_base + 0x304); in ae5_post_dsp_register_set()
7934 writeb(0x00, spec->mem_base + 0x100); in ae5_post_dsp_register_set()
7935 writeb(0xff, spec->mem_base + 0x304); in ae5_post_dsp_register_set()
7936 writeb(0x00, spec->mem_base + 0x100); in ae5_post_dsp_register_set()
7937 writeb(0xff, spec->mem_base + 0x304); in ae5_post_dsp_register_set()
7938 writeb(0x00, spec->mem_base + 0x100); in ae5_post_dsp_register_set()
7939 writeb(0xff, spec->mem_base + 0x304); in ae5_post_dsp_register_set()
7941 ca0113_mmio_command_set(codec, 0x30, 0x2b, 0x3f); in ae5_post_dsp_register_set()
7942 ca0113_mmio_command_set(codec, 0x30, 0x2d, 0x3f); in ae5_post_dsp_register_set()
7943 ca0113_mmio_command_set(codec, 0x48, 0x07, 0x83); in ae5_post_dsp_register_set()
7953 chipio_set_control_param(codec, 3, 0); in ae5_post_dsp_param_setup()
7960 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, 0x724, 0x83); in ae5_post_dsp_param_setup()
7961 chipio_set_control_param(codec, CONTROL_PARAM_ASI, 0); in ae5_post_dsp_param_setup()
7963 chipio_8051_write_exram(codec, 0xfa92, 0x22); in ae5_post_dsp_param_setup()
7968 chipio_8051_write_pll_pmu(codec, 0x41, 0xc8); in ae5_post_dsp_pll_setup()
7969 chipio_8051_write_pll_pmu(codec, 0x45, 0xcc); in ae5_post_dsp_pll_setup()
7970 chipio_8051_write_pll_pmu(codec, 0x40, 0xcb); in ae5_post_dsp_pll_setup()
7971 chipio_8051_write_pll_pmu(codec, 0x43, 0xc7); in ae5_post_dsp_pll_setup()
7972 chipio_8051_write_pll_pmu(codec, 0x51, 0x8d); in ae5_post_dsp_pll_setup()
7981 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, 0x725, 0x81); in ae5_post_dsp_stream_setup()
7983 chipio_set_conn_rate_no_mutex(codec, 0x70, SR_96_000); in ae5_post_dsp_stream_setup()
7985 chipio_set_stream_source_dest(codec, 0x5, 0x43, 0x0); in ae5_post_dsp_stream_setup()
7987 chipio_set_stream_source_dest(codec, 0x18, 0x9, 0xd0); in ae5_post_dsp_stream_setup()
7988 chipio_set_conn_rate_no_mutex(codec, 0xd0, SR_96_000); in ae5_post_dsp_stream_setup()
7989 chipio_set_stream_channels(codec, 0x18, 6); in ae5_post_dsp_stream_setup()
7990 chipio_set_stream_control(codec, 0x18, 1); in ae5_post_dsp_stream_setup()
7994 chipio_8051_write_pll_pmu_no_mutex(codec, 0x43, 0xc7); in ae5_post_dsp_stream_setup()
7996 ca0113_mmio_command_set(codec, 0x48, 0x01, 0x80); in ae5_post_dsp_stream_setup()
8007 chipio_write_no_mutex(codec, 0x189000, 0x0001f101); in ae5_post_dsp_startup_data()
8008 chipio_write_no_mutex(codec, 0x189004, 0x0001f101); in ae5_post_dsp_startup_data()
8009 chipio_write_no_mutex(codec, 0x189024, 0x00014004); in ae5_post_dsp_startup_data()
8010 chipio_write_no_mutex(codec, 0x189028, 0x0002000f); in ae5_post_dsp_startup_data()
8012 ca0113_mmio_command_set(codec, 0x48, 0x0a, 0x05); in ae5_post_dsp_startup_data()
8014 ca0113_mmio_command_set(codec, 0x48, 0x0b, 0x12); in ae5_post_dsp_startup_data()
8015 ca0113_mmio_command_set(codec, 0x48, 0x04, 0x00); in ae5_post_dsp_startup_data()
8016 ca0113_mmio_command_set(codec, 0x48, 0x06, 0x48); in ae5_post_dsp_startup_data()
8017 ca0113_mmio_command_set(codec, 0x48, 0x0a, 0x05); in ae5_post_dsp_startup_data()
8018 ca0113_mmio_command_set(codec, 0x48, 0x07, 0x83); in ae5_post_dsp_startup_data()
8019 ca0113_mmio_command_set(codec, 0x48, 0x0f, 0x00); in ae5_post_dsp_startup_data()
8020 ca0113_mmio_command_set(codec, 0x48, 0x10, 0x00); in ae5_post_dsp_startup_data()
8021 ca0113_mmio_gpio_set(codec, 0, true); in ae5_post_dsp_startup_data()
8023 ca0113_mmio_command_set(codec, 0x48, 0x07, 0x80); in ae5_post_dsp_startup_data()
8025 chipio_write_no_mutex(codec, 0x18b03c, 0x00000012); in ae5_post_dsp_startup_data()
8027 ca0113_mmio_command_set(codec, 0x48, 0x0f, 0x00); in ae5_post_dsp_startup_data()
8028 ca0113_mmio_command_set(codec, 0x48, 0x10, 0x00); in ae5_post_dsp_startup_data()
8042 ca0113_mmio_command_set(codec, 0x30, 0x30, 0x00); in ae7_post_dsp_setup_ports()
8043 ca0113_mmio_command_set(codec, 0x48, 0x0d, 0x40); in ae7_post_dsp_setup_ports()
8044 ca0113_mmio_command_set(codec, 0x48, 0x17, 0x00); in ae7_post_dsp_setup_ports()
8045 ca0113_mmio_command_set(codec, 0x48, 0x19, 0x00); in ae7_post_dsp_setup_ports()
8046 ca0113_mmio_command_set(codec, 0x48, 0x11, 0xff); in ae7_post_dsp_setup_ports()
8047 ca0113_mmio_command_set(codec, 0x48, 0x12, 0xff); in ae7_post_dsp_setup_ports()
8048 ca0113_mmio_command_set(codec, 0x48, 0x13, 0xff); in ae7_post_dsp_setup_ports()
8049 ca0113_mmio_command_set(codec, 0x48, 0x14, 0x7f); in ae7_post_dsp_setup_ports()
8060 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, 0x725, 0x81); in ae7_post_dsp_asi_stream_setup()
8061 ca0113_mmio_command_set(codec, 0x30, 0x2b, 0x00); in ae7_post_dsp_asi_stream_setup()
8063 chipio_set_conn_rate_no_mutex(codec, 0x70, SR_96_000); in ae7_post_dsp_asi_stream_setup()
8065 chipio_set_stream_source_dest(codec, 0x05, 0x43, 0x00); in ae7_post_dsp_asi_stream_setup()
8066 chipio_set_stream_source_dest(codec, 0x18, 0x09, 0xd0); in ae7_post_dsp_asi_stream_setup()
8068 chipio_set_conn_rate_no_mutex(codec, 0xd0, SR_96_000); in ae7_post_dsp_asi_stream_setup()
8069 chipio_set_stream_channels(codec, 0x18, 6); in ae7_post_dsp_asi_stream_setup()
8070 chipio_set_stream_control(codec, 0x18, 1); in ae7_post_dsp_asi_stream_setup()
8080 0x41, 0x45, 0x40, 0x43, 0x51 in ae7_post_dsp_pll_setup()
8083 0xc8, 0xcc, 0xcb, 0xc7, 0x8d in ae7_post_dsp_pll_setup()
8087 for (i = 0; i < ARRAY_SIZE(addr); i++) in ae7_post_dsp_pll_setup()
8095 0x0b, 0x04, 0x06, 0x0a, 0x0c, 0x11, 0x12, 0x13, 0x14 in ae7_post_dsp_asi_setup_ports()
8098 0x12, 0x00, 0x48, 0x05, 0x5f, 0xff, 0xff, 0xff, 0x7f in ae7_post_dsp_asi_setup_ports()
8104 chipio_8051_write_pll_pmu_no_mutex(codec, 0x43, 0xc7); in ae7_post_dsp_asi_setup_ports()
8106 chipio_write_no_mutex(codec, 0x189000, 0x0001f101); in ae7_post_dsp_asi_setup_ports()
8107 chipio_write_no_mutex(codec, 0x189004, 0x0001f101); in ae7_post_dsp_asi_setup_ports()
8108 chipio_write_no_mutex(codec, 0x189024, 0x00014004); in ae7_post_dsp_asi_setup_ports()
8109 chipio_write_no_mutex(codec, 0x189028, 0x0002000f); in ae7_post_dsp_asi_setup_ports()
8114 for (i = 0; i < ARRAY_SIZE(target); i++) in ae7_post_dsp_asi_setup_ports()
8115 ca0113_mmio_command_set(codec, 0x48, target[i], data[i]); in ae7_post_dsp_asi_setup_ports()
8117 ca0113_mmio_command_set_type2(codec, 0x48, 0x07, 0x83); in ae7_post_dsp_asi_setup_ports()
8118 ca0113_mmio_command_set(codec, 0x48, 0x0f, 0x00); in ae7_post_dsp_asi_setup_ports()
8119 ca0113_mmio_command_set(codec, 0x48, 0x10, 0x00); in ae7_post_dsp_asi_setup_ports()
8121 chipio_set_stream_source_dest(codec, 0x21, 0x64, 0x56); in ae7_post_dsp_asi_setup_ports()
8122 chipio_set_stream_channels(codec, 0x21, 2); in ae7_post_dsp_asi_setup_ports()
8123 chipio_set_conn_rate_no_mutex(codec, 0x56, SR_8_000); in ae7_post_dsp_asi_setup_ports()
8125 chipio_set_control_param_no_mutex(codec, CONTROL_PARAM_NODE_ID, 0x09); in ae7_post_dsp_asi_setup_ports()
8131 chipio_set_control_param_no_mutex(codec, 0x20, 0x21); in ae7_post_dsp_asi_setup_ports()
8133 chipio_write_no_mutex(codec, 0x18b038, 0x00000088); in ae7_post_dsp_asi_setup_ports()
8137 * seemingly sends data to the HDA node 0x09, which is the digital in ae7_post_dsp_asi_setup_ports()
8144 ca0113_mmio_gpio_set(codec, 0, 1); in ae7_post_dsp_asi_setup_ports()
8147 ca0113_mmio_command_set_type2(codec, 0x48, 0x07, 0x83); in ae7_post_dsp_asi_setup_ports()
8148 chipio_write_no_mutex(codec, 0x18b03c, 0x00000000); in ae7_post_dsp_asi_setup_ports()
8149 ca0113_mmio_command_set(codec, 0x48, 0x0f, 0x00); in ae7_post_dsp_asi_setup_ports()
8150 ca0113_mmio_command_set(codec, 0x48, 0x10, 0x00); in ae7_post_dsp_asi_setup_ports()
8152 chipio_set_stream_source_dest(codec, 0x05, 0x43, 0x00); in ae7_post_dsp_asi_setup_ports()
8153 chipio_set_stream_source_dest(codec, 0x18, 0x09, 0xd0); in ae7_post_dsp_asi_setup_ports()
8155 chipio_set_conn_rate_no_mutex(codec, 0xd0, SR_96_000); in ae7_post_dsp_asi_setup_ports()
8156 chipio_set_stream_channels(codec, 0x18, 6); in ae7_post_dsp_asi_setup_ports()
8175 chipio_8051_write_direct(codec, 0x93, 0x10); in ae7_post_dsp_asi_setup()
8177 chipio_8051_write_pll_pmu(codec, 0x44, 0xc2); in ae7_post_dsp_asi_setup()
8179 ca0113_mmio_command_set_type2(codec, 0x48, 0x07, 0x83); in ae7_post_dsp_asi_setup()
8180 ca0113_mmio_command_set(codec, 0x30, 0x2e, 0x3f); in ae7_post_dsp_asi_setup()
8185 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, 0x724, 0x83); in ae7_post_dsp_asi_setup()
8186 chipio_set_control_param(codec, CONTROL_PARAM_ASI, 0); in ae7_post_dsp_asi_setup()
8187 snd_hda_codec_write(codec, 0x17, 0, 0x794, 0x00); in ae7_post_dsp_asi_setup()
8189 chipio_8051_write_exram(codec, 0xfa92, 0x22); in ae7_post_dsp_asi_setup()
8194 chipio_8051_write_pll_pmu(codec, 0x43, 0xc7); in ae7_post_dsp_asi_setup()
8214 for (idx = 0; idx < num_fx; idx++) { in ca0132_setup_defaults()
8215 for (i = 0; i <= ca0132_effects[idx].params; i++) { in ca0132_setup_defaults()
8224 dspio_set_uint_param(codec, 0x96, 0x3C, tmp); in ca0132_setup_defaults()
8227 dspio_set_uint_param(codec, 0x8f, 0x01, tmp); in ca0132_setup_defaults()
8231 dspio_set_uint_param(codec, 0x80, 0x00, tmp); in ca0132_setup_defaults()
8232 dspio_set_uint_param(codec, 0x80, 0x01, tmp); in ca0132_setup_defaults()
8236 dspio_set_uint_param(codec, 0x80, 0x05, tmp); in ca0132_setup_defaults()
8240 dspio_set_uint_param(codec, 0x31, 0x00, tmp); in ca0132_setup_defaults()
8262 dspio_set_uint_param(codec, 0x96, 0x3C, tmp); in r3d_setup_defaults()
8266 dspio_set_uint_param(codec, 0x31, 0x00, tmp); in r3d_setup_defaults()
8270 dspio_set_uint_param(codec, 0x32, 0x00, tmp); in r3d_setup_defaults()
8283 for (idx = 0; idx < num_fx; idx++) { in r3d_setup_defaults()
8284 for (i = 0; i <= ca0132_effects[idx].params; i++) { in r3d_setup_defaults()
8317 dspio_set_uint_param(codec, 0x37, 0x08, tmp); in sbz_setup_defaults()
8318 dspio_set_uint_param(codec, 0x37, 0x10, tmp); in sbz_setup_defaults()
8322 dspio_set_uint_param(codec, 0x96, 0x3C, tmp); in sbz_setup_defaults()
8326 dspio_set_uint_param(codec, 0x31, 0x00, tmp); in sbz_setup_defaults()
8330 dspio_set_uint_param(codec, 0x32, 0x00, tmp); in sbz_setup_defaults()
8336 for (idx = 0; idx < num_fx; idx++) { in sbz_setup_defaults()
8337 for (i = 0; i <= ca0132_effects[idx].params; i++) { in sbz_setup_defaults()
8366 dspio_set_uint_param(codec, 0x96, 0x29, tmp); in ae5_setup_defaults()
8367 dspio_set_uint_param(codec, 0x96, 0x2a, tmp); in ae5_setup_defaults()
8368 dspio_set_uint_param(codec, 0x80, 0x0d, tmp); in ae5_setup_defaults()
8369 dspio_set_uint_param(codec, 0x80, 0x0e, tmp); in ae5_setup_defaults()
8371 ca0113_mmio_command_set(codec, 0x30, 0x2e, 0x3f); in ae5_setup_defaults()
8372 ca0113_mmio_gpio_set(codec, 0, false); in ae5_setup_defaults()
8373 ca0113_mmio_command_set(codec, 0x30, 0x28, 0x00); in ae5_setup_defaults()
8377 dspio_set_uint_param(codec, 0x37, 0x08, tmp); in ae5_setup_defaults()
8378 dspio_set_uint_param(codec, 0x37, 0x10, tmp); in ae5_setup_defaults()
8382 dspio_set_uint_param(codec, 0x96, 0x3C, tmp); in ae5_setup_defaults()
8386 dspio_set_uint_param(codec, 0x31, 0x00, tmp); in ae5_setup_defaults()
8390 dspio_set_uint_param(codec, 0x32, 0x00, tmp); in ae5_setup_defaults()
8401 for (idx = 0; idx < num_fx; idx++) { in ae5_setup_defaults()
8402 for (i = 0; i <= ca0132_effects[idx].params; i++) { in ae5_setup_defaults()
8431 dspio_set_uint_param(codec, 0x96, in ae7_setup_defaults()
8433 dspio_set_uint_param(codec, 0x96, in ae7_setup_defaults()
8436 ca0113_mmio_command_set(codec, 0x30, 0x2e, 0x3f); in ae7_setup_defaults()
8439 dspio_set_uint_param(codec, 0x80, 0x0d, tmp); in ae7_setup_defaults()
8440 dspio_set_uint_param(codec, 0x80, 0x0e, tmp); in ae7_setup_defaults()
8442 ca0113_mmio_gpio_set(codec, 0, false); in ae7_setup_defaults()
8446 dspio_set_uint_param(codec, 0x37, 0x08, tmp); in ae7_setup_defaults()
8447 dspio_set_uint_param(codec, 0x37, 0x10, tmp); in ae7_setup_defaults()
8451 dspio_set_uint_param(codec, 0x96, 0x3C, tmp); in ae7_setup_defaults()
8455 dspio_set_uint_param(codec, 0x31, 0x00, tmp); in ae7_setup_defaults()
8459 dspio_set_uint_param(codec, 0x32, 0x00, tmp); in ae7_setup_defaults()
8460 ca0113_mmio_command_set(codec, 0x30, 0x28, 0x00); in ae7_setup_defaults()
8471 * Not sure why, but these are both set to 1. They're only set to 0 in ae7_setup_defaults()
8474 ca0113_mmio_gpio_set(codec, 0, true); in ae7_setup_defaults()
8478 ca0113_mmio_command_set(codec, 0x48, 0x0f, 0x04); in ae7_setup_defaults()
8479 ca0113_mmio_command_set(codec, 0x48, 0x10, 0x04); in ae7_setup_defaults()
8480 ca0113_mmio_command_set_type2(codec, 0x48, 0x07, 0x80); in ae7_setup_defaults()
8484 for (idx = 0; idx < num_fx; idx++) { in ae7_setup_defaults()
8485 for (i = 0; i <= ca0132_effects[idx].params; i++) { in ae7_setup_defaults()
8509 chipio_set_control_flag(codec, CONTROL_FLAG_IDLE_ENABLE, 0); in ca0132_init_flags()
8510 chipio_set_control_flag(codec, CONTROL_FLAG_SPDIF2OUT, 0); in ca0132_init_flags()
8512 CONTROL_FLAG_PORT_D_10KOHM_LOAD, 0); in ca0132_init_flags()
8516 chipio_set_control_flag(codec, CONTROL_FLAG_IDLE_ENABLE, 0); in ca0132_init_flags()
8518 CONTROL_FLAG_PORT_A_COMMON_MODE, 0); in ca0132_init_flags()
8520 CONTROL_FLAG_PORT_D_COMMON_MODE, 0); in ca0132_init_flags()
8522 CONTROL_FLAG_PORT_A_10KOHM_LOAD, 0); in ca0132_init_flags()
8524 CONTROL_FLAG_PORT_D_10KOHM_LOAD, 0); in ca0132_init_flags()
8538 chipio_set_conn_rate(codec, 0x0B, SR_48_000); in ca0132_init_params()
8539 chipio_set_control_param(codec, CONTROL_PARAM_SPDIF1_SOURCE, 0); in ca0132_init_params()
8540 chipio_set_control_param(codec, 0, 0); in ca0132_init_params()
8541 chipio_set_control_param(codec, CONTROL_PARAM_VIP_SOURCE, 0); in ca0132_init_params()
8578 codec->card->dev) != 0) in ca0132_download_dsp_images()
8585 codec->card->dev) != 0) in ca0132_download_dsp_images()
8600 codec->card->dev) != 0) in ca0132_download_dsp_images()
8605 if (dspload_image(codec, dsp_os_image, 0, 0, true, 0)) { in ca0132_download_dsp_images()
8652 if (dspio_get_response_data(codec) >= 0) in ca0132_process_dsp_response()
8653 spec->wait_scp = 0; in ca0132_process_dsp_response()
8705 {0x15, VENDOR_CHIPIO_CT_EXTENSIONS_ENABLE, 0x1},
8712 {0x01, AC_VERB_SET_POWER_STATE, 0x03},
8714 {0x15, VENDOR_CHIPIO_CT_EXTENSIONS_ENABLE, 0},
8722 {0x15, 0x70D, 0xF0},
8723 {0x15, 0x70E, 0xFE},
8724 {0x15, 0x707, 0x75},
8725 {0x15, 0x707, 0xD3},
8726 {0x15, 0x707, 0x09},
8727 {0x15, 0x707, 0x53},
8728 {0x15, 0x707, 0xD4},
8729 {0x15, 0x707, 0xEF},
8730 {0x15, 0x707, 0x75},
8731 {0x15, 0x707, 0xD3},
8732 {0x15, 0x707, 0x09},
8733 {0x15, 0x707, 0x02},
8734 {0x15, 0x707, 0x37},
8735 {0x15, 0x707, 0x78},
8736 {0x15, 0x53C, 0xCE},
8737 {0x15, 0x575, 0xC9},
8738 {0x15, 0x53D, 0xCE},
8739 {0x15, 0x5B7, 0xC9},
8740 {0x15, 0x70D, 0xE8},
8741 {0x15, 0x70E, 0xFE},
8742 {0x15, 0x707, 0x02},
8743 {0x15, 0x707, 0x68},
8744 {0x15, 0x707, 0x62},
8745 {0x15, 0x53A, 0xCE},
8746 {0x15, 0x546, 0xC9},
8747 {0x15, 0x53B, 0xCE},
8748 {0x15, 0x5E8, 0xC9},
8754 {0x15, 0x70D, 0x20},
8755 {0x15, 0x70E, 0x19},
8756 {0x15, 0x707, 0x00},
8757 {0x15, 0x539, 0xCE},
8758 {0x15, 0x546, 0xC9},
8759 {0x15, 0x70D, 0xB7},
8760 {0x15, 0x70E, 0x09},
8761 {0x15, 0x707, 0x10},
8762 {0x15, 0x70D, 0xAF},
8763 {0x15, 0x70E, 0x09},
8764 {0x15, 0x707, 0x01},
8765 {0x15, 0x707, 0x05},
8766 {0x15, 0x70D, 0x73},
8767 {0x15, 0x70E, 0x09},
8768 {0x15, 0x707, 0x14},
8769 {0x15, 0x6FF, 0xC4},
8789 chipio_set_control_flag(codec, CONTROL_FLAG_IDLE_ENABLE, 0); in ca0132_init_chip()
8790 chipio_write_no_mutex(codec, 0x18b0a4, 0x000000c2); in ca0132_init_chip()
8792 snd_hda_codec_write(codec, codec->core.afg, 0, in ca0132_init_chip()
8793 AC_VERB_SET_CODEC_RESET, 0); in ca0132_init_chip()
8794 snd_hda_codec_write(codec, codec->core.afg, 0, in ca0132_init_chip()
8795 AC_VERB_SET_CODEC_RESET, 0); in ca0132_init_chip()
8804 spec->cur_mic_boost = 0; in ca0132_init_chip()
8806 for (i = 0; i < VNODES_COUNT; i++) { in ca0132_init_chip()
8807 spec->vnode_lvol[i] = 0x5a; in ca0132_init_chip()
8808 spec->vnode_rvol[i] = 0x5a; in ca0132_init_chip()
8809 spec->vnode_lswitch[i] = 0; in ca0132_init_chip()
8810 spec->vnode_rswitch[i] = 0; in ca0132_init_chip()
8817 for (i = 0; i < num_fx; i++) { in ca0132_init_chip()
8818 on = (unsigned int)ca0132_effects[i].reqs[0]; in ca0132_init_chip()
8819 spec->effects_switch[i] = on ? 1 : 0; in ca0132_init_chip()
8827 spec->speaker_range_val[0] = 1; in ca0132_init_chip()
8831 for (i = 0; i < EFFECT_LEVEL_SLIDERS; i++) in ca0132_init_chip()
8837 spec->voicefx_val = 0; in ca0132_init_chip()
8839 spec->effects_switch[CRYSTAL_VOICE - EFFECT_START_NID] = 0; in ca0132_init_chip()
8860 snd_hda_codec_write(codec, 0x01, 0, AC_VERB_SET_GPIO_DATA, 0x00); in r3di_gpio_shutdown()
8871 for (i = 0; i < 4; i++) in sbz_region2_exit()
8872 writeb(0x0, spec->mem_base + 0x100); in sbz_region2_exit()
8873 for (i = 0; i < 8; i++) in sbz_region2_exit()
8874 writeb(0xb3, spec->mem_base + 0x304); in sbz_region2_exit()
8876 ca0113_mmio_gpio_set(codec, 0, false); in sbz_region2_exit()
8885 static const hda_nid_t pins[] = {0x0B, 0x0C, 0x0E, 0x12, 0x13}; in sbz_set_pin_ctl_default()
8888 snd_hda_codec_write(codec, 0x11, 0, in sbz_set_pin_ctl_default()
8889 AC_VERB_SET_PIN_WIDGET_CONTROL, 0x40); in sbz_set_pin_ctl_default()
8891 for (i = 0; i < ARRAY_SIZE(pins); i++) in sbz_set_pin_ctl_default()
8892 snd_hda_codec_write(codec, pins[i], 0, in sbz_set_pin_ctl_default()
8893 AC_VERB_SET_PIN_WIDGET_CONTROL, 0x00); in sbz_set_pin_ctl_default()
8898 static const hda_nid_t pins[] = {0x0B, 0x0E, 0x0F, 0x10, 0x11, 0x12, 0x13}; in ca0132_clear_unsolicited()
8901 for (i = 0; i < ARRAY_SIZE(pins); i++) { in ca0132_clear_unsolicited()
8902 snd_hda_codec_write(codec, pins[i], 0, in ca0132_clear_unsolicited()
8903 AC_VERB_SET_UNSOLICITED_ENABLE, 0x00); in ca0132_clear_unsolicited()
8911 if (dir >= 0) in sbz_gpio_shutdown_commands()
8912 snd_hda_codec_write(codec, 0x01, 0, in sbz_gpio_shutdown_commands()
8914 if (mask >= 0) in sbz_gpio_shutdown_commands()
8915 snd_hda_codec_write(codec, 0x01, 0, in sbz_gpio_shutdown_commands()
8918 if (data >= 0) in sbz_gpio_shutdown_commands()
8919 snd_hda_codec_write(codec, 0x01, 0, in sbz_gpio_shutdown_commands()
8925 static const hda_nid_t pins[] = {0x05, 0x0c, 0x09, 0x0e, 0x08, 0x11, 0x01}; in zxr_dbpro_power_state_shutdown()
8928 for (i = 0; i < ARRAY_SIZE(pins); i++) in zxr_dbpro_power_state_shutdown()
8929 snd_hda_codec_write(codec, pins[i], 0, in zxr_dbpro_power_state_shutdown()
8930 AC_VERB_SET_POWER_STATE, 0x03); in zxr_dbpro_power_state_shutdown()
8935 chipio_set_stream_control(codec, 0x03, 0); in sbz_exit_chip()
8936 chipio_set_stream_control(codec, 0x04, 0); in sbz_exit_chip()
8939 sbz_gpio_shutdown_commands(codec, 0x07, 0x07, -1); in sbz_exit_chip()
8940 sbz_gpio_shutdown_commands(codec, 0x07, 0x07, 0x05); in sbz_exit_chip()
8941 sbz_gpio_shutdown_commands(codec, 0x07, 0x07, 0x01); in sbz_exit_chip()
8943 chipio_set_stream_control(codec, 0x14, 0); in sbz_exit_chip()
8944 chipio_set_stream_control(codec, 0x0C, 0); in sbz_exit_chip()
8946 chipio_set_conn_rate(codec, 0x41, SR_192_000); in sbz_exit_chip()
8947 chipio_set_conn_rate(codec, 0x91, SR_192_000); in sbz_exit_chip()
8949 chipio_write(codec, 0x18a020, 0x00000083); in sbz_exit_chip()
8951 sbz_gpio_shutdown_commands(codec, 0x07, 0x07, 0x03); in sbz_exit_chip()
8952 sbz_gpio_shutdown_commands(codec, 0x07, 0x07, 0x07); in sbz_exit_chip()
8953 sbz_gpio_shutdown_commands(codec, 0x07, 0x07, 0x06); in sbz_exit_chip()
8955 chipio_set_stream_control(codec, 0x0C, 0); in sbz_exit_chip()
8957 chipio_set_control_param(codec, 0x0D, 0x24); in sbz_exit_chip()
8962 snd_hda_codec_write(codec, 0x0B, 0, in sbz_exit_chip()
8963 AC_VERB_SET_EAPD_BTLENABLE, 0x00); in sbz_exit_chip()
8971 snd_hda_codec_write(codec, 0x01, 0, 0x793, 0x00); in r3d_exit_chip()
8972 snd_hda_codec_write(codec, 0x01, 0, 0x794, 0x5b); in r3d_exit_chip()
8977 chipio_set_stream_control(codec, 0x03, 0); in ae5_exit_chip()
8978 chipio_set_stream_control(codec, 0x04, 0); in ae5_exit_chip()
8980 ca0113_mmio_command_set(codec, 0x30, 0x32, 0x3f); in ae5_exit_chip()
8981 ca0113_mmio_command_set(codec, 0x48, 0x07, 0x83); in ae5_exit_chip()
8982 ca0113_mmio_command_set(codec, 0x48, 0x07, 0x83); in ae5_exit_chip()
8983 ca0113_mmio_command_set(codec, 0x30, 0x30, 0x00); in ae5_exit_chip()
8984 ca0113_mmio_command_set(codec, 0x30, 0x2b, 0x00); in ae5_exit_chip()
8985 ca0113_mmio_command_set(codec, 0x30, 0x2d, 0x00); in ae5_exit_chip()
8986 ca0113_mmio_gpio_set(codec, 0, false); in ae5_exit_chip()
8989 snd_hda_codec_write(codec, 0x01, 0, 0x793, 0x00); in ae5_exit_chip()
8990 snd_hda_codec_write(codec, 0x01, 0, 0x794, 0x53); in ae5_exit_chip()
8992 chipio_set_control_param(codec, CONTROL_PARAM_ASI, 0); in ae5_exit_chip()
8994 chipio_set_stream_control(codec, 0x18, 0); in ae5_exit_chip()
8995 chipio_set_stream_control(codec, 0x0c, 0); in ae5_exit_chip()
8997 snd_hda_codec_write(codec, 0x01, 0, 0x724, 0x83); in ae5_exit_chip()
9002 chipio_set_stream_control(codec, 0x18, 0); in ae7_exit_chip()
9003 chipio_set_stream_source_dest(codec, 0x21, 0xc8, 0xc8); in ae7_exit_chip()
9004 chipio_set_stream_channels(codec, 0x21, 0); in ae7_exit_chip()
9005 chipio_set_control_param(codec, CONTROL_PARAM_NODE_ID, 0x09); in ae7_exit_chip()
9006 chipio_set_control_param(codec, 0x20, 0x01); in ae7_exit_chip()
9008 chipio_set_control_param(codec, CONTROL_PARAM_ASI, 0); in ae7_exit_chip()
9010 chipio_set_stream_control(codec, 0x18, 0); in ae7_exit_chip()
9011 chipio_set_stream_control(codec, 0x0c, 0); in ae7_exit_chip()
9013 ca0113_mmio_command_set(codec, 0x30, 0x2b, 0x00); in ae7_exit_chip()
9014 snd_hda_codec_write(codec, 0x15, 0, 0x724, 0x83); in ae7_exit_chip()
9015 ca0113_mmio_command_set_type2(codec, 0x48, 0x07, 0x83); in ae7_exit_chip()
9016 ca0113_mmio_command_set(codec, 0x30, 0x30, 0x00); in ae7_exit_chip()
9017 ca0113_mmio_command_set(codec, 0x30, 0x2e, 0x00); in ae7_exit_chip()
9018 ca0113_mmio_gpio_set(codec, 0, false); in ae7_exit_chip()
9020 ca0113_mmio_command_set(codec, 0x30, 0x32, 0x3f); in ae7_exit_chip()
9022 snd_hda_codec_write(codec, 0x01, 0, 0x793, 0x00); in ae7_exit_chip()
9023 snd_hda_codec_write(codec, 0x01, 0, 0x794, 0x53); in ae7_exit_chip()
9028 chipio_set_stream_control(codec, 0x03, 0); in zxr_exit_chip()
9029 chipio_set_stream_control(codec, 0x04, 0); in zxr_exit_chip()
9030 chipio_set_stream_control(codec, 0x14, 0); in zxr_exit_chip()
9031 chipio_set_stream_control(codec, 0x0C, 0); in zxr_exit_chip()
9033 chipio_set_conn_rate(codec, 0x41, SR_192_000); in zxr_exit_chip()
9034 chipio_set_conn_rate(codec, 0x91, SR_192_000); in zxr_exit_chip()
9036 chipio_write(codec, 0x18a020, 0x00000083); in zxr_exit_chip()
9038 snd_hda_codec_write(codec, 0x01, 0, 0x793, 0x00); in zxr_exit_chip()
9039 snd_hda_codec_write(codec, 0x01, 0, 0x794, 0x53); in zxr_exit_chip()
9043 snd_hda_codec_write(codec, 0x0B, 0, AC_VERB_SET_EAPD_BTLENABLE, 0x00); in zxr_exit_chip()
9048 ca0113_mmio_gpio_set(codec, 0, false); in zxr_exit_chip()
9050 ca0113_mmio_gpio_set(codec, 0, true); in zxr_exit_chip()
9076 unsigned int cur_address = 0x390; in sbz_dsp_startup_check()
9078 unsigned int failure = 0; in sbz_dsp_startup_check()
9086 for (i = 0; i < 4; i++) { in sbz_dsp_startup_check()
9088 cur_address += 0x4; in sbz_dsp_startup_check()
9090 for (i = 0; i < 4; i++) { in sbz_dsp_startup_check()
9091 if (dsp_data_check[i] == 0xa1a2a3a4) in sbz_dsp_startup_check()
9103 while (failure && (reload != 0)) { in sbz_dsp_startup_check()
9108 failure = 0; in sbz_dsp_startup_check()
9109 for (i = 0; i < 4; i++) { in sbz_dsp_startup_check()
9111 cur_address += 0x4; in sbz_dsp_startup_check()
9113 for (i = 0; i < 4; i++) { in sbz_dsp_startup_check()
9114 if (dsp_data_check[i] == 0xa1a2a3a4) in sbz_dsp_startup_check()
9130 * This is for the extra volume verbs 0x797 (left) and 0x798 (right). These add
9135 * to 0 just incase a value has lingered from a boot into Windows.
9139 snd_hda_codec_write(codec, 0x02, 0, 0x797, 0x00); in ca0132_alt_vol_setup()
9140 snd_hda_codec_write(codec, 0x02, 0, 0x798, 0x00); in ca0132_alt_vol_setup()
9141 snd_hda_codec_write(codec, 0x03, 0, 0x797, 0x00); in ca0132_alt_vol_setup()
9142 snd_hda_codec_write(codec, 0x03, 0, 0x798, 0x00); in ca0132_alt_vol_setup()
9143 snd_hda_codec_write(codec, 0x04, 0, 0x797, 0x00); in ca0132_alt_vol_setup()
9144 snd_hda_codec_write(codec, 0x04, 0, 0x798, 0x00); in ca0132_alt_vol_setup()
9145 snd_hda_codec_write(codec, 0x07, 0, 0x797, 0x00); in ca0132_alt_vol_setup()
9146 snd_hda_codec_write(codec, 0x07, 0, 0x798, 0x00); in ca0132_alt_vol_setup()
9156 writel(0x00820680, spec->mem_base + 0x01C); in sbz_pre_dsp_setup()
9157 writel(0x00820680, spec->mem_base + 0x01C); in sbz_pre_dsp_setup()
9159 chipio_write(codec, 0x18b0a4, 0x000000c2); in sbz_pre_dsp_setup()
9161 snd_hda_codec_write(codec, 0x11, 0, in sbz_pre_dsp_setup()
9162 AC_VERB_SET_PIN_WIDGET_CONTROL, 0x44); in sbz_pre_dsp_setup()
9167 chipio_write(codec, 0x18b0a4, 0x000000c2); in r3d_pre_dsp_setup()
9169 chipio_8051_write_exram(codec, 0x1c1e, 0x5b); in r3d_pre_dsp_setup()
9171 snd_hda_codec_write(codec, 0x11, 0, in r3d_pre_dsp_setup()
9172 AC_VERB_SET_PIN_WIDGET_CONTROL, 0x44); in r3d_pre_dsp_setup()
9177 chipio_write(codec, 0x18b0a4, 0x000000c2); in r3di_pre_dsp_setup()
9179 chipio_8051_write_exram(codec, 0x1c1e, 0x5b); in r3di_pre_dsp_setup()
9180 chipio_8051_write_exram(codec, 0x1920, 0x00); in r3di_pre_dsp_setup()
9181 chipio_8051_write_exram(codec, 0x1921, 0x40); in r3di_pre_dsp_setup()
9183 snd_hda_codec_write(codec, 0x11, 0, in r3di_pre_dsp_setup()
9184 AC_VERB_SET_PIN_WIDGET_CONTROL, 0x04); in r3di_pre_dsp_setup()
9194 static const unsigned int addr[] = { 0x43, 0x40, 0x41, 0x42, 0x45 }; in zxr_pre_dsp_setup()
9195 static const unsigned int data[] = { 0x08, 0x0c, 0x0b, 0x07, 0x0d }; in zxr_pre_dsp_setup()
9198 chipio_write(codec, 0x189000, 0x0001f100); in zxr_pre_dsp_setup()
9200 chipio_write(codec, 0x18900c, 0x0001f100); in zxr_pre_dsp_setup()
9205 * 0xfa92 in exram. This function seems to have something to do with in zxr_pre_dsp_setup()
9209 chipio_8051_write_exram(codec, 0xfa92, 0x22); in zxr_pre_dsp_setup()
9211 chipio_8051_write_pll_pmu(codec, 0x51, 0x98); in zxr_pre_dsp_setup()
9213 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, 0x725, 0x82); in zxr_pre_dsp_setup()
9216 chipio_write(codec, 0x18902c, 0x00000000); in zxr_pre_dsp_setup()
9218 chipio_write(codec, 0x18902c, 0x00000003); in zxr_pre_dsp_setup()
9221 for (i = 0; i < ARRAY_SIZE(addr); i++) in zxr_pre_dsp_setup()
9231 0x400, 0x408, 0x40c, 0x01c, 0xc0c, 0xc00, 0xc04, 0xc0c, 0xc0c, 0xc0c,
9232 0xc0c, 0xc08, 0xc08, 0xc08, 0xc08, 0xc08, 0xc04
9236 0x00000030, 0x00000000, 0x00000003, 0x00000003, 0x00000003,
9237 0x00000003, 0x000000c1, 0x000000f1, 0x00000001, 0x000000c7,
9238 0x000000c1, 0x00000080
9242 0x00000030, 0x00000000, 0x00000000, 0x00000003, 0x00000003,
9243 0x00000003, 0x00000001, 0x000000f1, 0x00000001, 0x000000c7,
9244 0x000000c1, 0x00000080
9248 0x400, 0x42c, 0x46c, 0x4ac, 0x4ec, 0x43c, 0x47c, 0x4bc, 0x4fc, 0x408,
9249 0x100, 0x410, 0x40c, 0x100, 0x100, 0x830, 0x86c, 0x800, 0x86c, 0x800,
9250 0x804, 0x20c, 0x01c, 0xc0c, 0xc00, 0xc04, 0xc0c, 0xc0c, 0xc0c, 0xc0c,
9251 0xc08, 0xc08, 0xc08, 0xc08, 0xc08, 0xc04, 0x01c
9255 0x00000001, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
9256 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000001,
9257 0x00000600, 0x00000014, 0x00000001, 0x0000060f, 0x0000070f,
9258 0x00000aff, 0x00000000, 0x0000006b, 0x00000001, 0x0000006b,
9259 0x00000057, 0x00800000, 0x00880680, 0x00000080, 0x00000030,
9260 0x00000000, 0x00000000, 0x00000003, 0x00000003, 0x00000003,
9261 0x00000001, 0x000000f1, 0x00000001, 0x000000c7, 0x000000c1,
9262 0x00000080, 0x00880680
9272 for (i = 0; i < 3; i++) in ca0132_mmio_init_sbz()
9273 writel(0x00000000, spec->mem_base + addr[i]); in ca0132_mmio_init_sbz()
9278 tmp[0] = 0x00880480; in ca0132_mmio_init_sbz()
9279 tmp[1] = 0x00000080; in ca0132_mmio_init_sbz()
9282 tmp[0] = 0x00820680; in ca0132_mmio_init_sbz()
9283 tmp[1] = 0x00000083; in ca0132_mmio_init_sbz()
9286 tmp[0] = 0x00880680; in ca0132_mmio_init_sbz()
9287 tmp[1] = 0x00000083; in ca0132_mmio_init_sbz()
9290 tmp[0] = 0x00000000; in ca0132_mmio_init_sbz()
9291 tmp[1] = 0x00000000; in ca0132_mmio_init_sbz()
9295 for (i = 0; i < 2; i++) in ca0132_mmio_init_sbz()
9311 for (i = 0; i < count; i++) in ca0132_mmio_init_sbz()
9326 writel(0x00000680, spec->mem_base + 0x1c); in ca0132_mmio_init_ae5()
9327 writel(0x00880680, spec->mem_base + 0x1c); in ca0132_mmio_init_ae5()
9330 for (i = 0; i < count; i++) { in ca0132_mmio_init_ae5()
9333 * a different value to 0x20c. in ca0132_mmio_init_ae5()
9336 writel(0x00800001, spec->mem_base + addr[i]); in ca0132_mmio_init_ae5()
9344 writel(0x00880680, spec->mem_base + 0x1c); in ca0132_mmio_init_ae5()
9366 0x304, 0x304, 0x304, 0x304, 0x100, 0x304, 0x100, 0x304, 0x100, 0x304,
9367 0x100, 0x304, 0x86c, 0x800, 0x86c, 0x800, 0x804
9371 0x0f, 0x0e, 0x1f, 0x0c, 0x3f, 0x08, 0x7f, 0x00, 0xff, 0x00, 0x6b,
9372 0x01, 0x6b, 0x57
9377 * eventually resets the codec with the 0x7ff verb. Not quite sure why it does
9390 chipio_8051_write_pll_pmu(codec, 0x41, 0xc8); in ae5_register_set()
9392 chipio_8051_write_direct(codec, 0x93, 0x10); in ae5_register_set()
9393 chipio_8051_write_pll_pmu(codec, 0x44, 0xc2); in ae5_register_set()
9396 tmp[0] = 0x03; in ae5_register_set()
9397 tmp[1] = 0x03; in ae5_register_set()
9398 tmp[2] = 0x07; in ae5_register_set()
9400 tmp[0] = 0x0f; in ae5_register_set()
9401 tmp[1] = 0x0f; in ae5_register_set()
9402 tmp[2] = 0x0f; in ae5_register_set()
9405 for (i = cur_addr = 0; i < 3; i++, cur_addr++) in ae5_register_set()
9412 for (i = 0; cur_addr < 12; i++, cur_addr++) in ae5_register_set()
9418 writel(0x00800001, spec->mem_base + 0x20c); in ae5_register_set()
9421 ca0113_mmio_command_set_type2(codec, 0x48, 0x07, 0x83); in ae5_register_set()
9422 ca0113_mmio_command_set(codec, 0x30, 0x2e, 0x3f); in ae5_register_set()
9424 ca0113_mmio_command_set(codec, 0x30, 0x2d, 0x3f); in ae5_register_set()
9427 chipio_8051_write_direct(codec, 0x90, 0x00); in ae5_register_set()
9428 chipio_8051_write_direct(codec, 0x90, 0x10); in ae5_register_set()
9431 ca0113_mmio_command_set(codec, 0x48, 0x07, 0x83); in ae5_register_set()
9460 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, 0x6FF, 0xC4); in ca0132_alt_init()
9469 chipio_8051_write_pll_pmu(codec, 0x49, 0x88); in ca0132_alt_init()
9470 chipio_write(codec, 0x18b030, 0x00000020); in ca0132_alt_init()
9473 ca0113_mmio_command_set(codec, 0x30, 0x32, 0x3f); in ca0132_alt_init()
9477 chipio_8051_write_pll_pmu(codec, 0x49, 0x88); in ca0132_alt_init()
9480 chipio_write(codec, 0x18b008, 0x000000f8); in ca0132_alt_init()
9481 chipio_write(codec, 0x18b008, 0x000000f0); in ca0132_alt_init()
9482 chipio_write(codec, 0x18b030, 0x00000020); in ca0132_alt_init()
9483 ca0113_mmio_command_set(codec, 0x30, 0x32, 0x3f); in ca0132_alt_init()
9486 chipio_8051_write_pll_pmu(codec, 0x49, 0x88); in ca0132_alt_init()
9521 return 0; in ca0132_init()
9571 for (i = 0; i < spec->num_outputs; i++) in ca0132_init()
9572 init_output(codec, spec->out_pins[i], spec->dacs[0]); in ca0132_init()
9574 init_output(codec, cfg->dig_out_pins[0], spec->dig_out); in ca0132_init()
9576 for (i = 0; i < spec->num_inputs; i++) in ca0132_init()
9583 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ca0132_init()
9584 VENDOR_CHIPIO_PARAM_EX_ID_SET, 0x0D); in ca0132_init()
9585 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ca0132_init()
9586 VENDOR_CHIPIO_PARAM_EX_VALUE_SET, 0x20); in ca0132_init()
9614 return 0; in ca0132_init()
9623 init_output(codec, cfg->dig_out_pins[0], spec->dig_out); in dbpro_init()
9626 for (i = 0; i < spec->num_inputs; i++) in dbpro_init()
9629 return 0; in dbpro_init()
9689 return 0; in ca0132_suspend()
9715 spec->dacs[0] = 0x2; in ca0132_config()
9716 spec->dacs[1] = 0x3; in ca0132_config()
9717 spec->dacs[2] = 0x4; in ca0132_config()
9763 spec->out_pins[0] = 0x0b; /* speaker out */ in ca0132_config()
9764 spec->out_pins[1] = 0x0f; in ca0132_config()
9765 spec->shared_out_nid = 0x2; in ca0132_config()
9766 spec->unsol_tag_hp = 0x0f; in ca0132_config()
9768 spec->adcs[0] = 0x7; /* digital mic / analog mic1 */ in ca0132_config()
9769 spec->adcs[1] = 0x8; /* analog mic2 */ in ca0132_config()
9770 spec->adcs[2] = 0xa; /* what u hear */ in ca0132_config()
9773 spec->input_pins[0] = 0x12; in ca0132_config()
9774 spec->input_pins[1] = 0x11; in ca0132_config()
9775 spec->input_pins[2] = 0x13; in ca0132_config()
9776 spec->shared_mic_nid = 0x7; in ca0132_config()
9777 spec->unsol_tag_amic1 = 0x11; in ca0132_config()
9782 spec->out_pins[0] = 0x0B; /* Line out */ in ca0132_config()
9783 spec->out_pins[1] = 0x0F; /* Rear headphone out */ in ca0132_config()
9784 spec->out_pins[2] = 0x10; /* Front Headphone / Center/LFE*/ in ca0132_config()
9785 spec->out_pins[3] = 0x11; /* Rear surround */ in ca0132_config()
9786 spec->shared_out_nid = 0x2; in ca0132_config()
9790 spec->adcs[0] = 0x7; /* Rear Mic / Line-in */ in ca0132_config()
9791 spec->adcs[1] = 0x8; /* Front Mic, but only if no DSP */ in ca0132_config()
9792 spec->adcs[2] = 0xa; /* what u hear */ in ca0132_config()
9795 spec->input_pins[0] = 0x12; /* Rear Mic / Line-in */ in ca0132_config()
9796 spec->input_pins[1] = 0x13; /* What U Hear */ in ca0132_config()
9797 spec->shared_mic_nid = 0x7; in ca0132_config()
9798 spec->unsol_tag_amic1 = spec->input_pins[0]; in ca0132_config()
9801 spec->dig_out = 0x05; in ca0132_config()
9803 spec->dig_in = 0x09; in ca0132_config()
9807 spec->out_pins[0] = 0x0B; /* Line out */ in ca0132_config()
9808 spec->out_pins[1] = 0x0F; /* Rear headphone out */ in ca0132_config()
9809 spec->out_pins[2] = 0x10; /* Center/LFE */ in ca0132_config()
9810 spec->out_pins[3] = 0x11; /* Rear surround */ in ca0132_config()
9811 spec->shared_out_nid = 0x2; in ca0132_config()
9815 spec->adcs[0] = 0x7; /* Rear Mic / Line-in */ in ca0132_config()
9816 spec->adcs[1] = 0x8; /* Not connected, no front mic */ in ca0132_config()
9817 spec->adcs[2] = 0xa; /* what u hear */ in ca0132_config()
9820 spec->input_pins[0] = 0x12; /* Rear Mic / Line-in */ in ca0132_config()
9821 spec->input_pins[1] = 0x13; /* What U Hear */ in ca0132_config()
9822 spec->shared_mic_nid = 0x7; in ca0132_config()
9823 spec->unsol_tag_amic1 = spec->input_pins[0]; in ca0132_config()
9826 spec->adcs[0] = 0x8; /* ZxR DBPro Aux In */ in ca0132_config()
9829 spec->input_pins[0] = 0x11; /* RCA Line-in */ in ca0132_config()
9831 spec->dig_out = 0x05; in ca0132_config()
9834 spec->dig_in = 0x09; in ca0132_config()
9839 spec->out_pins[0] = 0x0B; /* Line out */ in ca0132_config()
9840 spec->out_pins[1] = 0x11; /* Rear headphone out */ in ca0132_config()
9841 spec->out_pins[2] = 0x10; /* Front Headphone / Center/LFE*/ in ca0132_config()
9842 spec->out_pins[3] = 0x0F; /* Rear surround */ in ca0132_config()
9843 spec->shared_out_nid = 0x2; in ca0132_config()
9847 spec->adcs[0] = 0x7; /* Rear Mic / Line-in */ in ca0132_config()
9848 spec->adcs[1] = 0x8; /* Front Mic, but only if no DSP */ in ca0132_config()
9849 spec->adcs[2] = 0xa; /* what u hear */ in ca0132_config()
9852 spec->input_pins[0] = 0x12; /* Rear Mic / Line-in */ in ca0132_config()
9853 spec->input_pins[1] = 0x13; /* What U Hear */ in ca0132_config()
9854 spec->shared_mic_nid = 0x7; in ca0132_config()
9855 spec->unsol_tag_amic1 = spec->input_pins[0]; in ca0132_config()
9858 spec->dig_out = 0x05; in ca0132_config()
9863 spec->out_pins[0] = 0x0B; /* Line out */ in ca0132_config()
9864 spec->out_pins[1] = 0x0F; /* Rear headphone out */ in ca0132_config()
9865 spec->out_pins[2] = 0x10; /* Front Headphone / Center/LFE*/ in ca0132_config()
9866 spec->out_pins[3] = 0x11; /* Rear surround */ in ca0132_config()
9867 spec->shared_out_nid = 0x2; in ca0132_config()
9871 spec->adcs[0] = 0x07; /* Rear Mic / Line-in */ in ca0132_config()
9872 spec->adcs[1] = 0x08; /* Front Mic, but only if no DSP */ in ca0132_config()
9873 spec->adcs[2] = 0x0a; /* what u hear */ in ca0132_config()
9876 spec->input_pins[0] = 0x12; /* Rear Mic / Line-in */ in ca0132_config()
9877 spec->input_pins[1] = 0x13; /* What U Hear */ in ca0132_config()
9878 spec->shared_mic_nid = 0x7; in ca0132_config()
9879 spec->unsol_tag_amic1 = spec->input_pins[0]; in ca0132_config()
9882 spec->dig_out = 0x05; in ca0132_config()
9887 spec->out_pins[0] = 0x0b; /* speaker out */ in ca0132_config()
9888 spec->out_pins[1] = 0x10; /* headphone out */ in ca0132_config()
9889 spec->shared_out_nid = 0x2; in ca0132_config()
9892 spec->adcs[0] = 0x7; /* digital mic / analog mic1 */ in ca0132_config()
9893 spec->adcs[1] = 0x8; /* analog mic2 */ in ca0132_config()
9894 spec->adcs[2] = 0xa; /* what u hear */ in ca0132_config()
9897 spec->input_pins[0] = 0x12; in ca0132_config()
9898 spec->input_pins[1] = 0x11; in ca0132_config()
9899 spec->input_pins[2] = 0x13; in ca0132_config()
9900 spec->shared_mic_nid = 0x7; in ca0132_config()
9901 spec->unsol_tag_amic1 = spec->input_pins[0]; in ca0132_config()
9904 spec->dig_out = 0x05; in ca0132_config()
9906 spec->dig_in = 0x09; in ca0132_config()
9931 spec->spec_init_verbs[0].nid = 0x0b; in ca0132_prepare_verbs()
9932 spec->spec_init_verbs[0].param = 0x78D; in ca0132_prepare_verbs()
9933 spec->spec_init_verbs[0].verb = 0x00; in ca0132_prepare_verbs()
9937 spec->spec_init_verbs[2].nid = 0x0b; in ca0132_prepare_verbs()
9939 spec->spec_init_verbs[2].verb = 0x02; in ca0132_prepare_verbs()
9941 spec->spec_init_verbs[3].nid = 0x10; in ca0132_prepare_verbs()
9942 spec->spec_init_verbs[3].param = 0x78D; in ca0132_prepare_verbs()
9943 spec->spec_init_verbs[3].verb = 0x02; in ca0132_prepare_verbs()
9945 spec->spec_init_verbs[4].nid = 0x10; in ca0132_prepare_verbs()
9947 spec->spec_init_verbs[4].verb = 0x02; in ca0132_prepare_verbs()
9951 return 0; in ca0132_prepare_verbs()
9965 case 0x11020033: in sbz_detect_quirk()
9968 case 0x1102003f: in sbz_detect_quirk()
10015 spec->mixers[0] = desktop_mixer; in patch_ca0132()
10019 spec->mixers[0] = desktop_mixer; in patch_ca0132()
10025 spec->mixers[0] = desktop_mixer; in patch_ca0132()
10029 spec->mixers[0] = r3di_mixer; in patch_ca0132()
10033 spec->mixers[0] = desktop_mixer; in patch_ca0132()
10037 spec->mixers[0] = desktop_mixer; in patch_ca0132()
10041 spec->mixers[0] = ca0132_mixer; in patch_ca0132()
10070 spec->mem_base = pci_iomap(codec->bus->pci, 2, 0xC20); in patch_ca0132()
10088 if (err < 0) in patch_ca0132()
10092 if (err < 0) in patch_ca0132()
10097 return 0; in patch_ca0132()
10108 HDA_CODEC_ENTRY(0x11020011, "CA0132", patch_ca0132),