Lines Matching full:registers
389 #define NT_PPC_VMX 0x100 /* PowerPC Altivec/VMX registers */
390 #define NT_PPC_SPE 0x101 /* PowerPC SPE/EVR registers */
391 #define NT_PPC_VSX 0x102 /* PowerPC VSX registers */
395 #define NT_PPC_EBB 0x106 /* Event Based Branch Registers */
396 #define NT_PPC_PMU 0x107 /* Performance Monitor Registers */
397 #define NT_PPC_TM_CGPR 0x108 /* TM checkpointed GPR Registers */
398 #define NT_PPC_TM_CFPR 0x109 /* TM checkpointed FPR Registers */
399 #define NT_PPC_TM_CVMX 0x10a /* TM checkpointed VMX Registers */
400 #define NT_PPC_TM_CVSX 0x10b /* TM checkpointed VSX Registers */
401 #define NT_PPC_TM_SPR 0x10c /* TM Special Purpose Registers */
405 #define NT_PPC_PKEY 0x110 /* Memory Protection Keys registers */
413 #define NT_S390_CTRS 0x304 /* s390 control registers */
418 #define NT_S390_VXRS_LOW 0x309 /* s390 vector registers 0-15 upper half */
419 #define NT_S390_VXRS_HIGH 0x30a /* s390 vector registers 16-31 */
420 #define NT_S390_GS_CB 0x30b /* s390 guarded storage registers */
424 #define NT_ARM_VFP 0x400 /* ARM VFP/NEON registers */
426 #define NT_ARM_HW_BREAK 0x402 /* ARM hardware breakpoint registers */
427 #define NT_ARM_HW_WATCH 0x403 /* ARM hardware watchpoint registers */
429 #define NT_ARM_SVE 0x405 /* ARM Scalable Vector Extension registers */
435 #define NT_ARM_SSVE 0x40b /* ARM Streaming SVE registers */
436 #define NT_ARM_ZA 0x40c /* ARM SME ZA registers */
437 #define NT_ARC_V2 0x600 /* ARCv2 accumulator/extra registers */
439 #define NT_MIPS_DSP 0x800 /* MIPS DSP ASE registers */
441 #define NT_MIPS_MSA 0x802 /* MIPS SIMD registers */
442 #define NT_LOONGARCH_CPUCFG 0xa00 /* LoongArch CPU config registers */
443 #define NT_LOONGARCH_CSR 0xa01 /* LoongArch control and status registers */
444 #define NT_LOONGARCH_LSX 0xa02 /* LoongArch Loongson SIMD Extension registers */
445 #define NT_LOONGARCH_LASX 0xa03 /* LoongArch Loongson Advanced SIMD Extension registers */
446 #define NT_LOONGARCH_LBT 0xa04 /* LoongArch Loongson Binary Translation registers */