Lines Matching +full:display +full:- +full:height +full:- +full:chars
19 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
37 * subject to backwards-compatibility constraints.
43 * I915_L3_PARITY_UEVENT - Generated when the driver receives a parity mismatch
46 * track of these events and if a specific cache-line seems to have a
48 * intel-gpu-tools. The value supplied with the event is always 1.
50 * I915_ERROR_UEVENT - Generated upon error detection, currently only via
57 * I915_RESET_UEVENT - Event is generated just before an attempt to reset the
66 * struct i915_user_extension - Base class for defining a chain of extensions
82 * .. code-block:: C
146 * usage of the surface (used for display scanout or not).
158 * enum drm_i915_gem_engine_class - uapi engine type enumeration
184 * Copy engines can perform pre-defined logical or bitwise operations
193 * "vdbox") support instructions that perform fixed-function media
222 I915_ENGINE_CLASS_INVALID = -1
226 * struct i915_engine_class_instance - Engine class/instance identifier
241 #define I915_ENGINE_CLASS_INVALID_NONE -1
242 #define I915_ENGINE_CLASS_INVALID_VIRTUAL -2
291 #define I915_PMU_LAST /* Deprecated - do not use */ I915_PMU_RC6_RESIDENCY
295 #define I915_NR_TEX_REGIONS 255 /* table size 2k - maximum due to use
296 * of chars for next/prev indices */
334 int width, height; /* screen size in pixels */ member
473 /* Must be kept compact -- no holes */
573 * Different modes of per-process Graphics Translation Table,
642 * -1k to -1 Low priority
650 /* Query whether DRM_I915_GEM_EXECBUFFER2 supports the ability to opt-out of
656 /* Query whether DRM_I915_GEM_EXECBUFFER2 supports explicit fence support -
664 * user specified bufffers for post-mortem debugging of GPU hangs. See
672 * per-slice for this system.
688 * Query whether every context (both per-file default and user created) is
716 * the different read/write domains in use (e.g. set-domain), but the assumption
738 * Revision of the i915-perf uAPI. The value returned helps determine what
739 * i915-perf features are available. See drm_i915_perf_property_id.
752 /* Must be kept compact -- no holes and well documented */
755 * struct drm_i915_getparam - Driver parameter query structure.
764 * WARNING: Using pointers instead of fixed-size u64 means we need to write
771 * typedef drm_i915_getparam_t - Driver parameter query structure.
782 /* Must be kept compact -- no holes */
811 /* Allow memory manager to be torn down and re-initialized (eg on
856 * The (page-aligned) allocated size for the object will be returned.
879 * This is a fixed-size type for 32/64 compatibility.
895 * This is a fixed-size type for 32/64 compatibility.
909 * The value will be page-aligned.
915 * This is a fixed-size type for 32/64 compatibility.
935 * This is a fixed-size type for 32/64 compatibility.
941 * struct drm_i915_gem_mmap_offset - Retrieve an offset so we can mmap this buffer object.
958 * This is a fixed-size type for 32/64 compatibility.
968 * - `I915_MMAP_OFFSET_GTT`: Use mmap with the object bound to GTT. (Write-Combined)
969 * - `I915_MMAP_OFFSET_WC`: Use Write-Combined caching.
970 * - `I915_MMAP_OFFSET_WB`: Use Write-Back caching.
971 * - `I915_MMAP_OFFSET_FIXED`: Use object placement to determine caching.
989 * @extensions: Zero-terminated chain of extensions.
997 * struct drm_i915_gem_set_domain - Adjust the objects write or read domain, in
1009 * - I915_GEM_DOMAIN_WC: Uncached write-combined domain
1010 * - I915_GEM_DOMAIN_CPU: CPU cache domain
1011 * - I915_GEM_DOMAIN_GTT: Mappable aperture domain
1023 * - If any of the object placements (see &drm_i915_gem_create_ext_memory_regions)
1025 * mapped as write-combined only.
1027 * - Everything else is always allocated and mapped as write-back, with the
1061 * a relocation list for state buffers and not re-write it per
1095 * the application will get -EINVAL back.
1119 /** GTT domain - aperture and scanout */
1121 /** WC domain - uncached access */
1218 * rendering on other devices if exported via dma-buf. However, sometimes
1220 * if the object is split into non-overlapping ranges shared between different
1229 * used by the GPU - this flag only disables the synchronisation prior to
1238 * state upon a GPU hang involving this batch for post-mortem debugging.
1245 #define __EXEC_OBJECT_UNKNOWN_FLAGS -(EXEC_OBJECT_CAPTURE<<1)
1256 * struct drm_i915_gem_exec_fence - An input or output fence for the execbuf
1280 #define __I915_EXEC_FENCE_UNKNOWN_FLAGS (-(I915_EXEC_FENCE_SIGNAL << 1))
1284 * struct drm_i915_gem_execbuffer_ext_timeline_fences - Timeline fences
1319 * struct drm_i915_gem_execbuffer2 - Structure for DRM_I915_GEM_EXECBUFFER2
1411 * than as the per-file handle.
1418 /* default ping-pong mode */
1432 * Returns -EINVAL if the sync_file fd cannot be found.
1448 * back to userspace. Failure to do so will cause the out-fence to always
1475 * Returns -EINVAL if the sync_file fd cannot be found.
1487 #define __I915_EXEC_UNKNOWN_FLAGS (-(I915_EXEC_USE_EXTENSIONS << 1))
1535 * having flushed any pending activity), and a non-zero return that
1536 * the object is still in-flight on the GPU. (The GPU has not yet
1581 * struct drm_i915_gem_caching - Set or get the caching for given object
1600 * - If any of the object placements (see &drm_i915_gem_create_ext_memory_regions)
1602 * mapped as write-combined only.
1604 * - Everything else is always allocated and mapped as write-back, with the
1611 * Side note: Part of the reason for this is that changing the at-allocation-time CPU
1639 * cached in last-level caches shared between CPU cores and the GPU GT.
1645 * special cache mode (like write-through or gfdt flushing) is
1662 * de-tiling fence registers that no longer exist on modern platforms. Although
1664 * do not need to add them to the uapi that is specific to now-defunct ioctls.
1884 * struct drm_i915_gem_context_create_ext - Structure for creating contexts.
1906 (-(I915_CONTEXT_CREATE_FLAGS_SINGLE_TIMELINE << 1))
1909 * @extensions: Zero-terminated chain of extensions.
1917 * has attempted to use it, never re-use this extension number.
1925 * struct drm_i915_gem_context_param - Context parameter to set or query.
1938 * someone somewhere has attempted to use it, never re-use this context
1948 #define I915_CONTEXT_MIN_USER_PRIORITY -1023 /* inclusive */
2015 * completion. Persistence allows fire-and-forget clients to queue up a
2016 * bunch of work, hand the output over to a display server and then quit.
2020 * cancelled (and exported fences for cancelled requests marked as -EIO).
2027 * attempted to use it, never re-use this context param number.
2044 * .. code-block:: C
2075 * -ENODEV: feature not available
2076 * -EPERM: trying to mark a recoverable or not bannable context as protected
2079 /* Must be kept compact -- no holes and well documented */
2090 * Sub-slice/EU).
2097 * code -ENODEV will be returned.
2101 * combination will return an error code of -EINVAL.
2164 * .. code-block:: C
2264 __u16 virtual_index; /* index of virtual engine in ctx->engines[] */
2284 * struct i915_context_engines_parallel_submit - Configure engine for
2301 * preempted mid-batch. Rather insert coordinated preemption points on all
2305 * Returns -EINVAL if hardware context placement configuration is invalid or if
2308 * Returns -ENODEV if extension isn't supported on the platform / submission
2311 * .. code-block:: none
2351 * CS[1], CS[3] - Not logically contiguous, return -EINVAL
2392 * @engines: 2-d array of engine instances to configure parallel engine
2415 * Context engine map is a new way of addressing engines when submitting batch-
2429 * .. code-block:: C
2481 * struct drm_i915_gem_context_create_ext_setparam - Context parameter
2501 * struct drm_i915_gem_vm_control - Structure to create or destroy VM.
2503 * DRM_I915_GEM_VM_CREATE -
2515 * DRM_I915_GEM_VM_DESTROY -
2522 /** @extensions: Zero-terminated chain of extensions. */
2547 * Render engine timestamp - 0x2358 + 64bit - gen7+
2548 * - Note this register returns an invalid value if using the default
2571 * struct drm_i915_gem_userptr - Create GEM object from user allocated memory.
2614 * Returns -EFAULT if the probe failed.
2621 * returns a non-zero value.
2653 I915_OA_FORMAT_MAX /* non-ABI */
2735 DRM_I915_PERF_PROP_MAX /* non-ABI */
2760 * to close and re-open a stream with the same configuration.
2825 * command collides with periodic sampling - which would be more likely
2835 DRM_I915_PERF_RECORD_MAX /* non-ABI */
2847 * String formatted like "%\08x-%\04x-%\04x-%\04x-%\012x"
2901 * struct drm_i915_query_item - An individual query for the kernel to process.
2911 * - %DRM_I915_QUERY_TOPOLOGY_INFO (see struct drm_i915_query_topology_info)
2912 * - %DRM_I915_QUERY_ENGINE_INFO (see struct drm_i915_engine_info)
2913 * - %DRM_I915_QUERY_PERF_CONFIG (see struct drm_i915_query_perf_config)
2914 * - %DRM_I915_QUERY_MEMORY_REGIONS (see struct drm_i915_query_memory_regions)
2915 * - %DRM_I915_QUERY_HWCONFIG_BLOB (see `GuC HWCONFIG blob uAPI`)
2916 * - %DRM_I915_QUERY_GEOMETRY_SUBSLICES (see struct drm_i915_query_topology_info)
2925 /* Must be kept compact -- no holes and well documented */
2945 * - %DRM_I915_QUERY_PERF_CONFIG_LIST
2946 * - %DRM_I915_QUERY_PERF_CONFIG_DATA_FOR_UUID
2947 * - %DRM_I915_QUERY_PERF_CONFIG_FOR_UUID
2968 * struct drm_i915_query - Supply an array of struct drm_i915_query_item for the
3078 * - The slice mask with one bit per slice telling whether a slice is
3093 * - The subslice mask for each slice with one bit per subslice telling
3096 * describes as a "dual-subslices." The availability of subslice Y
3103 * - The EU mask for each subslice in each slice, with one bit per EU
3134 * .. code-block:: C
3166 * for (i = 0; i < info->num_engines; i++) {
3167 * struct drm_i915_engine_info einfo = info->engines[i];
3269 * String formatted like "%08x-%04x-%04x-%04x-%012x"
3293 * - &drm_i915_perf_oa_config.n_mux_regs
3294 * - &drm_i915_perf_oa_config.n_boolean_regs
3295 * - &drm_i915_perf_oa_config.n_flex_regs
3301 * enum drm_i915_gem_memory_class - Supported memory classes
3306 /** @I915_MEMORY_CLASS_DEVICE: Device local-memory */
3311 * struct drm_i915_gem_memory_class_instance - Identify particular memory region
3322 * struct drm_i915_memory_region_info - Describes one region as known to the
3340 * here, also note that no current region type will ever return -1 here.
3379 * small-bar uAPI support (including
3421 * .. code-block:: C
3449 * for (i = 0; i < info->num_regions; i++) {
3450 * struct drm_i915_memory_region_info mr = info->regions[i];
3481 * struct drm_i915_gem_create_ext - Existing gem_create behaviour, with added
3494 * The (page-aligned) allocated size for the object will be returned.
3508 * page-size for the set of possible placements as the value to use when
3546 * I915_GEM_CREATE_EXT_FLAG_NEEDS_CPU_ACCESS - Signal to the kernel that
3563 * Also note that since the kernel only supports flat-CCS on objects
3566 * flat-CCS.
3568 * Without this hint, the kernel will assume that non-mappable
3574 * On older kernels which lack the relevant small-bar uAPI support (see
3607 * struct drm_i915_gem_create_ext_memory_regions - The
3619 * device local-memory we can do something like:
3621 * .. code-block:: C
3650 * On Flat-CCS capable HW, compression is supported for the objects residing
3657 * So i915 supports Flat-CCS, on the objects which can reside only on
3677 * struct drm_i915_gem_create_ext_protected_content - The
3683 * using this extension will cause the ioctl to fail and return -ENODEV. The
3696 * .. code-block:: C