Lines Matching +full:10 +full:a
4 * Permission is hereby granted, free of charge, to any person obtaining a
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
38 * fourcc code, a Format Modifier may optionally be provided, in order to
44 * Format modifiers are used in conjunction with a fourcc code, forming a
56 * vendor-namespaced, and as such the relationship between a fourcc code and a
61 * Modifiers must uniquely encode buffer layout. In other words, a buffer must
62 * match only a single modifier. A modifier must not be a subset of layouts of
64 * a modifier: a buffer may match a 64-pixel aligned modifier and a 32-pixel
69 * a canonical pair needs to be defined and used by all drivers. Preferred
93 #define fourcc_code(a, b, c, d) ((__u32)(a) | ((__u32)(b) << 8) | \ argument
131 /* 10 bpp Red (direct relationship between channel value and brightness) */
132 #define DRM_FORMAT_R10 fourcc_code('R', '1', '0', ' ') /* [15:0] x:R 6:10 little endian */
158 #define DRM_FORMAT_ARGB4444 fourcc_code('A', 'R', '1', '2') /* [15:0] A:R:G:B 4:4:4:4 little endian…
159 #define DRM_FORMAT_ABGR4444 fourcc_code('A', 'B', '1', '2') /* [15:0] A:B:G:R 4:4:4:4 little endian…
160 #define DRM_FORMAT_RGBA4444 fourcc_code('R', 'A', '1', '2') /* [15:0] R:G:B:A 4:4:4:4 little endian…
161 #define DRM_FORMAT_BGRA4444 fourcc_code('B', 'A', '1', '2') /* [15:0] B:G:R:A 4:4:4:4 little endian…
168 #define DRM_FORMAT_ARGB1555 fourcc_code('A', 'R', '1', '5') /* [15:0] A:R:G:B 1:5:5:5 little endian…
169 #define DRM_FORMAT_ABGR1555 fourcc_code('A', 'B', '1', '5') /* [15:0] A:B:G:R 1:5:5:5 little endian…
170 #define DRM_FORMAT_RGBA5551 fourcc_code('R', 'A', '1', '5') /* [15:0] R:G:B:A 5:5:5:1 little endian…
171 #define DRM_FORMAT_BGRA5551 fourcc_code('B', 'A', '1', '5') /* [15:0] B:G:R:A 5:5:5:1 little endian…
186 #define DRM_FORMAT_ARGB8888 fourcc_code('A', 'R', '2', '4') /* [31:0] A:R:G:B 8:8:8:8 little endian…
187 #define DRM_FORMAT_ABGR8888 fourcc_code('A', 'B', '2', '4') /* [31:0] A:B:G:R 8:8:8:8 little endian…
188 #define DRM_FORMAT_RGBA8888 fourcc_code('R', 'A', '2', '4') /* [31:0] R:G:B:A 8:8:8:8 little endian…
189 #define DRM_FORMAT_BGRA8888 fourcc_code('B', 'A', '2', '4') /* [31:0] B:G:R:A 8:8:8:8 little endian…
191 #define DRM_FORMAT_XRGB2101010 fourcc_code('X', 'R', '3', '0') /* [31:0] x:R:G:B 2:10:10:10 little …
192 #define DRM_FORMAT_XBGR2101010 fourcc_code('X', 'B', '3', '0') /* [31:0] x:B:G:R 2:10:10:10 little …
193 #define DRM_FORMAT_RGBX1010102 fourcc_code('R', 'X', '3', '0') /* [31:0] R:G:B:x 10:10:10:2 little …
194 #define DRM_FORMAT_BGRX1010102 fourcc_code('B', 'X', '3', '0') /* [31:0] B:G:R:x 10:10:10:2 little …
196 #define DRM_FORMAT_ARGB2101010 fourcc_code('A', 'R', '3', '0') /* [31:0] A:R:G:B 2:10:10:10 little …
197 #define DRM_FORMAT_ABGR2101010 fourcc_code('A', 'B', '3', '0') /* [31:0] A:B:G:R 2:10:10:10 little …
198 #define DRM_FORMAT_RGBA1010102 fourcc_code('R', 'A', '3', '0') /* [31:0] R:G:B:A 10:10:10:2 little …
199 #define DRM_FORMAT_BGRA1010102 fourcc_code('B', 'A', '3', '0') /* [31:0] B:G:R:A 10:10:10:2 little …
205 #define DRM_FORMAT_ARGB16161616 fourcc_code('A', 'R', '4', '8') /* [63:0] A:R:G:B 16:16:16:16 littl…
206 #define DRM_FORMAT_ABGR16161616 fourcc_code('A', 'B', '4', '8') /* [63:0] A:B:G:R 16:16:16:16 littl…
211 * [15:0] sign:exponent:mantissa 1:5:10
216 #define DRM_FORMAT_ARGB16161616F fourcc_code('A', 'R', '4', 'H') /* [63:0] A:R:G:B 16:16:16:16 litt…
217 #define DRM_FORMAT_ABGR16161616F fourcc_code('A', 'B', '4', 'H') /* [63:0] A:B:G:R 16:16:16:16 litt…
220 * RGBA format with 10-bit components packed in 64-bit per pixel, with 6 bits
223 …DRM_FORMAT_AXBXGXRX106106106106 fourcc_code('A', 'B', '1', '0') /* [63:0] A:x:B:x:G:x:R:x 10:6:10:…
231 #define DRM_FORMAT_AYUV fourcc_code('A', 'Y', 'U', 'V') /* [31:0] A:Y:Cb:Cr 8:8:8:8 little endian …
232 #define DRM_FORMAT_AVUY8888 fourcc_code('A', 'V', 'U', 'Y') /* [31:0] A:Cr:Cb:Y 8:8:8:8 little endi…
236 #define DRM_FORMAT_VUY101010 fourcc_code('V', 'U', '3', '0') /* Y followed by U then V, 10:10:10. N…
242 … fourcc_code('Y', '2', '1', '0') /* [63:0] Cr0:0:Y1:0:Cb0:0:Y0:0 10:6:10:6:10:6:10:6 little end…
250 #define DRM_FORMAT_Y410 fourcc_code('Y', '4', '1', '0') /* [31:0] A:Cr:Y:Cb 2:10:10:10 litt…
251 #define DRM_FORMAT_Y412 fourcc_code('Y', '4', '1', '2') /* [63:0] A:0:Cr:0:Y:0:Cb:0 12:4:12…
252 #define DRM_FORMAT_Y416 fourcc_code('Y', '4', '1', '6') /* [63:0] A:Cr:Y:Cb 16:16:16:16 lit…
254 #define DRM_FORMAT_XVYU2101010 fourcc_code('X', 'V', '3', '0') /* [31:0] X:Cr:Y:Cb 2:10:10:10 littl…
260 * first 64 bits will contain Y,Cb,Cr components for a 2x2 tile
267 /* [63:0] A3:A2:Y3:Cr0:Y2:A1:A0:Y1:Cb0:Y0 1:1:10:10:10:1:1:10:10:10 little endian */
269 /* [63:0] X3:X2:Y3:Cr0:Y2:X1:X0:Y1:Cb0:Y0 1:1:10:10:10:1:1:10:10:10 little endian */
276 * These formats can only be used with a non-Linear modifier.
282 * 2 plane RGB + A
284 * index 1 = A plane, [7:0] A
286 #define DRM_FORMAT_XRGB8888_A8 fourcc_code('X', 'R', 'A', '8')
287 #define DRM_FORMAT_XBGR8888_A8 fourcc_code('X', 'B', 'A', '8')
288 #define DRM_FORMAT_RGBX8888_A8 fourcc_code('R', 'X', 'A', '8')
289 #define DRM_FORMAT_BGRX8888_A8 fourcc_code('B', 'X', 'A', '8')
290 #define DRM_FORMAT_RGB888_A8 fourcc_code('R', '8', 'A', '8')
291 #define DRM_FORMAT_BGR888_A8 fourcc_code('B', '8', 'A', '8')
292 #define DRM_FORMAT_RGB565_A8 fourcc_code('R', '5', 'A', '8')
293 #define DRM_FORMAT_BGR565_A8 fourcc_code('B', '5', 'A', '8')
317 * index 0 = Y plane, [15:0] Y:x [10:6] little endian
318 * index 1 = Cr:Cb plane, [31:0] Cr:x:Cb:x [10:6:10:6] little endian
320 #define DRM_FORMAT_P210 fourcc_code('P', '2', '1', '0') /* 2x1 subsampled Cr:Cb plane, 10 bit per …
324 * index 0 = Y plane, [15:0] Y:x [10:6] little endian
325 * index 1 = Cr:Cb plane, [31:0] Cr:x:Cb:x [10:6:10:6] little endian
327 #define DRM_FORMAT_P010 fourcc_code('P', '0', '1', '0') /* 2x2 subsampled Cr:Cb plane 10 bits per …
344 * 3 10 bit components and 2 padding bits packed into 4 bytes.
345 * index 0 = Y plane, [31:0] x:Y2:Y1:Y0 2:10:10:10 little endian
346 * index 1 = Cr:Cb plane, [63:0] x:Cr2:Cb2:Cr1:x:Cb1:Cr0:Cb0 [2:10:10:10:2:10:10:10] little endian
348 #define DRM_FORMAT_P030 fourcc_code('P', '0', '3', '0') /* 2x2 subsampled Cr:Cb plane 10 bits per …
351 * 16 bits per component, but only 10 bits are used and 6 bits are padded
352 * index 0: Y plane, [15:0] Y:x [10:6] little endian
353 * index 1: Cb plane, [15:0] Cb:x [10:6] little endian
354 * index 2: Cr plane, [15:0] Cr:x [10:6] little endian
359 * 16 bits per component, but only 10 bits are used and 6 bits are padded
360 * index 0: Y plane, [15:0] Y:x [10:6] little endian
361 * index 1: Cr plane, [15:0] Cr:x [10:6] little endian
362 * index 2: Cb plane, [15:0] Cb:x [10:6] little endian
390 * Format modifiers describe, typically, a re-ordering or modification
391 * of the data in a plane of an FB. This can be used to express tiled/
392 * swizzled formats, or compression, or a combination of the two.
394 * The upper 8 bits of the format modifier are a vendor-id as assigned
427 * When adding a new token please document the layout with a code comment,
435 * compatibility, in cases where a vendor-specific definition already exists and
436 * a generic name for it is desired, the common name is a purely symbolic alias
443 * In future cases where a generic layout is identified before merging with a
444 * vendor-specific modifier, a new 'GENERIC' vendor or modifier using vendor
447 * apply to a single vendor.
460 * This modifier can be used as a sentinel to terminate the format modifiers
461 * list, or to initialize a variable with an invalid modifier. It might also be
472 * and so might actually result in a tiled framebuffer.
481 * used is out-of-band information carried in an API-specific way (e.g. in a
491 * This is a tiled layout using 4Kb tiles (except on gen2 where the tiles 2Kb)
493 * a platform-dependent stride. On top of that the memory can apply
498 * cross-driver sharing. It exists since on a given platform it does uniquely
499 * identify the layout in a simple way for i915-specific userspace, which
508 * This is a tiled layout using 4Kb tiles (except on gen2 where the tiles 2Kb)
510 * chunks column-major, with a platform-dependent height. On top of that the
516 * cross-driver sharing. It exists since on a given platform it does uniquely
517 * identify the layout in a simple way for i915-specific userspace, which
526 * This is a tiled layout using 4Kb tiles in row-major layout.
532 * either a square block or a 2:1 unit.
545 * Each CCS tile matches a 1024x512 pixel area of the main surface.
550 * In reality the CCS tile appears to be a 64Bx64 Y tile, composed
562 * at index 1. A 64B CCS cache line corresponds to an area of 4x1 tiles in
563 * main surface. In other words, 4 bits in CCS map to a main surface cache
564 * line pair. The main surface pitch is required to be a multiple of four
573 * at index 1. A 64B CCS cache line corresponds to an area of 4x1 tiles in
574 * main surface. In other words, 4 bits in CCS map to a main surface cache
575 * line pair. The main surface pitch is required to be a multiple of four
595 * and Depth Clear Value Valid which are ignored by the DE. A CCS cache line
597 * pitch is required to be a multiple of 4 tile widths.
604 * This is a tiled layout using 4KB tiles in a row-major layout. It has the same
607 * granularity, Tile Y has a shape of 16B x 32 rows, but this tiling has a shape
616 * outside of the GEM object in a reserved memory area dedicated for the
618 * main surface pitch is required to be a multiple of four Tile 4 widths.
620 #define I915_FORMAT_MOD_4_TILED_DG2_RC_CCS fourcc_mod_code(INTEL, 10)
628 * GEM object in a reserved memory area dedicated for the storage of the
630 * pitch is required to be a multiple of four Tile 4 widths.
638 * outside of the GEM object in a reserved memory area dedicated for the
640 * main surface pitch is required to be a multiple of four Tile 4 widths. The
651 * Macroblocks are laid in a Z-shape, and each pixel data is following the
666 * This is a simple tiled layout using tiles of 16x16 pixels in a row-major
667 * layout. For YCbCr formats Cb/Cr components are taken in such a way that
675 * Refers to a compressed variant of the base format that is compressed.
712 * This is a simple tiled layout using tiles of 4x4 pixels in a row-major
720 * This is a tiled layout using 64x64 pixel super-tiles, where each super-tile
732 * Same as the 4x4 tiling layout, except every second 4x4 pixel tile starts at a
742 * starts at a different base address. Offsets from the base addresses are
762 * 3D blocks, with the block dimensions (in terms of GOBs) always being a power
764 * a block depth or height of "4").
785 * hardware support a block width of two gobs, but it is impractical
793 * 19:12 k Page Kind. This value directly maps to a field in the page
806 * 21:20 g GOB Height and Page Kind Generation. The height of a GOB changed
815 * 22:22 s Sector layout. On Tegra GPUs prior to Xavier, there is a further
866 * vertically by a power of 2 (1 to 32 GOBs) to form a block.
868 * Within a GOB, data is ordered as 16B x 2 lines sectors laid in Z-shape.
922 * - 64b utiles of pixels in a raster-order grid according to cpp. It's 4x4
925 * - 1k subtiles made of a 4x4 raster-order grid of 64b utiles (so usually
928 * - 4k tiles made of a 2x2 grid of 1k subtiles (so usually 32x32 pixels). On
956 * and UV. Some SAND-using hardware stores UV in a separate tiled
962 * wide, but as this is a 10 bpp format that translates to 96 pixels.
999 * necessary to reduce the padding. If a hardware block can't do XOR,
1000 * the assumption is that a no-XOR tiling modifier will be created.
1007 * AFBC is a proprietary lossless image compression protocol and format.
1022 * categories of modifiers ie AFBC, MISC and AFRC. We can have a maximum of
1038 * size (in pixels) must be aligned to a multiple of the superblock size.
1065 * half of the payload is positioned at a predefined offset from the start
1073 * This flag indicates that the payload of each superblock must be stored at a
1095 * superblocks inside a tile are stored together in memory. 8x8 tiles are used
1107 * can be reduced if a whole superblock is a single color.
1114 * Indicates that the buffer is allocated in a layout safe for front-buffer
1117 #define AFBC_FORMAT_MOD_DB (1ULL << 10)
1132 * affects the storage mode of the individual superblocks. Note that even a
1141 * AFRC is a proprietary fixed rate image compression protocol and format,
1149 * "coding unit" blocks which are individually compressed to a
1150 * fixed size (in bytes). All coding units within a given plane of a buffer
1165 * to a multiple of the paging tile dimensions.
1181 * Example: 16x4 luma samples in a 'Y' plane
1182 * 16x4 chroma 'V' values, in the 'V' plane of a fully-planar YUV buffer
1185 * Example: 8x8 luma samples in a 'Y' plane
1186 * 8x8 chroma 'V' values, in the 'V' plane of a fully-planar YUV buffer
1189 * Example: 8x4 chroma pairs in the 'UV' plane of a semi-planar YUV buffer
1255 * codenamed sunxi. It is associated with a YUV format that uses either 2 or 3
1268 * Amlogic uses a proprietary lossless image compression protocol and format
1275 * The underlying storage is considered to be 3 components, 8bit or 10-bit
1302 * - a body content organized in 64x32 superblocks with 4096 bytes per
1304 * - a 32 bytes per 128x64 header block
1325 * The user-space clients should expect a failure while trying to mmap
1404 #define AMD_FMT_MOD_TILE_GFX9_64K_D 10
1444 * and prefers the driver provided color. This necessitates doing a fastclear
1445 * eliminate operation before a process transfers control.