Lines Matching full:pdif
197 /* I2S0 can phase track the last S/PDIF input */
705 /* S/PDIF Input C Channel Status */
825 /* S/PDIF Host Record Index (bypasses SRC) */
827 /* S/PDIF Host Record Address */
829 /* S/PDIF Host Record Control */
1125 * 0x01, 0x1a: S/PDIF Left
1127 * 0x01, 0x1e: S/PDIF Right
1128 * 0x02, 0x00: Hana S/PDIF Left
1129 * 0x02, 0x01: Hana S/PDIF Right
1152 * 0x01, 0x12: Dock S/PDIF Left
1154 * 0x01, 0x16: Dock S/PDIF Right
1156 * 0x02, 0x00: Hana3 S/PDIF Left
1157 * 0x02, 0x01: Hana3 S/PDIF Right
1168 * 0x02, 0x00: S/PDIF Left
1169 * 0x02, 0x01: S/PDIF Right
1178 * 0x02, 0x00: S/PDIF Left
1179 * 0x02, 0x01: S/PDIF Right
1193 * 0x01, 0x12: Dock S/PDIF Left
1195 * 0x01, 0x16: Dock S/PDIF Right
1292 /* Microdock S/PDIF OUT Left, 1st or 48kHz only */
1294 /* Microdock S/PDIF OUT Left, 2nd or 96kHz */
1296 /* Microdock S/PDIF OUT Right, 1st or 48kHz only */
1298 /* Microdock S/PDIF OUT Right, 2nd or 96kHz */
1300 /* Microdock S/PDIF ADAT 8 channel out +8 to +f */
1328 * 0x05, 0x00: Hana S/PDIF Left
1329 * 0x05, 0x01: Hana S/PDIF Right
1344 * 0x01, 0x12: Dock S/PDIF Left
1346 * 0x01, 0x16: Dock S/PDIF Right
1355 * 0x05, 0x00: Hana3 S/PDIF Left
1356 * 0x05, 0x01: Hana3 S/PDIF Right
1368 * 0x05, 0x00: S/PDIF Left
1369 * 0x05, 0x01: S/PDIF Right
1381 * 0x05, 0x00: S/PDIF Left
1382 * 0x05, 0x01: S/PDIF Right
1394 * 0x01, 0x12: Dock S/PDIF Left
1396 * 0x01, 0x16: Dock S/PDIF Right
1463 /* Microdock S/PDIF Left, 1st or 48kHz only */
1465 /* Microdock S/PDIF Left, 2nd or 96kHz */
1467 /* Microdock S/PDIF Right, 1st or 48kHz only */
1469 /* Microdock S/PDIF Right, 2nd or 96kHz */
1714 unsigned int spdif_bits[3]; /* s/pdif out setup */