Lines Matching +full:interleave +full:- +full:mode
1 /* SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB */
3 * Copyright (c) 2014-2020 Intel Corporation. All rights reserved.
12 #define OPA_PORT_LINK_MODE_OPA 4 /* Port mode is OPA */
21 #define OPA_PORT_LTP_CRC_MODE_14 1 /* 14-bit LTP CRC mode (optional) */
22 #define OPA_PORT_LTP_CRC_MODE_16 2 /* 16-bit LTP CRC mode */
23 #define OPA_PORT_LTP_CRC_MODE_48 4 /* 48-bit LTP CRC mode (optional) */
24 #define OPA_PORT_LTP_CRC_MODE_PER_LANE 8 /* 12/16-bit per lane LTP CRC mode */
61 /* 34 -reserved */
64 /* 37-38 reserved */
68 /* 42-48 reserved */
84 /* 64-255 reserved */
87 /* 3-7; 11-15 reserved; 8-15 cleared on Polling->LinkUp */
96 #define OPA_LINK_SPEED_NOP 0x0000 /* Reserved (1-5 Gbps) */
178 /* flit_control.interleave */
313 __be16 interleave; /* 2 res, 2,2,5,5 */ member