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1 /* SPDX-License-Identifier: GPL-2.0-only */
3  * Copyright (C) 2007-2009 Texas Instruments Inc
7  * - Initial version
9  * - ported to sub device interface
16 #define DM644X_VPBE_OSD_SUBDEV_NAME	"dm644x,vpbe-osd"
17 #define DM365_VPBE_OSD_SUBDEV_NAME	"dm365,vpbe-osd"
18 #define DM355_VPBE_OSD_SUBDEV_NAME	"dm355,vpbe-osd"
22  * @WIN_OSD0: On-Screen Display Window 0
24  * @WIN_OSD1: On-Screen Display Window 1
39  * @OSDWIN_OSD0: On-Screen Display Window 0
40  * @OSDWIN_OSD1: On-Screen Display Window 1
52  * @PIXFMT_1BPP: 1-bit-per-pixel bitmap
53  * @PIXFMT_2BPP: 2-bits-per-pixel bitmap
54  * @PIXFMT_4BPP: 4-bits-per-pixel bitmap
55  * @PIXFMT_8BPP: 8-bits-per-pixel bitmap
56  * @PIXFMT_RGB565: 16-bits-per-pixel RGB565
57  * @PIXFMT_YCBCRI: YUV 4:2:2
58  * @PIXFMT_RGB888: 24-bits-per-pixel RGB888
59  * @PIXFMT_YCRCBI: YUV 4:2:2 with chroma swap
60  * @PIXFMT_NV12: YUV 4:2:0 planar
61  * @PIXFMT_OSD_ATTR: OSD Attribute Window pixel format (4bpp)
154  * @OSD_4_VID_4: OSD pixels contribute 4/8, video pixels contribute 4/8
178  * @BLINK_X4: blink interval is 4 vertical refresh cycles
192  * @H_WIDTH_1: horizontal line width is 1 pixel
193  * @H_WIDTH_4: horizontal line width is 4 pixels
194  * @H_WIDTH_8: horizontal line width is 8 pixels
195  * @H_WIDTH_12: horizontal line width is 12 pixels
196  * @H_WIDTH_16: horizontal line width is 16 pixels
197  * @H_WIDTH_20: horizontal line width is 20 pixels
198  * @H_WIDTH_24: horizontal line width is 24 pixels
199  * @H_WIDTH_28: horizontal line width is 28 pixels
214  * @V_WIDTH_1: vertical line width is 1 line
215  * @V_WIDTH_2: vertical line width is 2 lines
216  * @V_WIDTH_4: vertical line width is 4 lines
217  * @V_WIDTH_6: vertical line width is 6 lines
218  * @V_WIDTH_8: vertical line width is 8 lines
219  * @V_WIDTH_10: vertical line width is 10 lines
220  * @V_WIDTH_12: vertical line width is 12 lines
221  * @V_WIDTH_14: vertical line width is 14 lines
240  * @interlaced: Non-zero if the display is interlaced, or zero otherwise
241  * @h_width: horizontal line width
242  * @v_width: vertical line width
265  * @line_length: offset in bytes between start of each line in memory
266  * @xsize: number of horizontal pixels displayed per line
270  * @interlaced: Non-zero if the display is interlaced, or zero otherwise
273  * A structure describing the configuration parameters of an On-Screen Display
275  * @line_length must be a multiple of the cache line size (32 bytes).
287 /* parameters that apply on a per-window (OSD or video) basis */
297 /* parameters that apply on a per-OSD-window basis */
351 	/* 1-->the isr will toggle the VID0 ping-pong buffer */
371 	struct osd_window_state win[4];