Lines Matching +full:spi +full:- +full:slave

1 /* SPDX-License-Identifier: GPL-2.0-or-later
18 #include <uapi/linux/spi/spi.h>
31 * INTERFACES between SPI master-side drivers and SPI slave protocol handlers,
32 * and SPI infrastructure.
37 * struct spi_statistics - statistics for spi transfers
38 * @syncp: seqcount to protect members in this struct for per-cpu udate
39 * on 32-bit systems
41 * @messages: number of spi-messages handled
90 u64_stats_update_begin(&__lstats->syncp); \
91 u64_stats_add(&__lstats->field, count); \
92 u64_stats_update_end(&__lstats->syncp); \
101 u64_stats_update_begin(&__lstats->syncp); \
102 u64_stats_inc(&__lstats->field); \
103 u64_stats_update_end(&__lstats->syncp); \
108 * struct spi_delay - SPI delay information
124 * struct spi_device - Controller side proxy for an SPI slave device
126 * @controller: SPI controller used with the device.
132 * @mode: The spi mode defines how data is clocked out and in.
138 * like eight or 12 bits are common. In-memory wordsizes are
147 * @controller_data: Board-specific definitions for controller, such as
167 * A @spi_device is used to interchange data between an SPI slave
189 * which is defined in 'include/uapi/linux/spi/spi.h'.
195 #define SPI_MODE_KERNEL_MASK (~(BIT(30) - 1))
203 struct spi_delay word_delay; /* Inter-word delay */
215 * - memory packing (12 bit samples into low bits, others zeroed)
216 * - priority
217 * - chipselect delays
218 * - ...
232 static inline struct spi_device *spi_dev_get(struct spi_device *spi) in spi_dev_get() argument
234 return (spi && get_device(&spi->dev)) ? spi : NULL; in spi_dev_get()
237 static inline void spi_dev_put(struct spi_device *spi) in spi_dev_put() argument
239 if (spi) in spi_dev_put()
240 put_device(&spi->dev); in spi_dev_put()
244 static inline void *spi_get_ctldata(struct spi_device *spi) in spi_get_ctldata() argument
246 return spi->controller_state; in spi_get_ctldata()
249 static inline void spi_set_ctldata(struct spi_device *spi, void *state) in spi_set_ctldata() argument
251 spi->controller_state = state; in spi_set_ctldata()
256 static inline void spi_set_drvdata(struct spi_device *spi, void *data) in spi_set_drvdata() argument
258 dev_set_drvdata(&spi->dev, data); in spi_set_drvdata()
261 static inline void *spi_get_drvdata(struct spi_device *spi) in spi_get_drvdata() argument
263 return dev_get_drvdata(&spi->dev); in spi_get_drvdata()
269 * struct spi_driver - Host side "protocol" driver
270 * @id_table: List of SPI devices supported by this driver
271 * @probe: Binds this driver to the spi device. Drivers can verify
275 * @remove: Unbinds this driver from the spi device
278 * @driver: SPI device drivers should initialize the name and owner
281 * This represents the kind of device driver that uses SPI messages to
282 * interact with the hardware at the other end of a SPI link. It's called
284 * directly to SPI hardware (which is what the underlying SPI controller
295 int (*probe)(struct spi_device *spi);
296 void (*remove)(struct spi_device *spi);
297 void (*shutdown)(struct spi_device *spi);
309 * spi_unregister_driver - reverse effect of spi_register_driver
316 driver_unregister(&sdrv->driver); in spi_unregister_driver()
319 extern struct spi_device *spi_new_ancillary_device(struct spi_device *spi, u8 chip_select);
326 * module_spi_driver() - Helper macro for registering a SPI driver
329 * Helper macro for SPI drivers which do not do anything special in module
338 * struct spi_controller - interface to SPI master or slave controller
341 * @bus_num: board-specific (and often SOC-specific) identifier for a
342 * given SPI controller.
344 * SPI slaves, and are numbered from zero to num_chipselects.
345 * each slave has a chipselect signal, but it's common that not
346 * every chipselect is connected to a slave.
347 * @dma_alignment: SPI controller constraint on DMA buffers alignment.
352 * supported. If set, the SPI core will reject any transfer with an
358 * @slave: indicates that this is an SPI slave controller
359 * @devm_allocated: whether the allocation of this struct is devres-managed
366 * @bus_lock_spinlock: spinlock for SPI bus locking
368 * @bus_lock_flag: indicates that the SPI bus is locked for exclusive use
370 * device's SPI controller; protocol code may call this. This
374 * @set_cs_timing: optional hook for SPI devices to request SPI master
378 * @cleanup: frees controller-specific state
388 * @cur_msg: the currently in-flight message
389 * @cur_msg_completion: a completion for the current in-flight message
397 * @last_cs: the last chip_select that is recorded by set_cs, -1 on non chip
427 * - return 0 if the transfer is finished,
428 * - return 1 if the transfer is still in progress. When
437 * @mem_ops: optimized/dedicated operations for interactions with SPI memory.
442 * @slave_abort: abort the ongoing transfer request on an SPI slave controller
445 * are not GPIOs (driven by the SPI controller itself).
446 * @use_gpio_descriptors: Turns on the code in the SPI core to parse and grab
447 * GPIO descriptors. This will fill in @cs_gpiods and SPI devices will have
450 * fill in this field with the first unused native CS, to be used by SPI
458 * @dummy_rx: dummy receive buffer for full-duplex devices
459 * @dummy_tx: dummy transmit buffer for full-duplex devices
464 * time snapshot in @spi_transfer->ptp_sts as close as possible to the
465 * moment in time when @spi_transfer->ptp_sts_word_pre and
466 * @spi_transfer->ptp_sts_word_post were transmitted.
467 * If the driver does not set this, the SPI core takes the snapshot as
468 * close to the driver hand-over as possible.
476 * Each SPI controller can communicate with one or more @spi_device
482 * The driver for an SPI controller manages access to those devices through
484 * an SPI slave device. For each such message it queues, it calls the
493 * board-specific. usually that simplifies to being SOC-specific.
494 * example: one SOC has three SPI controllers, numbered 0..2,
495 * and one board's schematics might show it using SPI-2. software
501 * might use board-specific GPIOs.
505 /* Some SPI controllers pose alignment requirements on DMAable
518 #define SPI_BPW_MASK(bits) BIT((bits) - 1)
519 #define SPI_BPW_RANGE_MASK(min, max) GENMASK((max) - 1, (min) - 1)
533 #define SPI_MASTER_GPIO_SS BIT(5) /* GPIO CS must select slave */
535 /* Flag indicating if the allocation of this struct is devres-managed */
538 /* Flag indicating this is an SPI slave controller */
539 bool slave; member
545 size_t (*max_transfer_size)(struct spi_device *spi);
546 size_t (*max_message_size)(struct spi_device *spi);
554 /* Lock and mutex for SPI bus locking */
558 /* Flag indicating that the SPI bus is locked for exclusive use */
561 /* Setup mode and clock, etc (spi driver may call many times).
567 int (*setup)(struct spi_device *spi);
570 * set_cs_timing() method is for SPI controllers that supports
573 * This hook allows SPI client drivers to request SPI controllers
577 int (*set_cs_timing)(struct spi_device *spi);
583 * + For now there's no remove-from-queue operation, or
595 * + The message transfers use clock and SPI mode parameters
598 int (*transfer)(struct spi_device *spi,
602 void (*cleanup)(struct spi_device *spi);
612 struct spi_device *spi,
622 * Over time we expect SPI drivers to be phased over to this API.
658 void (*set_cs)(struct spi_device *spi, bool enable);
659 int (*transfer_one)(struct spi_controller *ctlr, struct spi_device *spi,
664 /* Optimized handlers for SPI memory-like operations. */
688 * Driver sets this field to indicate it is able to snapshot SPI
703 return dev_get_drvdata(&ctlr->dev); in spi_controller_get_devdata()
709 dev_set_drvdata(&ctlr->dev, data); in spi_controller_set_devdata()
714 if (!ctlr || !get_device(&ctlr->dev)) in spi_controller_get()
722 put_device(&ctlr->dev); in spi_controller_put()
727 return IS_ENABLED(CONFIG_SPI_SLAVE) && ctlr->slave; in spi_controller_is_slave()
747 /* The spi driver core manages memory for the spi_controller classdev */
749 unsigned int size, bool slave);
768 bool slave);
798 * SPI resource management while processing a SPI message
806 * struct spi_res - spi resource management structure
809 * @data: extra data allocated for the specific use-case
811 * this is based on ideas from devres, but focused on life-cycle
820 /*---------------------------------------------------------------------------*/
823 * I/O INTERFACE between SPI controller and protocol drivers
831 * pointer. (This is unlike most types of I/O API, because SPI hardware
840 * struct spi_transfer - a read/write buffer pair
841 * @tx_buf: data to be written (dma-safe memory), or NULL
842 * @rx_buf: data to be read (dma-safe memory), or NULL
864 * @effective_speed_hz: the effective SCK-speed that was used to
865 * transfer this transfer. Set to 0 if the spi bus driver does
871 * within @tx_buf for which the SPI device is requesting that the time
872 * snapshot for this transfer begins. Upon completing the SPI transfer,
881 * purposefully (instead of setting to spi_transfer->len - 1) to denote
882 * that a transfer-level snapshot taken from within the driver may still
884 * @ptp_sts: Pointer to a memory location held by the SPI slave device where a
889 * The timestamp must represent the time at which the SPI slave device has
894 * @error: Error status logged by spi controller driver.
896 * SPI transfers always write the same number of bytes as they read.
909 * In-memory data values are always in native CPU byte order, translated
910 * from the wire byte order (big-endian except with SPI_LSB_FIRST). So
914 * When the word size of the SPI transfer is not a power-of-two multiple
915 * of eight bits, those in-memory words include extra bits. In-memory
916 * words are always seen by protocol drivers as right-justified, so the
919 * All SPI transfers start with the relevant chipselect active. Normally
930 * stay selected until the next transfer. On multi-device SPI busses
939 * When SPI can transfer in 1x,2x or 4x. It can get this transfer information
940 * from device through @tx_nbits and @rx_nbits. In Bi-direction, these
946 * Zero-initialize every field you don't set up explicitly, to
954 * spi_message.is_dma_mapped reports a pre-existing mapping
995 * struct spi_message - one multi-segment SPI transaction
997 * @spi: SPI device to which the transaction is queued
1008 * @resources: for resource management when the spi message is processed
1013 * in the sense that no other spi_message may use that SPI bus until that
1021 * Zero-initialize every field you don't set up explicitly, to
1028 struct spi_device *spi; member
1037 * Some controller drivers (message-at-a-time queue processing)
1039 * others (with multi-message pipelines) could need a flag to
1057 /* List of spi_res reources when the spi message is processed */
1066 INIT_LIST_HEAD(&m->transfers); in spi_message_init_no_memset()
1067 INIT_LIST_HEAD(&m->resources); in spi_message_init_no_memset()
1079 list_add_tail(&t->transfer_list, &m->transfers); in spi_message_add_tail()
1085 list_del(&t->transfer_list); in spi_transfer_del()
1091 return spi_delay_exec(&t->delay, t); in spi_transfer_delay_exec()
1095 * spi_message_init_with_transfers - Initialize spi_message and append transfers
1097 * @xfers: An array of spi transfers
1141 extern int spi_setup(struct spi_device *spi);
1142 extern int spi_async(struct spi_device *spi, struct spi_message *message);
1143 extern int spi_slave_abort(struct spi_device *spi);
1146 spi_max_message_size(struct spi_device *spi) in spi_max_message_size() argument
1148 struct spi_controller *ctlr = spi->controller; in spi_max_message_size()
1150 if (!ctlr->max_message_size) in spi_max_message_size()
1152 return ctlr->max_message_size(spi); in spi_max_message_size()
1156 spi_max_transfer_size(struct spi_device *spi) in spi_max_transfer_size() argument
1158 struct spi_controller *ctlr = spi->controller; in spi_max_transfer_size()
1160 size_t msg_max = spi_max_message_size(spi); in spi_max_transfer_size()
1162 if (ctlr->max_transfer_size) in spi_max_transfer_size()
1163 tr_max = ctlr->max_transfer_size(spi); in spi_max_transfer_size()
1170 * spi_is_bpw_supported - Check if bits per word is supported
1171 * @spi: SPI device
1174 * This function checks to see if the SPI controller supports @bpw.
1179 static inline bool spi_is_bpw_supported(struct spi_device *spi, u32 bpw) in spi_is_bpw_supported() argument
1181 u32 bpw_mask = spi->master->bits_per_word_mask; in spi_is_bpw_supported()
1189 /*---------------------------------------------------------------------------*/
1191 /* SPI transfer replacement methods which make use of spi_res */
1198 * struct spi_replaced_transfers - structure describing the spi_transfer
1207 * are to get re-inserted
1209 * @inserted_transfers: array of spi_transfers of array-size @inserted,
1225 /*---------------------------------------------------------------------------*/
1227 /* SPI transfer transformation methods */
1234 /*---------------------------------------------------------------------------*/
1236 /* All these synchronous SPI transfer routines are utilities layered
1241 extern int spi_sync(struct spi_device *spi, struct spi_message *message);
1242 extern int spi_sync_locked(struct spi_device *spi, struct spi_message *message);
1247 * spi_sync_transfer - synchronous SPI data transfer
1248 * @spi: device with which data will be exchanged
1253 * Does a synchronous SPI data transfer of the given spi_transfer array.
1260 spi_sync_transfer(struct spi_device *spi, struct spi_transfer *xfers, in spi_sync_transfer() argument
1267 return spi_sync(spi, &msg); in spi_sync_transfer()
1271 * spi_write - SPI synchronous write
1272 * @spi: device to which data will be written
1283 spi_write(struct spi_device *spi, const void *buf, size_t len) in spi_write() argument
1290 return spi_sync_transfer(spi, &t, 1); in spi_write()
1294 * spi_read - SPI synchronous read
1295 * @spi: device from which data will be read
1306 spi_read(struct spi_device *spi, void *buf, size_t len) in spi_read() argument
1313 return spi_sync_transfer(spi, &t, 1); in spi_read()
1317 extern int spi_write_then_read(struct spi_device *spi,
1322 * spi_w8r8 - SPI synchronous 8 bit write followed by 8 bit read
1323 * @spi: device with which data will be exchanged
1332 static inline ssize_t spi_w8r8(struct spi_device *spi, u8 cmd) in spi_w8r8() argument
1337 status = spi_write_then_read(spi, &cmd, 1, &result, 1); in spi_w8r8()
1344 * spi_w8r16 - SPI synchronous 8 bit write followed by 16 bit read
1345 * @spi: device with which data will be exchanged
1349 * The number is returned in wire-order, which is at least sometimes
1350 * big-endian.
1357 static inline ssize_t spi_w8r16(struct spi_device *spi, u8 cmd) in spi_w8r16() argument
1362 status = spi_write_then_read(spi, &cmd, 1, &result, 2); in spi_w8r16()
1369 * spi_w8r16be - SPI synchronous 8 bit write followed by 16 bit big-endian read
1370 * @spi: device with which data will be exchanged
1375 * convert the read 16 bit data word from big-endian to native endianness.
1382 static inline ssize_t spi_w8r16be(struct spi_device *spi, u8 cmd) in spi_w8r16be() argument
1388 status = spi_write_then_read(spi, &cmd, 1, &result, 2); in spi_w8r16be()
1395 /*---------------------------------------------------------------------------*/
1398 * INTERFACE between board init code and SPI infrastructure.
1400 * No SPI driver ever sees these SPI device table segments, but
1401 * it's how the SPI core (or adapters that get hotplugged) grows
1404 * As a rule, SPI devices can't be probed. Instead, board init code
1408 * parport adapters, or microcontrollers acting as USB-to-SPI bridges.
1412 * struct spi_board_info - board-specific template for a SPI device
1415 * data stored there is driver-specific.
1421 * from the chip datasheet and board-specific signal quality issues.
1430 * When adding new SPI devices to the device tree, these structures serve
1436 * be stored in tables of board-specific device descriptors, which are
1478 * - quirks like clock rate mattering when not selected
1486 /* Board init code may ignore whether SPI is configured or not */
1507 spi_add_device(struct spi_device *spi);
1512 extern void spi_unregister_device(struct spi_device *spi);
1520 return list_is_last(&xfer->transfer_list, &ctlr->cur_msg->transfers); in spi_transfer_is_last()