Lines Matching +full:max +full:- +full:bits +full:- +full:per +full:- +full:word
1 /* SPDX-License-Identifier: GPL-2.0-or-later
9 #include <linux/bits.h>
31 * INTERFACES between SPI master-side drivers and SPI slave protocol handlers,
37 * struct spi_statistics - statistics for spi transfers
38 * @syncp: seqcount to protect members in this struct for per-cpu udate
39 * on 32-bit systems
41 * @messages: number of spi-messages handled
90 u64_stats_update_begin(&__lstats->syncp); \
91 u64_stats_add(&__lstats->field, count); \
92 u64_stats_update_end(&__lstats->syncp); \
101 u64_stats_update_begin(&__lstats->syncp); \
102 u64_stats_inc(&__lstats->field); \
103 u64_stats_update_end(&__lstats->syncp); \
108 * struct spi_delay - SPI delay information
124 * struct spi_device - Controller side proxy for an SPI slave device
136 * each word in a transfer (by specifying SPI_LSB_FIRST).
137 * @bits_per_word: Data transfers involve one or more words; word sizes
138 * like eight or 12 bits are common. In-memory wordsizes are
139 * powers of two bytes (e.g. 20 bit samples use 32 bits).
147 * @controller_data: Board-specific definitions for controller, such as
187 * All bits defined above should be covered by SPI_MODE_KERNEL_MASK.
190 * The bits defined here are from bit 31 downwards, while in
192 * These bits must not overlap. A static assert check should make sure of that.
193 * If adding extra bits, make sure to decrease the bit index below as well.
195 #define SPI_MODE_KERNEL_MASK (~(BIT(30) - 1))
203 struct spi_delay word_delay; /* Inter-word delay */
215 * - memory packing (12 bit samples into low bits, others zeroed)
216 * - priority
217 * - chipselect delays
218 * - ...
234 return (spi && get_device(&spi->dev)) ? spi : NULL; in spi_dev_get()
240 put_device(&spi->dev); in spi_dev_put()
246 return spi->controller_state; in spi_get_ctldata()
251 spi->controller_state = state; in spi_set_ctldata()
258 dev_set_drvdata(&spi->dev, data); in spi_set_drvdata()
263 return dev_get_drvdata(&spi->dev); in spi_get_drvdata()
269 * struct spi_driver - Host side "protocol" driver
309 * spi_unregister_driver - reverse effect of spi_register_driver
316 driver_unregister(&sdrv->driver); in spi_unregister_driver()
326 * module_spi_driver() - Helper macro for registering a SPI driver
338 * struct spi_controller - interface to SPI master or slave controller
341 * @bus_num: board-specific (and often SOC-specific) identifier for a
359 * @devm_allocated: whether the allocation of this struct is devres-managed
360 * @max_transfer_size: function that returns the max transfer size for
362 * @max_message_size: function that returns the max message size for
378 * @cleanup: frees controller-specific state
388 * @cur_msg: the currently in-flight message
389 * @cur_msg_completion: a completion for the current in-flight message
397 * @last_cs: the last chip_select that is recorded by set_cs, -1 on non chip
427 * - return 0 if the transfer is finished,
428 * - return 1 if the transfer is still in progress. When
443 * @cs_gpiods: Array of GPIO descs to use as chip select lines; one per CS
458 * @dummy_rx: dummy receive buffer for full-duplex devices
459 * @dummy_tx: dummy transmit buffer for full-duplex devices
464 * time snapshot in @spi_transfer->ptp_sts as close as possible to the
465 * moment in time when @spi_transfer->ptp_sts_word_pre and
466 * @spi_transfer->ptp_sts_word_post were transmitted.
468 * close to the driver hand-over as possible.
493 * board-specific. usually that simplifies to being SOC-specific.
495 * and one board's schematics might show it using SPI-2. software
501 * might use board-specific GPIOs.
518 #define SPI_BPW_MASK(bits) BIT((bits) - 1) argument
519 #define SPI_BPW_RANGE_MASK(min, max) GENMASK((max) - 1, (min) - 1) argument
535 /* Flag indicating if the allocation of this struct is devres-managed */
583 * + For now there's no remove-from-queue operation, or
664 /* Optimized handlers for SPI memory-like operations. */
703 return dev_get_drvdata(&ctlr->dev); in spi_controller_get_devdata()
709 dev_set_drvdata(&ctlr->dev, data); in spi_controller_set_devdata()
714 if (!ctlr || !get_device(&ctlr->dev)) in spi_controller_get()
722 put_device(&ctlr->dev); in spi_controller_put()
727 return IS_ENABLED(CONFIG_SPI_SLAVE) && ctlr->slave; in spi_controller_is_slave()
806 * struct spi_res - spi resource management structure
809 * @data: extra data allocated for the specific use-case
811 * this is based on ideas from devres, but focused on life-cycle
820 /*---------------------------------------------------------------------------*/
829 * segments. Those segments always read the same number of bits as they
840 * struct spi_transfer - a read/write buffer pair
841 * @tx_buf: data to be written (dma-safe memory), or NULL
842 * @rx_buf: data to be read (dma-safe memory), or NULL
845 * @tx_nbits: number of bits used for writing. If 0 the default
847 * @rx_nbits: number of bits used for reading. If 0 the default
862 * @word_delay: inter word delay to be introduced after each word size
864 * @effective_speed_hz: the effective SCK-speed that was used to
870 * @ptp_sts_word_pre: The word (subject to bits_per_word semantics) offset
881 * purposefully (instead of setting to spi_transfer->len - 1) to denote
882 * that a transfer-level snapshot taken from within the driver may still
890 * processed the word, i.e. the "pre" timestamp should be taken before
891 * transmitting the "pre" word, and the "post" timestamp after receiving
892 * transmit confirmation from the controller for the "post" word.
905 * It's an error to try to shift out a partial word. (For example, by
906 * shifting out three bytes with word size of sixteen or twenty bits;
907 * the former uses two bytes per word, the latter uses four bytes.)
909 * In-memory data values are always in native CPU byte order, translated
910 * from the wire byte order (big-endian except with SPI_LSB_FIRST). So
914 * When the word size of the SPI transfer is not a power-of-two multiple
915 * of eight bits, those in-memory words include extra bits. In-memory
916 * words are always seen by protocol drivers as right-justified, so the
917 * undefined (rx) or unused (tx) bits are always the most significant bits.
930 * stay selected until the next transfer. On multi-device SPI busses
940 * from device through @tx_nbits and @rx_nbits. In Bi-direction, these
946 * Zero-initialize every field you don't set up explicitly, to
954 * spi_message.is_dma_mapped reports a pre-existing mapping
971 #define SPI_NBITS_DUAL 0x02 /* 2bits transfer */
972 #define SPI_NBITS_QUAD 0x04 /* 4bits transfer */
995 * struct spi_message - one multi-segment SPI transaction
1021 * Zero-initialize every field you don't set up explicitly, to
1037 * Some controller drivers (message-at-a-time queue processing)
1039 * others (with multi-message pipelines) could need a flag to
1066 INIT_LIST_HEAD(&m->transfers); in spi_message_init_no_memset()
1067 INIT_LIST_HEAD(&m->resources); in spi_message_init_no_memset()
1079 list_add_tail(&t->transfer_list, &m->transfers); in spi_message_add_tail()
1085 list_del(&t->transfer_list); in spi_transfer_del()
1091 return spi_delay_exec(&t->delay, t); in spi_transfer_delay_exec()
1095 * spi_message_init_with_transfers - Initialize spi_message and append transfers
1148 struct spi_controller *ctlr = spi->controller; in spi_max_message_size()
1150 if (!ctlr->max_message_size) in spi_max_message_size()
1152 return ctlr->max_message_size(spi); in spi_max_message_size()
1158 struct spi_controller *ctlr = spi->controller; in spi_max_transfer_size()
1162 if (ctlr->max_transfer_size) in spi_max_transfer_size()
1163 tr_max = ctlr->max_transfer_size(spi); in spi_max_transfer_size()
1170 * spi_is_bpw_supported - Check if bits per word is supported
1172 * @bpw: Bits per word
1181 u32 bpw_mask = spi->master->bits_per_word_mask; in spi_is_bpw_supported()
1189 /*---------------------------------------------------------------------------*/
1198 * struct spi_replaced_transfers - structure describing the spi_transfer
1207 * are to get re-inserted
1209 * @inserted_transfers: array of spi_transfers of array-size @inserted,
1225 /*---------------------------------------------------------------------------*/
1234 /*---------------------------------------------------------------------------*/
1247 * spi_sync_transfer - synchronous SPI data transfer
1271 * spi_write - SPI synchronous write
1294 * spi_read - SPI synchronous read
1322 * spi_w8r8 - SPI synchronous 8 bit write followed by 8 bit read
1344 * spi_w8r16 - SPI synchronous 8 bit write followed by 16 bit read
1349 * The number is returned in wire-order, which is at least sometimes
1350 * big-endian.
1369 * spi_w8r16be - SPI synchronous 8 bit write followed by 16 bit big-endian read
1375 * convert the read 16 bit data word from big-endian to native endianness.
1395 /*---------------------------------------------------------------------------*/
1408 * parport adapters, or microcontrollers acting as USB-to-SPI bridges.
1412 * struct spi_board_info - board-specific template for a SPI device
1415 * data stored there is driver-specific.
1421 * from the chip datasheet and board-specific signal quality issues.
1436 * be stored in tables of board-specific device descriptors, which are
1478 * - quirks like clock rate mattering when not selected
1520 return list_is_last(&xfer->transfer_list, &ctlr->cur_msg->transfers); in spi_transfer_is_last()