Lines Matching +full:0 +full:x0f0
11 #define SM501_SYS_CONFIG (0x000000)
14 #define SM501_SYSTEM_CONTROL (0x000000)
16 #define SM501_SYSCTRL_PANEL_TRISTATE (1<<0)
21 #define SM501_SYSCTRL_PCI_SLAVE_BURST_1 (0<<4)
35 #define SM501_MISC_CONTROL (0x000004)
37 #define SM501_MISC_BUS_SH (0x0)
38 #define SM501_MISC_BUS_PCI (0x1)
39 #define SM501_MISC_BUS_XSCALE (0x2)
40 #define SM501_MISC_BUS_NEC (0x6)
41 #define SM501_MISC_BUS_MASK (0x7)
53 #define SM501_MISC_HOLD_EMPTY (0<<18)
66 #define SM501_GPIO31_0_CONTROL (0x000008)
67 #define SM501_GPIO63_32_CONTROL (0x00000C)
68 #define SM501_DRAM_CONTROL (0x000010)
71 #define SM501_ARBTRTN_CONTROL (0x000014)
74 #define SM501_COMMAND_LIST_STATUS (0x000024)
77 #define SM501_RAW_IRQ_STATUS (0x000028)
78 #define SM501_RAW_IRQ_CLEAR (0x000028)
79 #define SM501_IRQ_STATUS (0x00002C)
80 #define SM501_IRQ_MASK (0x000030)
81 #define SM501_DEBUG_CONTROL (0x000034)
89 #define SM501_CURRENT_GATE (0x000038)
90 #define SM501_CURRENT_CLOCK (0x00003C)
91 #define SM501_POWER_MODE_0_GATE (0x000040)
92 #define SM501_POWER_MODE_0_CLOCK (0x000044)
93 #define SM501_POWER_MODE_1_GATE (0x000048)
94 #define SM501_POWER_MODE_1_CLOCK (0x00004C)
95 #define SM501_SLEEP_MODE_GATE (0x000050)
96 #define SM501_POWER_MODE_CONTROL (0x000054)
99 #define SM501_GATE_HOST (0)
121 #define SM501_CLOCK_M1XCLK (0)
124 #define SM501_PCI_MASTER_BASE (0x000058)
125 #define SM501_ENDIAN_CONTROL (0x00005C)
126 #define SM501_DEVICEID (0x000060)
127 /* 0x050100A0 */
129 #define SM501_DEVICEID_SM501 (0x05010000)
130 #define SM501_DEVICEID_IDMASK (0xffff0000)
131 #define SM501_DEVICEID_REVMASK (0x000000ff)
133 #define SM501_PLLCLOCK_COUNT (0x000064)
134 #define SM501_MISC_TIMING (0x000068)
135 #define SM501_CURRENT_SDRAM_CLOCK (0x00006C)
137 #define SM501_PROGRAMMABLE_PLL_CONTROL (0x000074)
140 #define SM501_GPIO (0x010000)
141 #define SM501_GPIO_DATA_LOW (0x00)
142 #define SM501_GPIO_DATA_HIGH (0x04)
143 #define SM501_GPIO_DDR_LOW (0x08)
144 #define SM501_GPIO_DDR_HIGH (0x0C)
145 #define SM501_GPIO_IRQ_SETUP (0x10)
146 #define SM501_GPIO_IRQ_STATUS (0x14)
147 #define SM501_GPIO_IRQ_RESET (0x14)
150 #define SM501_I2C (0x010040)
151 #define SM501_I2C_BYTE_COUNT (0x00)
152 #define SM501_I2C_CONTROL (0x01)
153 #define SM501_I2C_STATUS (0x02)
154 #define SM501_I2C_RESET (0x02)
155 #define SM501_I2C_SLAVE_ADDRESS (0x03)
156 #define SM501_I2C_DATA (0x04)
159 #define SM501_SSP (0x020000)
161 /* Uart 0 base */
162 #define SM501_UART0 (0x030000)
165 #define SM501_UART1 (0x030020)
168 #define SM501_USB_HOST (0x040000)
171 #define SM501_USB_GADGET (0x060000)
174 #define SM501_USB_GADGET_DATA (0x070000)
177 #define SM501_DC (0x080000)
183 #define SM501_ADDR_MASK (0x3f << 26)
185 #define SM501_FIFO_MASK (0x3 << 16)
186 #define SM501_FIFO_1 (0x0 << 16)
187 #define SM501_FIFO_3 (0x1 << 16)
188 #define SM501_FIFO_7 (0x2 << 16)
189 #define SM501_FIFO_11 (0x3 << 16)
192 #define SM501_OFF_DC_H_TOT (0x000)
193 #define SM501_OFF_DC_V_TOT (0x008)
194 #define SM501_OFF_DC_H_SYNC (0x004)
195 #define SM501_OFF_DC_V_SYNC (0x00C)
197 #define SM501_DC_PANEL_CONTROL (0x000)
205 #define SM501_DC_PANEL_CONTROL_TFT_888 (0<<21)
211 #define SM501_DC_PANEL_CONTROL_LCD_TFT (0<<18)
227 #define SM501_DC_PANEL_CONTROL_8BPP (0<<0)
228 #define SM501_DC_PANEL_CONTROL_16BPP (1<<0)
229 #define SM501_DC_PANEL_CONTROL_32BPP (2<<0)
232 #define SM501_DC_PANEL_PANNING_CONTROL (0x004)
233 #define SM501_DC_PANEL_COLOR_KEY (0x008)
234 #define SM501_DC_PANEL_FB_ADDR (0x00C)
235 #define SM501_DC_PANEL_FB_OFFSET (0x010)
236 #define SM501_DC_PANEL_FB_WIDTH (0x014)
237 #define SM501_DC_PANEL_FB_HEIGHT (0x018)
238 #define SM501_DC_PANEL_TL_LOC (0x01C)
239 #define SM501_DC_PANEL_BR_LOC (0x020)
240 #define SM501_DC_PANEL_H_TOT (0x024)
241 #define SM501_DC_PANEL_H_SYNC (0x028)
242 #define SM501_DC_PANEL_V_TOT (0x02C)
243 #define SM501_DC_PANEL_V_SYNC (0x030)
244 #define SM501_DC_PANEL_CUR_LINE (0x034)
246 #define SM501_DC_VIDEO_CONTROL (0x040)
247 #define SM501_DC_VIDEO_FB0_ADDR (0x044)
248 #define SM501_DC_VIDEO_FB_WIDTH (0x048)
249 #define SM501_DC_VIDEO_FB0_LAST_ADDR (0x04C)
250 #define SM501_DC_VIDEO_TL_LOC (0x050)
251 #define SM501_DC_VIDEO_BR_LOC (0x054)
252 #define SM501_DC_VIDEO_SCALE (0x058)
253 #define SM501_DC_VIDEO_INIT_SCALE (0x05C)
254 #define SM501_DC_VIDEO_YUV_CONSTANTS (0x060)
255 #define SM501_DC_VIDEO_FB1_ADDR (0x064)
256 #define SM501_DC_VIDEO_FB1_LAST_ADDR (0x068)
258 #define SM501_DC_VIDEO_ALPHA_CONTROL (0x080)
259 #define SM501_DC_VIDEO_ALPHA_FB_ADDR (0x084)
260 #define SM501_DC_VIDEO_ALPHA_FB_OFFSET (0x088)
261 #define SM501_DC_VIDEO_ALPHA_FB_LAST_ADDR (0x08C)
262 #define SM501_DC_VIDEO_ALPHA_TL_LOC (0x090)
263 #define SM501_DC_VIDEO_ALPHA_BR_LOC (0x094)
264 #define SM501_DC_VIDEO_ALPHA_SCALE (0x098)
265 #define SM501_DC_VIDEO_ALPHA_INIT_SCALE (0x09C)
266 #define SM501_DC_VIDEO_ALPHA_CHROMA_KEY (0x0A0)
267 #define SM501_DC_VIDEO_ALPHA_COLOR_LOOKUP (0x0A4)
269 #define SM501_DC_PANEL_HWC_BASE (0x0F0)
270 #define SM501_DC_PANEL_HWC_ADDR (0x0F0)
271 #define SM501_DC_PANEL_HWC_LOC (0x0F4)
272 #define SM501_DC_PANEL_HWC_COLOR_1_2 (0x0F8)
273 #define SM501_DC_PANEL_HWC_COLOR_3 (0x0FC)
277 #define SM501_OFF_HWC_ADDR (0x00)
278 #define SM501_OFF_HWC_LOC (0x04)
279 #define SM501_OFF_HWC_COLOR_1_2 (0x08)
280 #define SM501_OFF_HWC_COLOR_3 (0x0C)
282 #define SM501_DC_ALPHA_CONTROL (0x100)
283 #define SM501_DC_ALPHA_FB_ADDR (0x104)
284 #define SM501_DC_ALPHA_FB_OFFSET (0x108)
285 #define SM501_DC_ALPHA_TL_LOC (0x10C)
286 #define SM501_DC_ALPHA_BR_LOC (0x110)
287 #define SM501_DC_ALPHA_CHROMA_KEY (0x114)
288 #define SM501_DC_ALPHA_COLOR_LOOKUP (0x118)
290 #define SM501_DC_CRT_CONTROL (0x200)
300 #define SM501_DC_CRT_CONTROL_PIXEL_MASK (0xF << 4)
304 #define SM501_DC_CRT_CONTROL_8BPP (0<<0)
305 #define SM501_DC_CRT_CONTROL_16BPP (1<<0)
306 #define SM501_DC_CRT_CONTROL_32BPP (2<<0)
308 #define SM501_DC_CRT_FB_ADDR (0x204)
309 #define SM501_DC_CRT_FB_OFFSET (0x208)
310 #define SM501_DC_CRT_H_TOT (0x20C)
311 #define SM501_DC_CRT_H_SYNC (0x210)
312 #define SM501_DC_CRT_V_TOT (0x214)
313 #define SM501_DC_CRT_V_SYNC (0x218)
314 #define SM501_DC_CRT_SIGNATURE_ANALYZER (0x21C)
315 #define SM501_DC_CRT_CUR_LINE (0x220)
316 #define SM501_DC_CRT_MONITOR_DETECT (0x224)
318 #define SM501_DC_CRT_HWC_BASE (0x230)
319 #define SM501_DC_CRT_HWC_ADDR (0x230)
320 #define SM501_DC_CRT_HWC_LOC (0x234)
321 #define SM501_DC_CRT_HWC_COLOR_1_2 (0x238)
322 #define SM501_DC_CRT_HWC_COLOR_3 (0x23C)
324 #define SM501_DC_PANEL_PALETTE (0x400)
326 #define SM501_DC_VIDEO_PALETTE (0x800)
328 #define SM501_DC_CRT_PALETTE (0xC00)
331 #define SM501_ZVPORT (0x090000)
334 #define SM501_AC97 (0x0A0000)
337 #define SM501_UCONTROLLER (0x0B0000)
340 #define SM501_UCONTROLLER_SRAM (0x0C0000)
343 #define SM501_DMA (0x0D0000)
346 #define SM501_2D_ENGINE (0x100000)
347 #define SM501_2D_SOURCE (0x00)
348 #define SM501_2D_DESTINATION (0x04)
349 #define SM501_2D_DIMENSION (0x08)
350 #define SM501_2D_CONTROL (0x0C)
351 #define SM501_2D_PITCH (0x10)
352 #define SM501_2D_FOREGROUND (0x14)
353 #define SM501_2D_BACKGROUND (0x18)
354 #define SM501_2D_STRETCH (0x1C)
355 #define SM501_2D_COLOR_COMPARE (0x20)
356 #define SM501_2D_COLOR_COMPARE_MASK (0x24)
357 #define SM501_2D_MASK (0x28)
358 #define SM501_2D_CLIP_TL (0x2C)
359 #define SM501_2D_CLIP_BR (0x30)
360 #define SM501_2D_MONO_PATTERN_LOW (0x34)
361 #define SM501_2D_MONO_PATTERN_HIGH (0x38)
362 #define SM501_2D_WINDOW_WIDTH (0x3C)
363 #define SM501_2D_SOURCE_BASE (0x40)
364 #define SM501_2D_DESTINATION_BASE (0x44)
365 #define SM501_2D_ALPHA (0x48)
366 #define SM501_2D_WRAP (0x4C)
367 #define SM501_2D_STATUS (0x50)
369 #define SM501_CSC_Y_SOURCE_BASE (0xC8)
370 #define SM501_CSC_CONSTANTS (0xCC)
371 #define SM501_CSC_Y_SOURCE_X (0xD0)
372 #define SM501_CSC_Y_SOURCE_Y (0xD4)
373 #define SM501_CSC_U_SOURCE_BASE (0xD8)
374 #define SM501_CSC_V_SOURCE_BASE (0xDC)
375 #define SM501_CSC_SOURCE_DIMENSION (0xE0)
376 #define SM501_CSC_SOURCE_PITCH (0xE4)
377 #define SM501_CSC_DESTINATION (0xE8)
378 #define SM501_CSC_DESTINATION_DIMENSION (0xEC)
379 #define SM501_CSC_DESTINATION_PITCH (0xF0)
380 #define SM501_CSC_SCALE_FACTOR (0xF4)
381 #define SM501_CSC_DESTINATION_BASE (0xF8)
382 #define SM501_CSC_CONTROL (0xFC)
385 #define SM501_2D_ENGINE_DATA (0x110000)