Lines Matching +full:map +full:- +full:to +full:- +full:dma +full:- +full:channel
1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Copyright (c) 2018-2019 Synopsys, Inc. and/or its affiliates.
37 * enum dw_edma_chip_flags - Flags specific to an eDMA chip
45 * struct dw_edma_chip - representation of DesignWare eDMA controller hardware
48 * @nr_irqs: total number of DMA IRQs
49 * @ops DMA channel to IRQ number mapping
51 * @reg_base DMA register base address
52 * @ll_wr_cnt DMA write link list count
53 * @ll_rd_cnt DMA read link list count
54 * @rg_region DMA register region
55 * @ll_region_wr DMA descriptor link list memory for write channel
56 * @ll_region_rd DMA descriptor link list memory for read channel
57 * @dt_region_wr DMA data memory for write channel
58 * @dt_region_rd DMA data memory for read channel
59 * @mf DMA register map format
86 /* Export to the platform drivers */
93 return -ENODEV; in dw_edma_probe()