Lines Matching +full:- +full:8 +full:g
1 /* SPDX-License-Identifier: GPL-2.0-only */
11 #include <dt-bindings/memory/mtk-memory-port.h>
15 * 0 ~ 4G; 4G ~ 8G; 8G ~ 12G; 12G ~ 16G, we could adjust these masters
18 * b) The iova of any master can NOT cross the 4G/8G/12G boundary.
22 * modules dma-address-region larbs-ports
23 * disp 0 ~ 4G larb0/1/2
24 * vcodec 4G ~ 8G larb4/7
25 * cam/mdp 8G ~ 12G the other larbs.
26 * N/A 12G ~ 16G
32 /* LARB 0 -- MMSYS */
38 /* LARB 1 -- MMSYS */
45 /* LARB 2 -- MMSYS */
52 /* LARB 4 -- VDEC */
61 #define IOMMU_PORT_L4_HW_VDEC_VLD2_EXT MTK_M4U_ID(4, 8)
68 /* LARB 7 -- VENC */
77 #define IOMMU_PORT_L7_VENC_REF_CHROMA MTK_M4U_ID(7, 8)
83 /* LARB 8 -- WPE */
84 #define IOMMU_PORT_L8_WPE_RDMA_0 MTK_M4U_ID(8, 0)
85 #define IOMMU_PORT_L8_WPE_RDMA_1 MTK_M4U_ID(8, 1)
86 #define IOMMU_PORT_L8_WPE_WDMA_0 MTK_M4U_ID(8, 2)
88 /* LARB 9 -- IMG-1 */
97 #define IOMMU_PORT_L9_IMG_CRZO_D1 MTK_M4U_ID(9, 8)
119 /* LARB 11 -- IMG-2 */
128 #define IOMMU_PORT_L11_IMG_CRZO_D1 MTK_M4U_ID(11, 8)
150 /* LARB 13 -- CAM */
156 #define IOMMU_PORT_L13_CAM_CAMSV_6 MTK_M4U_ID(13, 8)
161 /* LARB 14 -- CAM */
165 /* LARB 16 -- RAW-A */
174 #define IOMMU_PORT_L16_CAM_AAO_R1_A MTK_M4U_ID(16, 8)
184 /* LARB 17 -- RAW-B */
193 #define IOMMU_PORT_L17_CAM_AAO_R1_B MTK_M4U_ID(17, 8)
203 /* LARB 19 -- IPE */
209 /* LARB 20 -- IPE */