Lines Matching +full:i +full:- +full:tlb +full:- +full:size
1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 /* include/asm-generic/tlb.h
4 * Generic TLB shootdown code
32 * Generic MMU-gather implementation.
35 * correct and efficient ordering of freeing pages and TLB invalidations.
40 * 2) TLB invalidate page
49 * - tlb_gather_mmu() / tlb_gather_mmu_fullmm() / tlb_finish_mmu()
53 * Finish in particular will issue a (final) TLB invalidate and free
56 * - tlb_start_vma() / tlb_end_vma(); marks the start / end of a VMA
61 * - tlb_remove_table()
63 * tlb_remove_table() is the basic primitive to free page-table directories
70 * - tlb_remove_page() / __tlb_remove_page()
71 * - tlb_remove_page_size() / __tlb_remove_page_size()
81 * - tlb_change_page_size()
83 * call before __tlb_remove_page*() to set the current page-size; implies a
86 * - tlb_flush_mmu() / tlb_flush_mmu_tlbonly()
88 * tlb_flush_mmu_tlbonly() - does the TLB invalidate (and resets
91 * tlb_flush_mmu() - in addition to the above TLB invalidate, also frees
94 * - mmu_gather::fullmm
99 * - We can ignore tlb_{start,end}_vma(); because we don't
102 * - (RISC) architectures that use ASIDs can cycle to a new ASID
105 * - mmu_gather::need_flush_all
108 * flush the entire TLB irrespective of the range. For instance
109 * x86-PAE needs this when changing top-level entries.
116 * - mmu_gather::start / mmu_gather::end
121 * - mmu_gather::freed_tables
125 * - tlb_get_unmap_shift() / tlb_get_unmap_size()
127 * returns the smallest TLB entry size unmapped in this range.
133 * Additionally there are a few opt-in features:
138 * changes the size and provides mmu_gather::page_size to tlb_flush().
140 * This might be useful if your architecture has size specific TLB
148 * Useful if your architecture has non-page page directories.
155 * Like MMU_GATHER_TABLE_FREE, and adds semi-RCU semantics to the free (see
158 * Useful if your architecture doesn't use IPIs for remote TLB invalidates
159 * and therefore doesn't naturally serialize with software page-table walkers.
187 * This is useful if your architecture already flushes TLB entries in the
202 ((PAGE_SIZE - sizeof(struct mmu_table_batch)) / sizeof(void *))
204 extern void tlb_remove_table(struct mmu_gather *tlb, void *table);
212 #define tlb_remove_table(tlb, page) tlb_remove_page((tlb), (page)) argument
218 * This allows an architecture that does not use the linux page-tables for
241 * to work on, then just handle a few from the on-stack structure.
253 ((PAGE_SIZE - sizeof(struct mmu_gather_batch)) / sizeof(void *))
257 * lockups for non-preemptible kernels on huge machines when a lot of memory
263 extern bool __tlb_remove_page_size(struct mmu_gather *tlb, struct page *page,
288 * requires a complete flush of the tlb
325 void tlb_flush_mmu(struct mmu_gather *tlb);
327 static inline void __tlb_adjust_range(struct mmu_gather *tlb, in __tlb_adjust_range() argument
331 tlb->start = min(tlb->start, address); in __tlb_adjust_range()
332 tlb->end = max(tlb->end, address + range_size); in __tlb_adjust_range()
335 static inline void __tlb_reset_range(struct mmu_gather *tlb) in __tlb_reset_range() argument
337 if (tlb->fullmm) { in __tlb_reset_range()
338 tlb->start = tlb->end = ~0; in __tlb_reset_range()
340 tlb->start = TASK_SIZE; in __tlb_reset_range()
341 tlb->end = 0; in __tlb_reset_range()
343 tlb->freed_tables = 0; in __tlb_reset_range()
344 tlb->cleared_ptes = 0; in __tlb_reset_range()
345 tlb->cleared_pmds = 0; in __tlb_reset_range()
346 tlb->cleared_puds = 0; in __tlb_reset_range()
347 tlb->cleared_p4ds = 0; in __tlb_reset_range()
369 static inline void tlb_flush(struct mmu_gather *tlb) in tlb_flush() argument
371 if (tlb->end) in tlb_flush()
372 flush_tlb_mm(tlb->mm); in tlb_flush()
383 static inline void tlb_flush(struct mmu_gather *tlb) in tlb_flush() argument
385 if (tlb->fullmm || tlb->need_flush_all) { in tlb_flush()
386 flush_tlb_mm(tlb->mm); in tlb_flush()
387 } else if (tlb->end) { in tlb_flush()
389 .vm_mm = tlb->mm, in tlb_flush()
390 .vm_flags = (tlb->vma_exec ? VM_EXEC : 0) | in tlb_flush()
391 (tlb->vma_huge ? VM_HUGETLB : 0), in tlb_flush()
394 flush_tlb_range(&vma, tlb->start, tlb->end); in tlb_flush()
402 tlb_update_vma_flags(struct mmu_gather *tlb, struct vm_area_struct *vma) in tlb_update_vma_flags() argument
406 * mips-4k) flush only large pages. in tlb_update_vma_flags()
408 * flush_tlb_range() implementations that flush I-TLB also flush D-TLB in tlb_update_vma_flags()
415 tlb->vma_huge = is_vm_hugetlb_page(vma); in tlb_update_vma_flags()
416 tlb->vma_exec = !!(vma->vm_flags & VM_EXEC); in tlb_update_vma_flags()
417 tlb->vma_pfn = !!(vma->vm_flags & (VM_PFNMAP|VM_MIXEDMAP)); in tlb_update_vma_flags()
420 static inline void tlb_flush_mmu_tlbonly(struct mmu_gather *tlb) in tlb_flush_mmu_tlbonly() argument
426 if (!(tlb->freed_tables || tlb->cleared_ptes || tlb->cleared_pmds || in tlb_flush_mmu_tlbonly()
427 tlb->cleared_puds || tlb->cleared_p4ds)) in tlb_flush_mmu_tlbonly()
430 tlb_flush(tlb); in tlb_flush_mmu_tlbonly()
431 mmu_notifier_invalidate_range(tlb->mm, tlb->start, tlb->end); in tlb_flush_mmu_tlbonly()
432 __tlb_reset_range(tlb); in tlb_flush_mmu_tlbonly()
435 static inline void tlb_remove_page_size(struct mmu_gather *tlb, in tlb_remove_page_size() argument
438 if (__tlb_remove_page_size(tlb, page, page_size)) in tlb_remove_page_size()
439 tlb_flush_mmu(tlb); in tlb_remove_page_size()
442 static inline bool __tlb_remove_page(struct mmu_gather *tlb, struct page *page) in __tlb_remove_page() argument
444 return __tlb_remove_page_size(tlb, page, PAGE_SIZE); in __tlb_remove_page()
451 static inline void tlb_remove_page(struct mmu_gather *tlb, struct page *page) in tlb_remove_page() argument
453 return tlb_remove_page_size(tlb, page, PAGE_SIZE); in tlb_remove_page()
456 static inline void tlb_change_page_size(struct mmu_gather *tlb, in tlb_change_page_size() argument
460 if (tlb->page_size && tlb->page_size != page_size) { in tlb_change_page_size()
461 if (!tlb->fullmm && !tlb->need_flush_all) in tlb_change_page_size()
462 tlb_flush_mmu(tlb); in tlb_change_page_size()
465 tlb->page_size = page_size; in tlb_change_page_size()
469 static inline unsigned long tlb_get_unmap_shift(struct mmu_gather *tlb) in tlb_get_unmap_shift() argument
471 if (tlb->cleared_ptes) in tlb_get_unmap_shift()
473 if (tlb->cleared_pmds) in tlb_get_unmap_shift()
475 if (tlb->cleared_puds) in tlb_get_unmap_shift()
477 if (tlb->cleared_p4ds) in tlb_get_unmap_shift()
483 static inline unsigned long tlb_get_unmap_size(struct mmu_gather *tlb) in tlb_get_unmap_size() argument
485 return 1UL << tlb_get_unmap_shift(tlb); in tlb_get_unmap_size()
489 * In the case of tlb vma handling, we can optimise these away in the
493 static inline void tlb_start_vma(struct mmu_gather *tlb, struct vm_area_struct *vma) in tlb_start_vma() argument
495 if (tlb->fullmm) in tlb_start_vma()
498 tlb_update_vma_flags(tlb, vma); in tlb_start_vma()
500 flush_cache_range(vma, vma->vm_start, vma->vm_end); in tlb_start_vma()
504 static inline void tlb_end_vma(struct mmu_gather *tlb, struct vm_area_struct *vma) in tlb_end_vma() argument
506 if (tlb->fullmm) in tlb_end_vma()
511 * page mapcount -- there might not be page-frames for these PFNs after in tlb_end_vma()
515 if (tlb->vma_pfn || !IS_ENABLED(CONFIG_MMU_GATHER_MERGE_VMAS)) { in tlb_end_vma()
517 * Do a TLB flush and reset the range at VMA boundaries; this avoids in tlb_end_vma()
520 tlb_flush_mmu_tlbonly(tlb); in tlb_end_vma()
525 * tlb_flush_{pte|pmd|pud|p4d}_range() adjust the tlb->start and tlb->end,
528 static inline void tlb_flush_pte_range(struct mmu_gather *tlb, in tlb_flush_pte_range() argument
529 unsigned long address, unsigned long size) in tlb_flush_pte_range() argument
531 __tlb_adjust_range(tlb, address, size); in tlb_flush_pte_range()
532 tlb->cleared_ptes = 1; in tlb_flush_pte_range()
535 static inline void tlb_flush_pmd_range(struct mmu_gather *tlb, in tlb_flush_pmd_range() argument
536 unsigned long address, unsigned long size) in tlb_flush_pmd_range() argument
538 __tlb_adjust_range(tlb, address, size); in tlb_flush_pmd_range()
539 tlb->cleared_pmds = 1; in tlb_flush_pmd_range()
542 static inline void tlb_flush_pud_range(struct mmu_gather *tlb, in tlb_flush_pud_range() argument
543 unsigned long address, unsigned long size) in tlb_flush_pud_range() argument
545 __tlb_adjust_range(tlb, address, size); in tlb_flush_pud_range()
546 tlb->cleared_puds = 1; in tlb_flush_pud_range()
549 static inline void tlb_flush_p4d_range(struct mmu_gather *tlb, in tlb_flush_p4d_range() argument
550 unsigned long address, unsigned long size) in tlb_flush_p4d_range() argument
552 __tlb_adjust_range(tlb, address, size); in tlb_flush_p4d_range()
553 tlb->cleared_p4ds = 1; in tlb_flush_p4d_range()
557 #define __tlb_remove_tlb_entry(tlb, ptep, address) do { } while (0) argument
561 * tlb_remove_tlb_entry - remember a pte unmapping for later tlb invalidation.
564 * so we can later optimise away the tlb invalidate. This helps when
565 * userspace is unmapping already-unmapped pages, which happens quite a lot.
567 #define tlb_remove_tlb_entry(tlb, ptep, address) \ argument
569 tlb_flush_pte_range(tlb, address, PAGE_SIZE); \
570 __tlb_remove_tlb_entry(tlb, ptep, address); \
573 #define tlb_remove_huge_tlb_entry(h, tlb, ptep, address) \ argument
577 tlb_flush_p4d_range(tlb, address, _sz); \
579 tlb_flush_pud_range(tlb, address, _sz); \
581 tlb_flush_pmd_range(tlb, address, _sz); \
583 tlb_flush_pte_range(tlb, address, _sz); \
584 __tlb_remove_tlb_entry(tlb, ptep, address); \
588 * tlb_remove_pmd_tlb_entry - remember a pmd mapping for later tlb invalidation
592 #define __tlb_remove_pmd_tlb_entry(tlb, pmdp, address) do {} while (0) argument
595 #define tlb_remove_pmd_tlb_entry(tlb, pmdp, address) \ argument
597 tlb_flush_pmd_range(tlb, address, HPAGE_PMD_SIZE); \
598 __tlb_remove_pmd_tlb_entry(tlb, pmdp, address); \
602 * tlb_remove_pud_tlb_entry - remember a pud mapping for later tlb
606 #define __tlb_remove_pud_tlb_entry(tlb, pudp, address) do {} while (0) argument
609 #define tlb_remove_pud_tlb_entry(tlb, pudp, address) \ argument
611 tlb_flush_pud_range(tlb, address, HPAGE_PUD_SIZE); \
612 __tlb_remove_pud_tlb_entry(tlb, pudp, address); \
620 * architected non-legacy page table cache (which I'm not aware of
622 * explicit flushing for that, likely *separate* from a regular TLB entry
626 * that would want something that odd, I think it is up to that
634 #define pte_free_tlb(tlb, ptep, address) \ argument
636 tlb_flush_pmd_range(tlb, address, PAGE_SIZE); \
637 tlb->freed_tables = 1; \
638 __pte_free_tlb(tlb, ptep, address); \
643 #define pmd_free_tlb(tlb, pmdp, address) \ argument
645 tlb_flush_pud_range(tlb, address, PAGE_SIZE); \
646 tlb->freed_tables = 1; \
647 __pmd_free_tlb(tlb, pmdp, address); \
652 #define pud_free_tlb(tlb, pudp, address) \ argument
654 tlb_flush_p4d_range(tlb, address, PAGE_SIZE); \
655 tlb->freed_tables = 1; \
656 __pud_free_tlb(tlb, pudp, address); \
661 #define p4d_free_tlb(tlb, pudp, address) \ argument
663 __tlb_adjust_range(tlb, address, PAGE_SIZE); \
664 tlb->freed_tables = 1; \
665 __p4d_free_tlb(tlb, pudp, address); \