1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 /* include/asm-generic/tlb.h
32  * Generic MMU-gather implementation.
49  *  - tlb_gather_mmu() / tlb_gather_mmu_fullmm() / tlb_finish_mmu()
56  *  - tlb_start_vma() / tlb_end_vma(); marks the start / end of a VMA
61  *  - tlb_remove_table()
63  *    tlb_remove_table() is the basic primitive to free page-table directories
70  *  - tlb_remove_page() / __tlb_remove_page()
71  *  - tlb_remove_page_size() / __tlb_remove_page_size()
81  *  - tlb_change_page_size()
83  *    call before __tlb_remove_page*() to set the current page-size; implies a
86  *  - tlb_flush_mmu() / tlb_flush_mmu_tlbonly()
88  *    tlb_flush_mmu_tlbonly() - does the TLB invalidate (and resets
91  *    tlb_flush_mmu() - in addition to the above TLB invalidate, also frees
94  *  - mmu_gather::fullmm
99  *    - We can ignore tlb_{start,end}_vma(); because we don't
102  *    - (RISC) architectures that use ASIDs can cycle to a new ASID
105  *  - mmu_gather::need_flush_all
109  *    x86-PAE needs this when changing top-level entries.
116  *  - mmu_gather::start / mmu_gather::end
121  *  - mmu_gather::freed_tables
125  *  - tlb_get_unmap_shift() / tlb_get_unmap_size()
133  * Additionally there are a few opt-in features:
148  *  Useful if your architecture has non-page page directories.
155  *  Like MMU_GATHER_TABLE_FREE, and adds semi-RCU semantics to the free (see
159  *  and therefore doesn't naturally serialize with software page-table walkers.
202 	((PAGE_SIZE - sizeof(struct mmu_table_batch)) / sizeof(void *))
218  * This allows an architecture that does not use the linux page-tables for
241  * to work on, then just handle a few from the on-stack structure.
253 	((PAGE_SIZE - sizeof(struct mmu_gather_batch)) / sizeof(void *))
257  * lockups for non-preemptible kernels on huge machines when a lot of memory
331 	tlb->start = min(tlb->start, address);  in __tlb_adjust_range()
332 	tlb->end = max(tlb->end, address + range_size);  in __tlb_adjust_range()
337 	if (tlb->fullmm) {  in __tlb_reset_range()
338 		tlb->start = tlb->end = ~0;  in __tlb_reset_range()
340 		tlb->start = TASK_SIZE;  in __tlb_reset_range()
341 		tlb->end = 0;  in __tlb_reset_range()
343 	tlb->freed_tables = 0;  in __tlb_reset_range()
344 	tlb->cleared_ptes = 0;  in __tlb_reset_range()
345 	tlb->cleared_pmds = 0;  in __tlb_reset_range()
346 	tlb->cleared_puds = 0;  in __tlb_reset_range()
347 	tlb->cleared_p4ds = 0;  in __tlb_reset_range()
357 #if defined(tlb_flush)
371 	if (tlb->end)  in tlb_flush()
372 		flush_tlb_mm(tlb->mm);  in tlb_flush()
385 	if (tlb->fullmm || tlb->need_flush_all) {  in tlb_flush()
386 		flush_tlb_mm(tlb->mm);  in tlb_flush()
387 	} else if (tlb->end) {  in tlb_flush()
389 			.vm_mm = tlb->mm,  in tlb_flush()
390 			.vm_flags = (tlb->vma_exec ? VM_EXEC    : 0) |  in tlb_flush()
391 				    (tlb->vma_huge ? VM_HUGETLB : 0),  in tlb_flush()
394 		flush_tlb_range(&vma, tlb->start, tlb->end);  in tlb_flush()
406 	 * mips-4k) flush only large pages.  in tlb_update_vma_flags()
408 	 * flush_tlb_range() implementations that flush I-TLB also flush D-TLB  in tlb_update_vma_flags()
415 	tlb->vma_huge = is_vm_hugetlb_page(vma);  in tlb_update_vma_flags()
416 	tlb->vma_exec = !!(vma->vm_flags & VM_EXEC);  in tlb_update_vma_flags()
417 	tlb->vma_pfn  = !!(vma->vm_flags & (VM_PFNMAP|VM_MIXEDMAP));  in tlb_update_vma_flags()
426 	if (!(tlb->freed_tables || tlb->cleared_ptes || tlb->cleared_pmds ||  in tlb_flush_mmu_tlbonly()
427 	      tlb->cleared_puds || tlb->cleared_p4ds))  in tlb_flush_mmu_tlbonly()
431 	mmu_notifier_invalidate_range(tlb->mm, tlb->start, tlb->end);  in tlb_flush_mmu_tlbonly()
460 	if (tlb->page_size && tlb->page_size != page_size) {  in tlb_change_page_size()
461 		if (!tlb->fullmm && !tlb->need_flush_all)  in tlb_change_page_size()
465 	tlb->page_size = page_size;  in tlb_change_page_size()
471 	if (tlb->cleared_ptes)  in tlb_get_unmap_shift()
473 	if (tlb->cleared_pmds)  in tlb_get_unmap_shift()
475 	if (tlb->cleared_puds)  in tlb_get_unmap_shift()
477 	if (tlb->cleared_p4ds)  in tlb_get_unmap_shift()
495 	if (tlb->fullmm)  in tlb_start_vma()
500 	flush_cache_range(vma, vma->vm_start, vma->vm_end);  in tlb_start_vma()
506 	if (tlb->fullmm)  in tlb_end_vma()
511 	 * page mapcount -- there might not be page-frames for these PFNs after  in tlb_end_vma()
515 	if (tlb->vma_pfn || !IS_ENABLED(CONFIG_MMU_GATHER_MERGE_VMAS)) {  in tlb_end_vma()
525  * tlb_flush_{pte|pmd|pud|p4d}_range() adjust the tlb->start and tlb->end,
532 	tlb->cleared_ptes = 1;  in tlb_flush_pte_range()
539 	tlb->cleared_pmds = 1;  in tlb_flush_pmd_range()
546 	tlb->cleared_puds = 1;  in tlb_flush_pud_range()
553 	tlb->cleared_p4ds = 1;  in tlb_flush_p4d_range()
561  * tlb_remove_tlb_entry - remember a pte unmapping for later tlb invalidation.
565  * userspace is unmapping already-unmapped pages, which happens quite a lot.
588  * tlb_remove_pmd_tlb_entry - remember a pmd mapping for later tlb invalidation
602  * tlb_remove_pud_tlb_entry - remember a pud mapping for later tlb
620  * architected non-legacy page table cache (which I'm not aware of
621  * anybody actually doing), you're going to have some architecturally
637 		tlb->freed_tables = 1;				\
646 		tlb->freed_tables = 1;				\
655 		tlb->freed_tables = 1;				\
664 		tlb->freed_tables = 1;				\