1 // SPDX-License-Identifier: GPL-2.0
23 #define WTSCR_WT		BIT(6)
24 #define WTSCR_TME		BIT(5)
32 #define WRCSR_RSTE		BIT(6)
52 	unsigned long rate = clk_get_rate(priv->clk);  in rza_wdt_calc_timeout()  local
55 	if (priv->cks == CKS_4BIT) {  in rza_wdt_calc_timeout()
56 		ticks = DIV_ROUND_UP(timeout * rate, DIVIDER_4BIT);  in rza_wdt_calc_timeout()
63 		priv->count = 256 - ticks;  in rza_wdt_calc_timeout()
67 		priv->count = 0;  in rza_wdt_calc_timeout()
71 		 timeout, priv->count);  in rza_wdt_calc_timeout()
79 	writew(WTCSR_MAGIC | 0, priv->base + WTCSR);  in rza_wdt_start()
82 	readb(priv->base + WRCSR);  in rza_wdt_start()
83 	writew(WRCSR_CLEAR_WOVF, priv->base + WRCSR);  in rza_wdt_start()
85 	rza_wdt_calc_timeout(priv, wdev->timeout);  in rza_wdt_start()
87 	writew(WRCSR_MAGIC | WRCSR_RSTE, priv->base + WRCSR);  in rza_wdt_start()
88 	writew(WTCNT_MAGIC | priv->count, priv->base + WTCNT);  in rza_wdt_start()
90 	       WTSCR_CKS(priv->cks), priv->base + WTCSR);  in rza_wdt_start()
99 	writew(WTCSR_MAGIC | 0, priv->base + WTCSR);  in rza_wdt_stop()
108 	writew(WTCNT_MAGIC | priv->count, priv->base + WTCNT);  in rza_wdt_ping()
110 	pr_debug("%s: timeout = %u\n", __func__, wdev->timeout);  in rza_wdt_ping()
117 	wdev->timeout = timeout;  in rza_set_timeout()
128 	writew(WTCSR_MAGIC | 0, priv->base + WTCSR);  in rza_wdt_restart()
131 	readb(priv->base + WRCSR);  in rza_wdt_restart()
132 	writew(WRCSR_CLEAR_WOVF, priv->base + WRCSR);  in rza_wdt_restart()
138 	writew(WRCSR_MAGIC | WRCSR_RSTE, priv->base + WRCSR);  in rza_wdt_restart()
139 	writew(WTCNT_MAGIC | 255, priv->base + WTCNT);  in rza_wdt_restart()
140 	writew(WTCSR_MAGIC | WTSCR_WT | WTSCR_TME, priv->base + WTCSR);  in rza_wdt_restart()
169 	struct device *dev = &pdev->dev;  in rza_wdt_probe()
171 	unsigned long rate;  in rza_wdt_probe()  local
176 		return -ENOMEM;  in rza_wdt_probe()
178 	priv->base = devm_platform_ioremap_resource(pdev, 0);  in rza_wdt_probe()
179 	if (IS_ERR(priv->base))  in rza_wdt_probe()
180 		return PTR_ERR(priv->base);  in rza_wdt_probe()
182 	priv->clk = devm_clk_get(dev, NULL);  in rza_wdt_probe()
183 	if (IS_ERR(priv->clk))  in rza_wdt_probe()
184 		return PTR_ERR(priv->clk);  in rza_wdt_probe()
186 	rate = clk_get_rate(priv->clk);  in rza_wdt_probe()
187 	if (rate < 16384) {  in rza_wdt_probe()
188 		dev_err(dev, "invalid clock rate (%ld)\n", rate);  in rza_wdt_probe()
189 		return -ENOENT;  in rza_wdt_probe()
192 	priv->wdev.info = &rza_wdt_ident;  in rza_wdt_probe()
193 	priv->wdev.ops = &rza_wdt_ops;  in rza_wdt_probe()
194 	priv->wdev.parent = dev;  in rza_wdt_probe()
196 	priv->cks = (u8)(uintptr_t) of_device_get_match_data(dev);  in rza_wdt_probe()
197 	if (priv->cks == CKS_4BIT) {  in rza_wdt_probe()
198 		/* Assume slowest clock rate possible (CKS=0xF) */  in rza_wdt_probe()
199 		priv->wdev.max_timeout = (DIVIDER_4BIT * U8_MAX) / rate;  in rza_wdt_probe()
201 	} else if (priv->cks == CKS_3BIT) {  in rza_wdt_probe()
202 		/* Assume slowest clock rate possible (CKS=7) */  in rza_wdt_probe()
203 		rate /= DIVIDER_3BIT;  in rza_wdt_probe()
206 		 * Since the max possible timeout of our 8-bit count  in rza_wdt_probe()
210 		priv->wdev.max_hw_heartbeat_ms = (1000 * U8_MAX) / rate;  in rza_wdt_probe()
211 		dev_dbg(dev, "max hw timeout of %dms\n",  in rza_wdt_probe()
212 			priv->wdev.max_hw_heartbeat_ms);  in rza_wdt_probe()
215 	priv->wdev.min_timeout = 1;  in rza_wdt_probe()
216 	priv->wdev.timeout = DEFAULT_TIMEOUT;  in rza_wdt_probe()
218 	watchdog_init_timeout(&priv->wdev, 0, dev);  in rza_wdt_probe()
219 	watchdog_set_drvdata(&priv->wdev, priv);  in rza_wdt_probe()
221 	ret = devm_watchdog_register_device(dev, &priv->wdev);  in rza_wdt_probe()
229 	{ .compatible = "renesas,r7s9210-wdt",	.data = (void *)CKS_4BIT, },
230 	{ .compatible = "renesas,rza-wdt",	.data = (void *)CKS_3BIT, },