1 // SPDX-License-Identifier: GPL-2.0-or-later
20 #include <linux/errno.h>		/* For the -ENODEV/... values */
22 #include <linux/fs.h>			/* For file operations */
31 #include <asm/mach-rc32434/integ.h>	/* For the Watchdog registers */
54  * ((2 ^ 32) - 1) / (400MHz / 2) = 21s.  */
67 /* apply or and nand masks to data read from addr and write back */
68 #define SET_BITS(addr, or, nand) \  argument
69 	writel((readl(&addr) | or) & ~nand, &addr)
73 	int max_to = WTCOMP2SEC((u32)-1);  in rc32434_wdt_set()
77 		return -EINVAL;  in rc32434_wdt_set()
81 	writel(SEC2WTCOMP(timeout), &wdt_reg->wtcompare);  in rc32434_wdt_set()
89 	u32 or, nand;  in rc32434_wdt_start()  local
94 	writel(0, &wdt_reg->wtcount);  in rc32434_wdt_start()
96 	/* don't generate a non-maskable interrupt,  in rc32434_wdt_start()
98 	nand = 1 << RC32434_ERR_WNE;  in rc32434_wdt_start()
102 	nand |= 1 << RC32434_ERR_WTO;  in rc32434_wdt_start()
104 	SET_BITS(wdt_reg->errcs, or, nand);  in rc32434_wdt_start()
110 	nand = 1 << RC32434_WTC_TO;  in rc32434_wdt_start()
113 	SET_BITS(wdt_reg->wtc, or, nand);  in rc32434_wdt_start()
124 	SET_BITS(wdt_reg->wtc, 0, 1 << RC32434_WTC_EN);  in rc32434_wdt_stop()
133 	writel(0, &wdt_reg->wtcount);  in rc32434_wdt_ping()
140 		return -EBUSY;  in rc32434_wdt_open()
177 					return -EFAULT;  in rc32434_wdt_write()
203 			return -EFAULT;  in rc32434_wdt_ioctl()
209 			return -EFAULT;  in rc32434_wdt_ioctl()
213 			return -EFAULT;  in rc32434_wdt_ioctl()
222 			return -EINVAL;  in rc32434_wdt_ioctl()
230 			return -EFAULT;  in rc32434_wdt_ioctl()
232 			return -EINVAL;  in rc32434_wdt_ioctl()
235 		return copy_to_user(argp, &timeout, sizeof(int)) ? -EFAULT : 0;  in rc32434_wdt_ioctl()
237 		return -ENOTTY;  in rc32434_wdt_ioctl()
267 		return -ENODEV;  in rc32434_wdt_probe()
270 	wdt_reg = devm_ioremap(&pdev->dev, r->start, resource_size(r));  in rc32434_wdt_probe()
273 		return -ENXIO;  in rc32434_wdt_probe()
286 			WTCOMP2SEC((u32)-1));  in rc32434_wdt_probe()