Lines Matching +full:wdt +full:- +full:enable +full:- +full:once
1 // SPDX-License-Identifier: GPL-2.0+
36 * Counters ID 2 and 3 are enabled by default even before U-Boot loads,
73 MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default="
77 struct watchdog_device wdt; member
90 * when low is read, high is latched into flip-flops so that it can be in get_counter_value()
93 val = readl(dev->reg + CNTR_COUNT_LOW(id)); in get_counter_value()
94 val |= ((u64)readl(dev->reg + CNTR_COUNT_HIGH(id))) << 32; in get_counter_value()
101 writel(val & 0xffffffff, dev->reg + CNTR_COUNT_LOW(id)); in set_counter_value()
102 writel(val >> 32, dev->reg + CNTR_COUNT_HIGH(id)); in set_counter_value()
109 reg = readl(dev->reg + CNTR_CTRL(id)); in counter_enable()
111 writel(reg, dev->reg + CNTR_CTRL(id)); in counter_enable()
118 reg = readl(dev->reg + CNTR_CTRL(id)); in counter_disable()
120 writel(reg, dev->reg + CNTR_CTRL(id)); in counter_disable()
128 reg = readl(dev->reg + CNTR_CTRL(id)); in init_counter()
142 writel(reg, dev->reg + CNTR_CTRL(id)); in init_counter()
145 static int armada_37xx_wdt_ping(struct watchdog_device *wdt) in armada_37xx_wdt_ping() argument
147 struct armada_37xx_watchdog *dev = watchdog_get_drvdata(wdt); in armada_37xx_wdt_ping()
156 static unsigned int armada_37xx_wdt_get_timeleft(struct watchdog_device *wdt) in armada_37xx_wdt_get_timeleft() argument
158 struct armada_37xx_watchdog *dev = watchdog_get_drvdata(wdt); in armada_37xx_wdt_get_timeleft()
162 do_div(res, dev->clk_rate); in armada_37xx_wdt_get_timeleft()
167 static int armada_37xx_wdt_set_timeout(struct watchdog_device *wdt, in armada_37xx_wdt_set_timeout() argument
170 struct armada_37xx_watchdog *dev = watchdog_get_drvdata(wdt); in armada_37xx_wdt_set_timeout()
172 wdt->timeout = timeout; in armada_37xx_wdt_set_timeout()
179 dev->timeout = (u64)dev->clk_rate * timeout; in armada_37xx_wdt_set_timeout()
180 do_div(dev->timeout, CNTR_CTRL_PRESCALE_MIN); in armada_37xx_wdt_set_timeout()
182 set_counter_value(dev, CNTR_ID_WDOG, dev->timeout); in armada_37xx_wdt_set_timeout()
191 regmap_read(dev->cpu_misc, WDT_TIMER_SELECT, ®); in armada_37xx_wdt_is_running()
195 reg = readl(dev->reg + CNTR_CTRL(CNTR_ID_WDOG)); in armada_37xx_wdt_is_running()
199 static int armada_37xx_wdt_start(struct watchdog_device *wdt) in armada_37xx_wdt_start() argument
201 struct armada_37xx_watchdog *dev = watchdog_get_drvdata(wdt); in armada_37xx_wdt_start()
204 regmap_write(dev->cpu_misc, WDT_TIMER_SELECT, WDT_TIMER_SELECT_VAL); in armada_37xx_wdt_start()
213 set_counter_value(dev, CNTR_ID_WDOG, dev->timeout); in armada_37xx_wdt_start()
215 /* enable counter 1 */ in armada_37xx_wdt_start()
224 static int armada_37xx_wdt_stop(struct watchdog_device *wdt) in armada_37xx_wdt_stop() argument
226 struct armada_37xx_watchdog *dev = watchdog_get_drvdata(wdt); in armada_37xx_wdt_stop()
230 regmap_write(dev->cpu_misc, WDT_TIMER_SELECT, 0); in armada_37xx_wdt_stop()
261 dev = devm_kzalloc(&pdev->dev, sizeof(struct armada_37xx_watchdog), in armada_37xx_wdt_probe()
264 return -ENOMEM; in armada_37xx_wdt_probe()
266 dev->wdt.info = &armada_37xx_wdt_info; in armada_37xx_wdt_probe()
267 dev->wdt.ops = &armada_37xx_wdt_ops; in armada_37xx_wdt_probe()
269 regmap = syscon_regmap_lookup_by_phandle(pdev->dev.of_node, in armada_37xx_wdt_probe()
270 "marvell,system-controller"); in armada_37xx_wdt_probe()
273 dev->cpu_misc = regmap; in armada_37xx_wdt_probe()
277 return -ENODEV; in armada_37xx_wdt_probe()
278 dev->reg = devm_ioremap(&pdev->dev, res->start, resource_size(res)); in armada_37xx_wdt_probe()
279 if (!dev->reg) in armada_37xx_wdt_probe()
280 return -ENOMEM; in armada_37xx_wdt_probe()
283 dev->clk = devm_clk_get(&pdev->dev, NULL); in armada_37xx_wdt_probe()
284 if (IS_ERR(dev->clk)) in armada_37xx_wdt_probe()
285 return PTR_ERR(dev->clk); in armada_37xx_wdt_probe()
287 ret = clk_prepare_enable(dev->clk); in armada_37xx_wdt_probe()
290 ret = devm_add_action_or_reset(&pdev->dev, in armada_37xx_wdt_probe()
291 armada_clk_disable_unprepare, dev->clk); in armada_37xx_wdt_probe()
295 dev->clk_rate = clk_get_rate(dev->clk); in armada_37xx_wdt_probe()
296 if (!dev->clk_rate) in armada_37xx_wdt_probe()
297 return -EINVAL; in armada_37xx_wdt_probe()
304 dev->wdt.min_timeout = 1; in armada_37xx_wdt_probe()
305 dev->wdt.max_timeout = UINT_MAX; in armada_37xx_wdt_probe()
306 dev->wdt.parent = &pdev->dev; in armada_37xx_wdt_probe()
309 dev->wdt.timeout = WATCHDOG_TIMEOUT; in armada_37xx_wdt_probe()
310 watchdog_init_timeout(&dev->wdt, timeout, &pdev->dev); in armada_37xx_wdt_probe()
312 platform_set_drvdata(pdev, &dev->wdt); in armada_37xx_wdt_probe()
313 watchdog_set_drvdata(&dev->wdt, dev); in armada_37xx_wdt_probe()
315 armada_37xx_wdt_set_timeout(&dev->wdt, dev->wdt.timeout); in armada_37xx_wdt_probe()
318 set_bit(WDOG_HW_RUNNING, &dev->wdt.status); in armada_37xx_wdt_probe()
320 watchdog_set_nowayout(&dev->wdt, nowayout); in armada_37xx_wdt_probe()
321 watchdog_stop_on_reboot(&dev->wdt); in armada_37xx_wdt_probe()
322 ret = devm_watchdog_register_device(&pdev->dev, &dev->wdt); in armada_37xx_wdt_probe()
326 dev_info(&pdev->dev, "Initial timeout %d sec%s\n", in armada_37xx_wdt_probe()
327 dev->wdt.timeout, nowayout ? ", nowayout" : ""); in armada_37xx_wdt_probe()
334 struct watchdog_device *wdt = dev_get_drvdata(dev); in armada_37xx_wdt_suspend() local
336 return armada_37xx_wdt_stop(wdt); in armada_37xx_wdt_suspend()
341 struct watchdog_device *wdt = dev_get_drvdata(dev); in armada_37xx_wdt_resume() local
343 if (watchdog_active(wdt)) in armada_37xx_wdt_resume()
344 return armada_37xx_wdt_start(wdt); in armada_37xx_wdt_resume()
356 { .compatible = "marvell,armada-3700-wdt", },