Lines Matching +full:mode +full:- +full:flag
52 MODULE_PARM_DESC(w1_id, "1-wire id for the slave detection in HDQ mode");
62 /* mode: 0-HDQ 1-W1 */
63 int mode; member
70 return __raw_readl(hdq_data->hdq_base + offset); in hdq_reg_in()
75 __raw_writel(val, hdq_data->hdq_base + offset); in hdq_reg_out()
81 u8 new_val = (__raw_readl(hdq_data->hdq_base + offset) & ~mask) in hdq_reg_merge()
83 __raw_writel(new_val, hdq_data->hdq_base + offset); in hdq_reg_merge()
89 * Wait for one or more bits in flag change.
90 * HDQ_FLAG_SET: wait until any bit in the flag is set.
91 * HDQ_FLAG_CLEAR: wait until all bits in the flag are cleared.
92 * return 0 on success and -ETIMEDOUT in the case of timeout.
95 u8 flag, u8 flag_set, u8 *status) in hdq_wait_for_flag() argument
101 /* wait for the flag clear */ in hdq_wait_for_flag()
102 while (((*status = hdq_reg_in(hdq_data, offset)) & flag) in hdq_wait_for_flag()
106 if (*status & flag) in hdq_wait_for_flag()
107 ret = -ETIMEDOUT; in hdq_wait_for_flag()
109 /* wait for the flag set */ in hdq_wait_for_flag()
110 while (!((*status = hdq_reg_in(hdq_data, offset)) & flag) in hdq_wait_for_flag()
114 if (!(*status & flag)) in hdq_wait_for_flag()
115 ret = -ETIMEDOUT; in hdq_wait_for_flag()
117 return -EINVAL; in hdq_wait_for_flag()
128 spin_lock_irqsave(&hdq_data->hdq_spinlock, irqflags); in hdq_reset_irqstatus()
129 status = hdq_data->hdq_irqstatus; in hdq_reset_irqstatus()
130 /* this is a read-modify-write */ in hdq_reset_irqstatus()
131 hdq_data->hdq_irqstatus &= ~bits; in hdq_reset_irqstatus()
132 spin_unlock_irqrestore(&hdq_data->hdq_spinlock, irqflags); in hdq_reset_irqstatus()
143 ret = mutex_lock_interruptible(&hdq_data->hdq_mutex); in hdq_write_byte()
145 ret = -EINTR; in hdq_write_byte()
149 if (hdq_data->hdq_irqstatus) in hdq_write_byte()
150 dev_err(hdq_data->dev, "TX irqstatus not cleared (%02x)\n", in hdq_write_byte()
151 hdq_data->hdq_irqstatus); in hdq_write_byte()
162 (hdq_data->hdq_irqstatus & OMAP_HDQ_INT_STATUS_TXCOMPLETE), in hdq_write_byte()
166 dev_dbg(hdq_data->dev, "TX wait elapsed\n"); in hdq_write_byte()
167 ret = -ETIMEDOUT; in hdq_write_byte()
173 dev_dbg(hdq_data->dev, "timeout waiting for" in hdq_write_byte()
175 ret = -ETIMEDOUT; in hdq_write_byte()
184 dev_dbg(hdq_data->dev, "timeout waiting GO bit" in hdq_write_byte()
189 mutex_unlock(&hdq_data->hdq_mutex); in hdq_write_byte()
200 spin_lock_irqsave(&hdq_data->hdq_spinlock, irqflags); in hdq_isr()
201 hdq_data->hdq_irqstatus |= hdq_reg_in(hdq_data, OMAP_HDQ_INT_STATUS); in hdq_isr()
202 spin_unlock_irqrestore(&hdq_data->hdq_spinlock, irqflags); in hdq_isr()
203 dev_dbg(hdq_data->dev, "hdq_isr: %x\n", hdq_data->hdq_irqstatus); in hdq_isr()
205 if (hdq_data->hdq_irqstatus & in hdq_isr()
215 /* W1 search callback function in HDQ mode */
228 * HDQ might not obey truly the 1-wire spec. in omap_w1_search_bus()
243 ret = mutex_lock_interruptible(&hdq_data->hdq_mutex); in omap_hdq_break()
245 dev_dbg(hdq_data->dev, "Could not acquire mutex\n"); in omap_hdq_break()
246 ret = -EINTR; in omap_hdq_break()
250 if (hdq_data->hdq_irqstatus) in omap_hdq_break()
251 dev_err(hdq_data->dev, "break irqstatus not cleared (%02x)\n", in omap_hdq_break()
252 hdq_data->hdq_irqstatus); in omap_hdq_break()
262 (hdq_data->hdq_irqstatus & OMAP_HDQ_INT_STATUS_TIMEOUT), in omap_hdq_break()
266 dev_dbg(hdq_data->dev, "break wait elapsed\n"); in omap_hdq_break()
267 ret = -EINTR; in omap_hdq_break()
273 dev_dbg(hdq_data->dev, "timeout waiting for TIMEOUT, %x\n", in omap_hdq_break()
275 ret = -ETIMEDOUT; in omap_hdq_break()
285 dev_dbg(hdq_data->dev, "Presence bit not set\n"); in omap_hdq_break()
286 ret = -ETIMEDOUT; in omap_hdq_break()
292 * zero wait time expected for interrupt mode. in omap_hdq_break()
299 dev_dbg(hdq_data->dev, "timeout waiting INIT&GO bits" in omap_hdq_break()
303 mutex_unlock(&hdq_data->hdq_mutex); in omap_hdq_break()
313 ret = mutex_lock_interruptible(&hdq_data->hdq_mutex); in hdq_read_byte()
315 ret = -EINTR; in hdq_read_byte()
319 if (pm_runtime_suspended(hdq_data->dev)) { in hdq_read_byte()
320 ret = -EINVAL; in hdq_read_byte()
324 if (!(hdq_data->hdq_irqstatus & OMAP_HDQ_INT_STATUS_RXCOMPLETE)) { in hdq_read_byte()
332 (hdq_data->hdq_irqstatus in hdq_read_byte()
344 dev_dbg(hdq_data->dev, "timeout waiting for" in hdq_read_byte()
346 ret = -ETIMEDOUT; in hdq_read_byte()
355 mutex_unlock(&hdq_data->hdq_mutex); in hdq_read_byte()
362 * W1 triplet callback function - used for searching ROM addresses.
363 * Registered only when controller is in 1-wire mode.
375 err = pm_runtime_get_sync(hdq_data->dev); in omap_w1_triplet()
377 pm_runtime_put_noidle(hdq_data->dev); in omap_w1_triplet()
382 err = mutex_lock_interruptible(&hdq_data->hdq_mutex); in omap_w1_triplet()
384 dev_dbg(hdq_data->dev, "Could not acquire mutex\n"); in omap_w1_triplet()
392 (hdq_data->hdq_irqstatus in omap_w1_triplet()
399 dev_dbg(hdq_data->dev, "RX wait elapsed\n"); in omap_w1_triplet()
408 (hdq_data->hdq_irqstatus in omap_w1_triplet()
415 dev_dbg(hdq_data->dev, "RX wait elapsed\n"); in omap_w1_triplet()
437 (hdq_data->hdq_irqstatus in omap_w1_triplet()
444 dev_dbg(hdq_data->dev, "TX wait elapsed\n"); in omap_w1_triplet()
452 mutex_unlock(&hdq_data->hdq_mutex); in omap_w1_triplet()
454 pm_runtime_mark_last_busy(hdq_data->dev); in omap_w1_triplet()
455 pm_runtime_put_autosuspend(hdq_data->dev); in omap_w1_triplet()
466 err = pm_runtime_get_sync(hdq_data->dev); in omap_w1_reset_bus()
468 pm_runtime_put_noidle(hdq_data->dev); in omap_w1_reset_bus()
475 pm_runtime_mark_last_busy(hdq_data->dev); in omap_w1_reset_bus()
476 pm_runtime_put_autosuspend(hdq_data->dev); in omap_w1_reset_bus()
488 ret = pm_runtime_get_sync(hdq_data->dev); in omap_w1_read_byte()
490 pm_runtime_put_noidle(hdq_data->dev); in omap_w1_read_byte()
492 return -1; in omap_w1_read_byte()
497 val = -1; in omap_w1_read_byte()
499 pm_runtime_mark_last_busy(hdq_data->dev); in omap_w1_read_byte()
500 pm_runtime_put_autosuspend(hdq_data->dev); in omap_w1_read_byte()
512 ret = pm_runtime_get_sync(hdq_data->dev); in omap_w1_write_byte()
514 pm_runtime_put_noidle(hdq_data->dev); in omap_w1_write_byte()
529 dev_dbg(hdq_data->dev, "TX failure:Ctrl status %x\n", status); in omap_w1_write_byte()
534 pm_runtime_mark_last_busy(hdq_data->dev); in omap_w1_write_byte()
535 pm_runtime_put_autosuspend(hdq_data->dev); in omap_w1_write_byte()
548 hdq_reg_out(hdq_data, 0, hdq_data->mode); in omap_hdq_runtime_suspend()
558 /* select HDQ/1W mode & enable clocks */ in omap_hdq_runtime_resume()
562 hdq_data->mode); in omap_hdq_runtime_resume()
575 struct device *dev = &pdev->dev; in omap_hdq_probe()
579 const char *mode; in omap_hdq_probe() local
583 dev_dbg(&pdev->dev, "unable to allocate memory\n"); in omap_hdq_probe()
584 return -ENOMEM; in omap_hdq_probe()
587 hdq_data->dev = dev; in omap_hdq_probe()
590 hdq_data->hdq_base = devm_platform_ioremap_resource(pdev, 0); in omap_hdq_probe()
591 if (IS_ERR(hdq_data->hdq_base)) in omap_hdq_probe()
592 return PTR_ERR(hdq_data->hdq_base); in omap_hdq_probe()
594 mutex_init(&hdq_data->hdq_mutex); in omap_hdq_probe()
596 ret = of_property_read_string(pdev->dev.of_node, "ti,mode", &mode); in omap_hdq_probe()
597 if (ret < 0 || !strcmp(mode, "hdq")) { in omap_hdq_probe()
598 hdq_data->mode = 0; in omap_hdq_probe()
601 hdq_data->mode = 1; in omap_hdq_probe()
605 pm_runtime_enable(&pdev->dev); in omap_hdq_probe()
606 pm_runtime_use_autosuspend(&pdev->dev); in omap_hdq_probe()
607 pm_runtime_set_autosuspend_delay(&pdev->dev, 300); in omap_hdq_probe()
608 ret = pm_runtime_get_sync(&pdev->dev); in omap_hdq_probe()
610 pm_runtime_put_noidle(&pdev->dev); in omap_hdq_probe()
611 dev_dbg(&pdev->dev, "pm_runtime_get_sync failed\n"); in omap_hdq_probe()
616 dev_info(&pdev->dev, "OMAP HDQ Hardware Rev %c.%c. Driver in %s mode\n", in omap_hdq_probe()
619 spin_lock_init(&hdq_data->hdq_spinlock); in omap_hdq_probe()
623 dev_dbg(&pdev->dev, "Failed to get IRQ: %d\n", irq); in omap_hdq_probe()
630 dev_dbg(&pdev->dev, "could not request irq\n"); in omap_hdq_probe()
636 pm_runtime_mark_last_busy(&pdev->dev); in omap_hdq_probe()
637 pm_runtime_put_autosuspend(&pdev->dev); in omap_hdq_probe()
643 dev_dbg(&pdev->dev, "Failure in registering w1 master\n"); in omap_hdq_probe()
650 pm_runtime_put_sync(&pdev->dev); in omap_hdq_probe()
652 pm_runtime_dont_use_autosuspend(&pdev->dev); in omap_hdq_probe()
653 pm_runtime_disable(&pdev->dev); in omap_hdq_probe()
662 active = pm_runtime_get_sync(&pdev->dev); in omap_hdq_remove()
664 pm_runtime_put_noidle(&pdev->dev); in omap_hdq_remove()
668 pm_runtime_dont_use_autosuspend(&pdev->dev); in omap_hdq_remove()
670 pm_runtime_put_sync(&pdev->dev); in omap_hdq_remove()
671 pm_runtime_disable(&pdev->dev); in omap_hdq_remove()
677 { .compatible = "ti,omap3-1w" },
678 { .compatible = "ti,am4372-hdq" },
695 MODULE_DESCRIPTION("HDQ-1W driver Library");