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1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * Copyright 1998-2008 VIA Technologies, Inc. All Rights Reserved.
4 * Copyright 2001-2008 S3 Graphics, Inc. All Rights Reserved.
22 #define VIA_LDVP0 0x00000001
23 #define VIA_LDVP1 0x00000002
24 #define VIA_DVP0 0x00000004
25 #define VIA_CRT 0x00000010
26 #define VIA_DVP1 0x00000020
27 #define VIA_LVDS1 0x00000040
28 #define VIA_LVDS2 0x00000080
31 #define VIA_STATE_ON 0
37 #define VIA_HSYNC_NEGATIVE 0x01
38 #define VIA_VSYNC_NEGATIVE 0x02
43 #define IGA2_HOR_TOTAL_SHADOW_FORMULA(x) ((x/8)-5)
44 #define IGA2_HOR_BLANK_END_SHADOW_FORMULA(x, y) (((x+y)/8)-1)
45 #define IGA2_VER_TOTAL_SHADOW_FORMULA(x) ((x)-2)
46 #define IGA2_VER_ADDR_SHADOW_FORMULA(x) ((x)-1)
47 #define IGA2_VER_BLANK_START_SHADOW_FORMULA(x) ((x)-1)
48 #define IGA2_VER_BLANK_END_SHADOW_FORMULA(x, y) ((x+y)-1)
54 /* location: {CR6D,0,7},{CR71,3,3} */
56 /* location: {CR6E,0,7} */
58 /* location: {CR6F,0,7},{CR71,0,2} */
60 /* location: {CR70,0,7},{CR71,4,6} */
62 /* location: {CR72,0,7},{CR74,4,6} */
64 /* location: {CR73,0,7},{CR74,0,2} */
66 /* location: {CR75,0,7},{CR76,4,6} */
68 /* location: {CR76,0,3} */
73 /* location: {SR1C,0,7},{SR1D,0,1} */
82 /* location: {CR65,0,7},{CR67,2,3} */
85 #define IGA2_FETCH_COUNT_PATCH_VALUE 0
91 /* location: {CR0C,0,7},{CR0D,0,7},{CR34,0,7},{CR48,0,1} */
93 /* location: {CR62,1,7},{CR63,0,7},{CR64,0,7} */
98 /* location: {SR17,0,7} */
100 /* location: {SR16,0,5},{SR16,7,7} */
102 /* location: {SR18,0,5},{SR18,7,7} */
104 /* location: {SR22,0,4}. (128/4) =64, K800 must be set zero, */
106 #define K800_IGA1_DISPLAY_QUEUE_EXPIRE_NUM 0
108 /* location: {CR68,4,7},{CR94,7,7},{CR95,7,7} */
110 /* location: {CR68,0,3},{CR95,4,6} */
112 /* location: {CR92,0,3},{CR95,0,2} */
114 /* location: {CR94,0,6} */
117 /* location: {SR17,0,7} */
119 /* location: {SR16,0,5},{SR16,7,7} */
121 /* location: {SR18,0,5},{SR18,7,7} */
123 /* location: {SR22,0,4}. (128/4) =64, K800 must be set zero, */
125 #define P880_IGA1_DISPLAY_QUEUE_EXPIRE_NUM 0
127 /* location: {CR68,4,7},{CR94,7,7},{CR95,7,7} */
129 /* location: {CR68,0,3},{CR95,4,6} */
131 /* location: {CR92,0,3},{CR95,0,2} */
133 /* location: {CR94,0,6} */
138 /* location: {SR17,0,7} */
140 /* location: {SR16,0,5},{SR16,7,7} */
142 /* location: {SR18,0,5},{SR18,7,7} */
144 /* location: {SR22,0,4}. (128/4) =64, P800 must be set zero,
146 #define CN700_IGA1_DISPLAY_QUEUE_EXPIRE_NUM 0
147 /* location: {CR68,4,7},{CR94,7,7},{CR95,7,7} */
149 /* location: {CR68,0,3},{CR95,4,6} */
151 /* location: {CR92,0,3},{CR95,0,2} */
153 /* location: {CR94,0,6} */
157 /* location: {SR17,0,7} */
159 /* location: {SR16,0,5},{SR16,7,7} */
161 /* location: {SR18,0,5},{SR18,7,7} */
163 /* location: {SR22,0,4} */
166 /* location: {CR68,4,7},{CR94,7,7},{CR95,7,7} */
168 /* location: {CR68,0,3},{CR95,4,6} */
170 /* location: {CR92,0,3},{CR95,0,2} */
172 /* location: {CR94,0,6} */
176 /* location: {SR17,0,7} */
178 /* location: {SR16,0,5},{SR16,7,7} */
180 /* location: {SR18,0,5},{SR18,7,7} */
182 /* location: {SR22,0,4}. */
185 /* location: {CR68,4,7},{CR94,7,7},{CR95,7,7} */
187 /* location: {CR68,0,3},{CR95,4,6} */
189 /* location: {CR92,0,3},{CR95,0,2} */
191 /* location: {CR94,0,6} */
195 /* location: {SR17,0,7} */
197 /* location: {SR16,0,5},{SR16,7,7} */
199 /* location: {SR18,0,5},{SR18,7,7} */
201 /* location: {SR22,0,4}. (32/4) =8 */
203 /* location: {CR68,4,7},{CR94,7,7},{CR95,7,7} */
205 /* location: {CR68,0,3},{CR95,4,6} */
207 /* location: {CR92,0,3},{CR95,0,2} */
209 /* location: {CR94,0,6} */
213 /* location: {SR17,0,7} */
215 /* location: {SR16,0,5},{SR16,7,7} */
217 /* location: {SR18,0,5},{SR18,7,7} */
219 /* location: {SR22,0,4}. */
221 /* location: {CR68,4,7},{CR94,7,7},{CR95,7,7} */
223 /* location: {CR68,0,3},{CR95,4,6} */
225 /* location: {CR92,0,3},{CR95,0,2} */
227 /* location: {CR94,0,6} */
231 /* location: {SR17,0,7} */
233 /* location: {SR16,0,5},{SR16,7,7} */
235 /* location: {SR18,0,5},{SR18,7,7} */
237 /* location: {SR22,0,4} */
239 /* location: {CR68,4,7},{CR94,7,7},{CR95,7,7} */
241 /* location: {CR68,0,3},{CR95,4,6} */
243 /* location: {CR92,0,3},{CR95,0,2} */
245 /* location: {CR94,0,6} */
280 #define IGA1_FIFO_DEPTH_SELECT_FORMULA(x) ((x/2)-1)
284 #define IGA2_FIFO_DEPTH_SELECT_FORMULA(x) (((x/2)/4)-1)
297 /* 0 us */
298 #define LCD_POWER_SEQ_TD2 0
312 /* location: {CR8B,0,7},{CR8F,0,3} */
314 /* location: {CR8C,0,7},{CR8F,4,7} */
316 /* location: {CR8D,0,7},{CR90,0,3} */
318 /* location: {CR8E,0,7},{CR90,4,7} */
326 #define CLE266_LCD_HOR_SCF_FORMULA(x, y) (((x-1)*1024)/(y-1))
328 #define CLE266_LCD_VER_SCF_FORMULA(x, y) (((x-1)*1024)/(y-1))
330 #define K800_LCD_HOR_SCF_FORMULA(x, y) (((x-1)*4096)/(y-1))
332 #define K800_LCD_VER_SCF_FORMULA(x, y) (((x-1)*2048)/(y-1))
334 /* location: {CR9F,0,1},{CR77,0,7},{CR79,4,5} */
336 /* location: {CR79,3,3},{CR78,0,7},{CR79,6,7} */
338 /* location: {CR77,0,7},{CR79,4,5} */
340 /* location: {CR78,0,7},{CR79,6,7} */
575 #define CLE266_FUNCTION3 0x3123
576 #define KM400_FUNCTION3 0x3205
577 #define CN400_FUNCTION2 0x2259
578 #define CN400_FUNCTION3 0x3259
580 #define CN700_FUNCTION2 0x2314
581 #define CN700_FUNCTION3 0x3208
583 #define CX700_FUNCTION2 0x2324
584 #define CX700_FUNCTION3 0x3324
586 #define KM800_FUNCTION3 0x3204
588 #define KM890_FUNCTION3 0x3336
590 #define P4M890_FUNCTION3 0x3327
592 #define CN750_FUNCTION3 0x3208
594 #define P4M900_FUNCTION3 0x3364
596 #define VX800_FUNCTION3 0x3353
598 #define VX855_FUNCTION3 0x3409
600 #define VX900_FUNCTION3 0x3410