242 static inline u32 tdfx_inl(struct tdfx_par *par, unsigned int reg)  in tdfx_inl()  function
256 	while ((tdfx_inl(par, STATUS) & 0x1f) < size - 1)  in banshee_make_room()
269 		if ((tdfx_inl(par, STATUS) & STATUS_BUSY) == 0)  in banshee_wait_idle()
284 	tdfx_inl(par, DACADDR);  in do_setpalentry()
344 	tdfx_outl(par, MISCINIT1, tdfx_inl(par, MISCINIT1) | 0x01);  in do_write_regs()
404 	u32 draminit0 = tdfx_inl(par, DRAMINIT0);  in do_lfb_size()
405 	u32 draminit1 = tdfx_inl(par, DRAMINIT1);  in do_lfb_size()
424 	miscinit1 = tdfx_inl(par, MISCINIT1);  in do_lfb_size()
683 	reg.vgainit1 = tdfx_inl(par, VGAINIT1) & 0x1fffff;  in tdfxfb_set_par()
705 	reg.miscinit0 = tdfx_inl(par, MISCINIT0);  in tdfxfb_set_par()
792 	u32 dacmode = tdfx_inl(par, DACMODE);  in tdfxfb_blank()
1054 	vidcfg = tdfx_inl(par, VIDPROCCFG);  in tdfxfb_cursor()
1173 	r = tdfx_inl(par, VIDSERPARPORT);  in tdfxfb_i2c_setscl()
1179 	tdfx_inl(par, VIDSERPARPORT);	/* flush posted write */  in tdfxfb_i2c_setscl()
1188 	r = tdfx_inl(par, VIDSERPARPORT);  in tdfxfb_i2c_setsda()
1194 	tdfx_inl(par, VIDSERPARPORT);	/* flush posted write */  in tdfxfb_i2c_setsda()
1206 	return (0 != (tdfx_inl(par, VIDSERPARPORT) & I2C_SCL_IN));  in tdfxfb_i2c_getscl()
1214 	return (0 != (tdfx_inl(par, VIDSERPARPORT) & I2C_SDA_IN));  in tdfxfb_i2c_getsda()
1223 	r = tdfx_inl(par, VIDSERPARPORT);  in tdfxfb_ddc_setscl()
1229 	tdfx_inl(par, VIDSERPARPORT);	/* flush posted write */  in tdfxfb_ddc_setscl()
1238 	r = tdfx_inl(par, VIDSERPARPORT);  in tdfxfb_ddc_setsda()
1244 	tdfx_inl(par, VIDSERPARPORT);	/* flush posted write */  in tdfxfb_ddc_setsda()
1252 	return (0 != (tdfx_inl(par, VIDSERPARPORT) & DDC_SCL_IN));  in tdfxfb_ddc_getscl()
1260 	return (0 != (tdfx_inl(par, VIDSERPARPORT) & DDC_SDA_IN));  in tdfxfb_ddc_getsda()