Lines Matching refs:fbi
162 static void set_mode(struct pxa168fb_info *fbi, struct fb_var_screeninfo *var, in set_mode() argument
165 struct fb_info *info = fbi->info; in set_mode()
194 struct pxa168fb_info *fbi = info->par; in pxa168fb_check_var() local
204 fbi->pix_fmt = pix_fmt; in pxa168fb_check_var()
240 static void set_clock_divider(struct pxa168fb_info *fbi, in set_clock_divider() argument
258 dev_err(fbi->dev, "Input refresh or pixclock is wrong.\n"); in set_clock_divider()
274 divider_int = clk_get_rate(fbi->clk) / needed_pixclk; in set_clock_divider()
278 dev_warn(fbi->dev, "Warning: clock source is too slow. " in set_clock_divider()
287 writel(x, fbi->reg_base + LCD_CFG_SCLK_DIV); in set_clock_divider()
290 static void set_dma_control0(struct pxa168fb_info *fbi) in set_dma_control0() argument
297 x = readl(fbi->reg_base + LCD_SPU_DMA_CTRL0); in set_dma_control0()
299 x |= fbi->active ? CFG_GRA_ENA(1) : CFG_GRA_ENA(0); in set_dma_control0()
305 if (fbi->pix_fmt == PIX_FMT_PSEUDOCOLOR) in set_dma_control0()
312 x |= (fbi->pix_fmt >> 1) << 16; in set_dma_control0()
320 x |= ((fbi->pix_fmt & 1) ^ (fbi->panel_rbswap)) << 12; in set_dma_control0()
322 writel(x, fbi->reg_base + LCD_SPU_DMA_CTRL0); in set_dma_control0()
325 static void set_dma_control1(struct pxa168fb_info *fbi, int sync) in set_dma_control1() argument
334 x = readl(fbi->reg_base + LCD_SPU_DMA_CTRL1); in set_dma_control1()
344 writel(x, fbi->reg_base + LCD_SPU_DMA_CTRL1); in set_dma_control1()
349 struct pxa168fb_info *fbi = info->par; in set_graphics_start() local
356 addr = fbi->fb_start_dma + (pixel_offset * (var->bits_per_pixel >> 3)); in set_graphics_start()
357 writel(addr, fbi->reg_base + LCD_CFG_GRA_START_ADDR0); in set_graphics_start()
362 struct pxa168fb_info *fbi = info->par; in set_dumb_panel_control() local
363 struct pxa168fb_mach_info *mi = dev_get_platdata(fbi->dev); in set_dumb_panel_control()
369 x = readl(fbi->reg_base + LCD_SPU_DUMB_CTRL) & 0x00000001; in set_dumb_panel_control()
371 x |= (fbi->is_blanked ? 0x7 : mi->dumb_mode) << 28; in set_dumb_panel_control()
382 writel(x, fbi->reg_base + LCD_SPU_DUMB_CTRL); in set_dumb_panel_control()
387 struct pxa168fb_info *fbi = info->par; in set_dumb_screen_dimensions() local
395 writel((y << 16) | x, fbi->reg_base + LCD_SPUT_V_H_TOTAL); in set_dumb_screen_dimensions()
400 struct pxa168fb_info *fbi = info->par; in pxa168fb_set_par() local
408 if (fbi->pix_fmt == PIX_FMT_PSEUDOCOLOR) in pxa168fb_set_par()
418 x = readl(fbi->reg_base + LCD_SPU_DUMB_CTRL); in pxa168fb_set_par()
419 writel(x & ~1, fbi->reg_base + LCD_SPU_DUMB_CTRL); in pxa168fb_set_par()
425 fbi->reg_base + LCD_SPU_V_H_ACTIVE); in pxa168fb_set_par()
433 set_clock_divider(fbi, &mode); in pxa168fb_set_par()
436 set_dma_control0(fbi); in pxa168fb_set_par()
437 set_dma_control1(fbi, info->var.sync); in pxa168fb_set_par()
442 x = readl(fbi->reg_base + LCD_CFG_GRA_PITCH); in pxa168fb_set_par()
444 writel(x, fbi->reg_base + LCD_CFG_GRA_PITCH); in pxa168fb_set_par()
446 fbi->reg_base + LCD_SPU_GRA_HPXL_VLN); in pxa168fb_set_par()
448 fbi->reg_base + LCD_SPU_GZM_HPXL_VLN); in pxa168fb_set_par()
457 fbi->reg_base + LCD_SPU_H_PORCH); in pxa168fb_set_par()
459 fbi->reg_base + LCD_SPU_V_PORCH); in pxa168fb_set_par()
464 x = readl(fbi->reg_base + LCD_SPU_DUMB_CTRL); in pxa168fb_set_par()
465 writel(x | 1, fbi->reg_base + LCD_SPU_DUMB_CTRL); in pxa168fb_set_par()
488 struct pxa168fb_info *fbi = info->par; in pxa168fb_setcolreg() local
499 fbi->pseudo_palette[regno] = val; in pxa168fb_setcolreg()
504 writel(val, fbi->reg_base + LCD_SPU_SRAM_WRDAT); in pxa168fb_setcolreg()
505 writel(0x8300 | regno, fbi->reg_base + LCD_SPU_SRAM_CTRL); in pxa168fb_setcolreg()
513 struct pxa168fb_info *fbi = info->par; in pxa168fb_blank() local
515 fbi->is_blanked = (blank == FB_BLANK_UNBLANK) ? 0 : 1; in pxa168fb_blank()
531 struct pxa168fb_info *fbi = dev_id; in pxa168fb_handle_irq() local
532 u32 isr = readl(fbi->reg_base + SPU_IRQ_ISR); in pxa168fb_handle_irq()
537 fbi->reg_base + SPU_IRQ_ISR); in pxa168fb_handle_irq()
559 struct pxa168fb_info *fbi = info->par; in pxa168fb_init_mode() local
579 dev_dbg(fbi->dev, "pxa168fb: find best mode: res = %dx%d\n", in pxa168fb_init_mode()
597 struct pxa168fb_info *fbi = NULL; in pxa168fb_probe() local
629 fbi = info->par; in pxa168fb_probe()
630 fbi->info = info; in pxa168fb_probe()
631 fbi->clk = clk; in pxa168fb_probe()
632 fbi->dev = info->dev = &pdev->dev; in pxa168fb_probe()
633 fbi->panel_rbswap = mi->panel_rbswap; in pxa168fb_probe()
634 fbi->is_blanked = 0; in pxa168fb_probe()
635 fbi->active = mi->active; in pxa168fb_probe()
653 info->pseudo_palette = fbi->pseudo_palette; in pxa168fb_probe()
658 fbi->reg_base = devm_ioremap(&pdev->dev, res->start, in pxa168fb_probe()
660 if (fbi->reg_base == NULL) { in pxa168fb_probe()
670 info->screen_base = dma_alloc_wc(fbi->dev, info->fix.smem_len, in pxa168fb_probe()
671 &fbi->fb_start_dma, GFP_KERNEL); in pxa168fb_probe()
677 info->fix.smem_start = (unsigned long)fbi->fb_start_dma; in pxa168fb_probe()
683 set_mode(fbi, &info->var, mi->modes, mi->pix_fmt, 1); in pxa168fb_probe()
702 clk_prepare_enable(fbi->clk); in pxa168fb_probe()
709 writel(0, fbi->reg_base + LCD_SPU_BLANKCOLOR); in pxa168fb_probe()
710 writel(mi->io_pin_allocation_mode, fbi->reg_base + SPU_IOPAD_CONTROL); in pxa168fb_probe()
711 writel(0, fbi->reg_base + LCD_CFG_GRA_START_ADDR1); in pxa168fb_probe()
712 writel(0, fbi->reg_base + LCD_SPU_GRA_OVSA_HPXL_VLN); in pxa168fb_probe()
713 writel(0, fbi->reg_base + LCD_SPU_SRAM_PARA0); in pxa168fb_probe()
715 fbi->reg_base + LCD_SPU_SRAM_PARA1); in pxa168fb_probe()
729 IRQF_SHARED, info->fix.id, fbi); in pxa168fb_probe()
739 writel(GRA_FRAME_IRQ0_ENA(0x1), fbi->reg_base + SPU_IRQ_ENA); in pxa168fb_probe()
751 platform_set_drvdata(pdev, fbi); in pxa168fb_probe()
757 clk_disable_unprepare(fbi->clk); in pxa168fb_probe()
759 dma_free_wc(fbi->dev, info->fix.smem_len, in pxa168fb_probe()
760 info->screen_base, fbi->fb_start_dma); in pxa168fb_probe()
770 struct pxa168fb_info *fbi = platform_get_drvdata(pdev); in pxa168fb_remove() local
774 if (!fbi) in pxa168fb_remove()
778 data = readl(fbi->reg_base + LCD_SPU_DMA_CTRL0); in pxa168fb_remove()
780 writel(data, fbi->reg_base + LCD_SPU_DMA_CTRL0); in pxa168fb_remove()
782 info = fbi->info; in pxa168fb_remove()
786 writel(GRA_FRAME_IRQ0_ENA(0x0), fbi->reg_base + SPU_IRQ_ENA); in pxa168fb_remove()
791 dma_free_wc(fbi->dev, info->fix.smem_len, in pxa168fb_remove()
794 clk_disable_unprepare(fbi->clk); in pxa168fb_remove()