Lines Matching +full:clkout +full:- +full:fmt
1 // SPDX-License-Identifier: GPL-2.0-only
407 return to_platform_device(dssdev->dev); in dsi_get_dsidev_from_dssdev()
428 return out ? to_platform_device(out->dev) : NULL; in dsi_get_dsidev_from_id()
438 case DSI_PROTO: base = dsi->proto_base; break; in dsi_write_reg()
439 case DSI_PHY: base = dsi->phy_base; break; in dsi_write_reg()
440 case DSI_PLL: base = dsi->pll_base; break; in dsi_write_reg()
454 case DSI_PROTO: base = dsi->proto_base; break; in dsi_read_reg()
455 case DSI_PHY: base = dsi->phy_base; break; in dsi_read_reg()
456 case DSI_PLL: base = dsi->pll_base; break; in dsi_read_reg()
468 down(&dsi->bus_lock); in dsi_bus_lock()
476 up(&dsi->bus_lock); in dsi_bus_unlock()
483 return dsi->bus_lock.count == 0; in dsi_bus_is_locked()
500 while (t-- > 0) { in wait_for_bit_change()
519 u8 dsi_get_pixel_size(enum omap_dss_dsi_pixel_format fmt) in dsi_get_pixel_size() argument
521 switch (fmt) { in dsi_get_pixel_size()
539 dsi->perf_setup_time = ktime_get(); in dsi_perf_mark_setup()
545 dsi->perf_start_time = ktime_get(); in dsi_perf_mark_start()
560 setup_time = ktime_sub(dsi->perf_start_time, dsi->perf_setup_time); in dsi_perf_show()
565 trans_time = ktime_sub(t, dsi->perf_start_time); in dsi_perf_show()
572 total_bytes = dsi->update_bytes; in dsi_perf_show()
697 spin_lock(&dsi->irq_stats_lock); in dsi_collect_irq_stats()
699 dsi->irq_stats.irq_count++; in dsi_collect_irq_stats()
700 dss_collect_irq_stats(irqstatus, dsi->irq_stats.dsi_irqs); in dsi_collect_irq_stats()
703 dss_collect_irq_stats(vcstatus[i], dsi->irq_stats.vc_irqs[i]); in dsi_collect_irq_stats()
705 dss_collect_irq_stats(ciostatus, dsi->irq_stats.cio_irqs); in dsi_collect_irq_stats()
707 spin_unlock(&dsi->irq_stats_lock); in dsi_collect_irq_stats()
724 spin_lock(&dsi->errors_lock); in dsi_handle_irq_errors()
725 dsi->errors |= irqstatus & DSI_IRQ_ERROR_MASK; in dsi_handle_irq_errors()
726 spin_unlock(&dsi->errors_lock); in dsi_handle_irq_errors()
757 if (isr_data->isr && isr_data->mask & irqstatus) in dsi_call_isrs()
758 isr_data->isr(isr_data->arg, irqstatus); in dsi_call_isrs()
767 dsi_call_isrs(isr_tables->isr_table, in dsi_handle_isrs()
768 ARRAY_SIZE(isr_tables->isr_table), in dsi_handle_isrs()
774 dsi_call_isrs(isr_tables->isr_table_vc[i], in dsi_handle_isrs()
775 ARRAY_SIZE(isr_tables->isr_table_vc[i]), in dsi_handle_isrs()
780 dsi_call_isrs(isr_tables->isr_table_cio, in dsi_handle_isrs()
781 ARRAY_SIZE(isr_tables->isr_table_cio), in dsi_handle_isrs()
795 if (!dsi->is_enabled) in omap_dsi_irq_handler()
798 spin_lock(&dsi->irq_lock); in omap_dsi_irq_handler()
804 spin_unlock(&dsi->irq_lock); in omap_dsi_irq_handler()
837 del_timer(&dsi->te_timer); in omap_dsi_irq_handler()
842 memcpy(&dsi->isr_tables_copy, &dsi->isr_tables, in omap_dsi_irq_handler()
843 sizeof(dsi->isr_tables)); in omap_dsi_irq_handler()
845 spin_unlock(&dsi->irq_lock); in omap_dsi_irq_handler()
847 dsi_handle_isrs(&dsi->isr_tables_copy, irqstatus, vcstatus, ciostatus); in omap_dsi_irq_handler()
856 /* dsi->irq_lock has to be locked by the caller */
873 if (isr_data->isr == NULL) in _omap_dsi_configure_irqs()
876 mask |= isr_data->mask; in _omap_dsi_configure_irqs()
889 /* dsi->irq_lock has to be locked by the caller */
897 _omap_dsi_configure_irqs(dsidev, dsi->isr_tables.isr_table, in _omap_dsi_set_irqs()
898 ARRAY_SIZE(dsi->isr_tables.isr_table), mask, in _omap_dsi_set_irqs()
902 /* dsi->irq_lock has to be locked by the caller */
907 _omap_dsi_configure_irqs(dsidev, dsi->isr_tables.isr_table_vc[vc], in _omap_dsi_set_irqs_vc()
908 ARRAY_SIZE(dsi->isr_tables.isr_table_vc[vc]), in _omap_dsi_set_irqs_vc()
913 /* dsi->irq_lock has to be locked by the caller */
918 _omap_dsi_configure_irqs(dsidev, dsi->isr_tables.isr_table_cio, in _omap_dsi_set_irqs_cio()
919 ARRAY_SIZE(dsi->isr_tables.isr_table_cio), in _omap_dsi_set_irqs_cio()
930 spin_lock_irqsave(&dsi->irq_lock, flags); in _dsi_initialize_irq()
932 memset(&dsi->isr_tables, 0, sizeof(dsi->isr_tables)); in _dsi_initialize_irq()
939 spin_unlock_irqrestore(&dsi->irq_lock, flags); in _dsi_initialize_irq()
952 free_idx = -1; in _dsi_register_isr()
956 if (isr_data->isr == isr && isr_data->arg == arg && in _dsi_register_isr()
957 isr_data->mask == mask) { in _dsi_register_isr()
958 return -EINVAL; in _dsi_register_isr()
961 if (isr_data->isr == NULL && free_idx == -1) in _dsi_register_isr()
965 if (free_idx == -1) in _dsi_register_isr()
966 return -EBUSY; in _dsi_register_isr()
969 isr_data->isr = isr; in _dsi_register_isr()
970 isr_data->arg = arg; in _dsi_register_isr()
971 isr_data->mask = mask; in _dsi_register_isr()
984 if (isr_data->isr != isr || isr_data->arg != arg || in _dsi_unregister_isr()
985 isr_data->mask != mask) in _dsi_unregister_isr()
988 isr_data->isr = NULL; in _dsi_unregister_isr()
989 isr_data->arg = NULL; in _dsi_unregister_isr()
990 isr_data->mask = 0; in _dsi_unregister_isr()
995 return -EINVAL; in _dsi_unregister_isr()
1005 spin_lock_irqsave(&dsi->irq_lock, flags); in dsi_register_isr()
1007 r = _dsi_register_isr(isr, arg, mask, dsi->isr_tables.isr_table, in dsi_register_isr()
1008 ARRAY_SIZE(dsi->isr_tables.isr_table)); in dsi_register_isr()
1013 spin_unlock_irqrestore(&dsi->irq_lock, flags); in dsi_register_isr()
1025 spin_lock_irqsave(&dsi->irq_lock, flags); in dsi_unregister_isr()
1027 r = _dsi_unregister_isr(isr, arg, mask, dsi->isr_tables.isr_table, in dsi_unregister_isr()
1028 ARRAY_SIZE(dsi->isr_tables.isr_table)); in dsi_unregister_isr()
1033 spin_unlock_irqrestore(&dsi->irq_lock, flags); in dsi_unregister_isr()
1045 spin_lock_irqsave(&dsi->irq_lock, flags); in dsi_register_isr_vc()
1048 dsi->isr_tables.isr_table_vc[channel], in dsi_register_isr_vc()
1049 ARRAY_SIZE(dsi->isr_tables.isr_table_vc[channel])); in dsi_register_isr_vc()
1054 spin_unlock_irqrestore(&dsi->irq_lock, flags); in dsi_register_isr_vc()
1066 spin_lock_irqsave(&dsi->irq_lock, flags); in dsi_unregister_isr_vc()
1069 dsi->isr_tables.isr_table_vc[channel], in dsi_unregister_isr_vc()
1070 ARRAY_SIZE(dsi->isr_tables.isr_table_vc[channel])); in dsi_unregister_isr_vc()
1075 spin_unlock_irqrestore(&dsi->irq_lock, flags); in dsi_unregister_isr_vc()
1087 spin_lock_irqsave(&dsi->irq_lock, flags); in dsi_register_isr_cio()
1089 r = _dsi_register_isr(isr, arg, mask, dsi->isr_tables.isr_table_cio, in dsi_register_isr_cio()
1090 ARRAY_SIZE(dsi->isr_tables.isr_table_cio)); in dsi_register_isr_cio()
1095 spin_unlock_irqrestore(&dsi->irq_lock, flags); in dsi_register_isr_cio()
1107 spin_lock_irqsave(&dsi->irq_lock, flags); in dsi_unregister_isr_cio()
1109 r = _dsi_unregister_isr(isr, arg, mask, dsi->isr_tables.isr_table_cio, in dsi_unregister_isr_cio()
1110 ARRAY_SIZE(dsi->isr_tables.isr_table_cio)); in dsi_unregister_isr_cio()
1115 spin_unlock_irqrestore(&dsi->irq_lock, flags); in dsi_unregister_isr_cio()
1125 spin_lock_irqsave(&dsi->errors_lock, flags); in dsi_get_errors()
1126 e = dsi->errors; in dsi_get_errors()
1127 dsi->errors = 0; in dsi_get_errors()
1128 spin_unlock_irqrestore(&dsi->errors_lock, flags); in dsi_get_errors()
1139 r = pm_runtime_resume_and_get(&dsi->pdev->dev); in dsi_runtime_get()
1152 r = pm_runtime_put_sync(&dsi->pdev->dev); in dsi_runtime_put()
1153 WARN_ON(r < 0 && r != -ENOSYS); in dsi_runtime_put()
1161 if (dsi->vdds_dsi_reg != NULL) in dsi_regulator_init()
1164 vdds_dsi = devm_regulator_get(&dsi->pdev->dev, "vdd"); in dsi_regulator_init()
1167 if (PTR_ERR(vdds_dsi) != -EPROBE_DEFER) in dsi_regulator_init()
1172 dsi->vdds_dsi_reg = vdds_dsi; in dsi_regulator_init()
1221 return -EIO; in dsi_if_enable()
1231 return dsi->pll.cinfo.clkout[HSDIV_DISPC]; in dsi_get_pll_hsdiv_dispc_rate()
1238 return dsi->pll.cinfo.clkout[HSDIV_DSI]; in dsi_get_pll_hsdiv_dsi_rate()
1245 return dsi->pll.cinfo.clkdco / 16; in dsi_get_txbyteclkhs()
1253 if (dss_get_dsi_clk_source(dsi->module_id) == OMAP_DSS_CLK_SRC_FCK) { in dsi_fclk_rate()
1255 r = clk_get_rate(dsi->dss_clk); in dsi_fclk_rate()
1275 return -EINVAL; in dsi_lp_clock_calc()
1277 lp_cinfo->lp_clk_div = lp_clk_div; in dsi_lp_clock_calc()
1278 lp_cinfo->lp_clk = lp_clk; in dsi_lp_clock_calc()
1292 lp_clk_div = dsi->user_lp_cinfo.lp_clk_div; in dsi_set_lp_clk_divisor()
1295 return -EINVAL; in dsi_set_lp_clk_divisor()
1302 dsi->current_lp_cinfo.lp_clk = lp_clk; in dsi_set_lp_clk_divisor()
1303 dsi->current_lp_cinfo.lp_clk_div = lp_clk_div; in dsi_set_lp_clk_divisor()
1318 if (dsi->scp_clk_refcount++ == 0) in dsi_enable_scp_clk()
1326 WARN_ON(dsi->scp_clk_refcount == 0); in dsi_disable_scp_clk()
1327 if (--dsi->scp_clk_refcount == 0) in dsi_disable_scp_clk()
1343 /* DSI-PLL power command 0x3 is not working */ in dsi_pll_power()
1356 return -ENODEV; in dsi_pll_power()
1371 cinfo->mX[HSDIV_DSI] = DIV_ROUND_UP(cinfo->clkdco, max_dsi_fck); in dsi_pll_calc_dsi_fck()
1372 cinfo->clkout[HSDIV_DSI] = cinfo->clkdco / cinfo->mX[HSDIV_DSI]; in dsi_pll_calc_dsi_fck()
1378 struct platform_device *dsidev = dsi->pdev; in dsi_pll_enable()
1396 if (!dsi->vdds_dsi_enabled) { in dsi_pll_enable()
1397 r = regulator_enable(dsi->vdds_dsi_reg); in dsi_pll_enable()
1400 dsi->vdds_dsi_enabled = true; in dsi_pll_enable()
1408 r = -ENODEV; in dsi_pll_enable()
1426 if (dsi->vdds_dsi_enabled) { in dsi_pll_enable()
1427 regulator_disable(dsi->vdds_dsi_reg); in dsi_pll_enable()
1428 dsi->vdds_dsi_enabled = false; in dsi_pll_enable()
1442 WARN_ON(!dsi->vdds_dsi_enabled); in dsi_pll_uninit()
1443 regulator_disable(dsi->vdds_dsi_reg); in dsi_pll_uninit()
1444 dsi->vdds_dsi_enabled = false; in dsi_pll_uninit()
1456 struct platform_device *dsidev = dsi->pdev; in dsi_pll_disable()
1465 struct dss_pll_clock_info *cinfo = &dsi->pll.cinfo; in dsi_dump_dsidev_clocks()
1467 int dsi_module = dsi->module_id; in dsi_dump_dsidev_clocks()
1468 struct dss_pll *pll = &dsi->pll; in dsi_dump_dsidev_clocks()
1476 seq_printf(s, "- DSI%d PLL -\n", dsi_module + 1); in dsi_dump_dsidev_clocks()
1478 seq_printf(s, "dsi pll clkin\t%lu\n", clk_get_rate(pll->clkin)); in dsi_dump_dsidev_clocks()
1480 seq_printf(s, "Fint\t\t%-16lun %u\n", cinfo->fint, cinfo->n); in dsi_dump_dsidev_clocks()
1482 seq_printf(s, "CLKIN4DDR\t%-16lum %u\n", in dsi_dump_dsidev_clocks()
1483 cinfo->clkdco, cinfo->m); in dsi_dump_dsidev_clocks()
1485 seq_printf(s, "DSI_PLL_HSDIV_DISPC (%s)\t%-16lum_dispc %u\t(%s)\n", in dsi_dump_dsidev_clocks()
1489 cinfo->clkout[HSDIV_DISPC], in dsi_dump_dsidev_clocks()
1490 cinfo->mX[HSDIV_DISPC], in dsi_dump_dsidev_clocks()
1494 seq_printf(s, "DSI_PLL_HSDIV_DSI (%s)\t%-16lum_dsi %u\t(%s)\n", in dsi_dump_dsidev_clocks()
1498 cinfo->clkout[HSDIV_DSI], in dsi_dump_dsidev_clocks()
1499 cinfo->mX[HSDIV_DSI], in dsi_dump_dsidev_clocks()
1503 seq_printf(s, "- DSI%d -\n", dsi_module + 1); in dsi_dump_dsidev_clocks()
1512 cinfo->clkdco / 4); in dsi_dump_dsidev_clocks()
1516 seq_printf(s, "LP_CLK\t\t%lu\n", dsi->current_lp_cinfo.lp_clk); in dsi_dump_dsidev_clocks()
1541 spin_lock_irqsave(&dsi->irq_stats_lock, flags); in dsi_dump_dsidev_irqs()
1543 stats = dsi->irq_stats; in dsi_dump_dsidev_irqs()
1544 memset(&dsi->irq_stats, 0, sizeof(dsi->irq_stats)); in dsi_dump_dsidev_irqs()
1545 dsi->irq_stats.last_reset = jiffies; in dsi_dump_dsidev_irqs()
1547 spin_unlock_irqrestore(&dsi->irq_stats_lock, flags); in dsi_dump_dsidev_irqs()
1550 jiffies_to_msecs(jiffies - stats.last_reset)); in dsi_dump_dsidev_irqs()
1554 seq_printf(s, "%-20s %10d\n", #x, stats.dsi_irqs[ffs(DSI_IRQ_##x)-1]) in dsi_dump_dsidev_irqs()
1556 seq_printf(s, "-- DSI%d interrupts --\n", dsi->module_id + 1); in dsi_dump_dsidev_irqs()
1577 seq_printf(s, "%-20s %10d %10d %10d %10d\n", #x, \ in dsi_dump_dsidev_irqs()
1578 stats.vc_irqs[0][ffs(DSI_VC_IRQ_##x)-1], \ in dsi_dump_dsidev_irqs()
1579 stats.vc_irqs[1][ffs(DSI_VC_IRQ_##x)-1], \ in dsi_dump_dsidev_irqs()
1580 stats.vc_irqs[2][ffs(DSI_VC_IRQ_##x)-1], \ in dsi_dump_dsidev_irqs()
1581 stats.vc_irqs[3][ffs(DSI_VC_IRQ_##x)-1]); in dsi_dump_dsidev_irqs()
1583 seq_printf(s, "-- VC interrupts --\n"); in dsi_dump_dsidev_irqs()
1596 seq_printf(s, "%-20s %10d\n", #x, \ in dsi_dump_dsidev_irqs()
1597 stats.cio_irqs[ffs(DSI_CIO_IRQ_##x)-1]); in dsi_dump_dsidev_irqs()
1599 seq_printf(s, "-- CIO interrupts --\n"); in dsi_dump_dsidev_irqs()
1641 #define DUMPREG(r) seq_printf(s, "%-35s %08x\n", #r, dsi_read_reg(dsidev, r)) in dsi_dump_dsidev_regs()
1756 return -ENODEV; in dsi_cio_power()
1814 for (i = 0; i < dsi->num_lanes_used; ++i) { in dsi_set_lane_config()
1819 for (t = 0; t < dsi->num_lanes_supported; ++t) in dsi_set_lane_config()
1820 if (dsi->lanes[t].function == functions[i]) in dsi_set_lane_config()
1823 if (t == dsi->num_lanes_supported) in dsi_set_lane_config()
1824 return -EINVAL; in dsi_set_lane_config()
1827 polarity = dsi->lanes[t].polarity; in dsi_set_lane_config()
1834 for (; i < dsi->num_lanes_supported; ++i) { in dsi_set_lane_config()
1851 unsigned long ddr_clk = dsi->pll.cinfo.clkdco / 4; in ns2ddr()
1859 unsigned long ddr_clk = dsi->pll.cinfo.clkdco / 4; in ddr2ns()
1895 /* min tclk-prepare + tclk-zero = 300ns */ in dsi_cio_timings()
1947 u8 lptxscp_start = dsi->num_lanes_supported == 3 ? 22 : 26; in dsi_cio_enable_lane_override()
1951 for (i = 0; i < dsi->num_lanes_supported; ++i) { in dsi_cio_enable_lane_override()
1952 unsigned p = dsi->lanes[i].polarity; in dsi_cio_enable_lane_override()
2004 for (i = 0; i < dsi->num_lanes_supported; ++i) in dsi_cio_wait_tx_clk_esc_reset()
2005 in_use[i] = dsi->lanes[i].function != DSI_LANE_UNUSED; in dsi_cio_wait_tx_clk_esc_reset()
2015 for (i = 0; i < dsi->num_lanes_supported; ++i) { in dsi_cio_wait_tx_clk_esc_reset()
2020 if (ok == dsi->num_lanes_supported) in dsi_cio_wait_tx_clk_esc_reset()
2023 if (--t == 0) { in dsi_cio_wait_tx_clk_esc_reset()
2024 for (i = 0; i < dsi->num_lanes_supported; ++i) { in dsi_cio_wait_tx_clk_esc_reset()
2031 return -EIO; in dsi_cio_wait_tx_clk_esc_reset()
2045 for (i = 0; i < dsi->num_lanes_supported; ++i) { in dsi_get_lane_mask()
2046 if (dsi->lanes[i].function != DSI_LANE_UNUSED) in dsi_get_lane_mask()
2061 r = dss_dsi_enable_pads(dsi->module_id, dsi_get_lane_mask(dsidev)); in dsi_cio_init()
2074 r = -EIO; in dsi_cio_init()
2090 if (dsi->ulps_enabled) { in dsi_cio_init()
2096 /* ULPS is exited by Mark-1 state for 1ms, followed by in dsi_cio_init()
2107 for (i = 0; i < dsi->num_lanes_supported; ++i) { in dsi_cio_init()
2108 if (dsi->lanes[i].function == DSI_LANE_UNUSED) in dsi_cio_init()
2122 r = -ENODEV; in dsi_cio_init()
2134 if (dsi->ulps_enabled) { in dsi_cio_init()
2135 /* Keep Mark-1 state for 1ms (as per DSI spec) */ in dsi_cio_init()
2140 /* Disable the override. The lanes should be set to Mark-11 in dsi_cio_init()
2150 if (dsi->mode == OMAP_DSS_DSI_VIDEO_MODE) { in dsi_cio_init()
2153 dsi->vm_timings.ddr_clk_always_on, 13, 13); in dsi_cio_init()
2156 dsi->ulps_enabled = false; in dsi_cio_init()
2167 if (dsi->ulps_enabled) in dsi_cio_init()
2171 dss_dsi_disable_pads(dsi->module_id, dsi_get_lane_mask(dsidev)); in dsi_cio_init()
2184 dss_dsi_disable_pads(dsi->module_id, dsi_get_lane_mask(dsidev)); in dsi_cio_uninit()
2196 dsi->vc[0].tx_fifo_size = size1; in dsi_config_tx_fifo()
2197 dsi->vc[1].tx_fifo_size = size2; in dsi_config_tx_fifo()
2198 dsi->vc[2].tx_fifo_size = size3; in dsi_config_tx_fifo()
2199 dsi->vc[3].tx_fifo_size = size4; in dsi_config_tx_fifo()
2203 int size = dsi->vc[i].tx_fifo_size; in dsi_config_tx_fifo()
2229 dsi->vc[0].rx_fifo_size = size1; in dsi_config_rx_fifo()
2230 dsi->vc[1].rx_fifo_size = size2; in dsi_config_rx_fifo()
2231 dsi->vc[2].rx_fifo_size = size3; in dsi_config_rx_fifo()
2232 dsi->vc[3].rx_fifo_size = size4; in dsi_config_rx_fifo()
2236 int size = dsi->vc[i].rx_fifo_size; in dsi_config_rx_fifo()
2263 return -EIO; in dsi_force_tx_stop_mode_io()
2278 struct dsi_data *dsi = dsi_get_dsidrv_data(vp_data->dsidev); in dsi_packet_sent_handler_vp()
2279 const int channel = dsi->update_channel; in dsi_packet_sent_handler_vp()
2280 u8 bit = dsi->te_enabled ? 30 : 31; in dsi_packet_sent_handler_vp()
2282 if (REG_GET(vp_data->dsidev, DSI_VC_TE(channel), bit, bit) == 0) in dsi_packet_sent_handler_vp()
2283 complete(vp_data->completion); in dsi_packet_sent_handler_vp()
2297 bit = dsi->te_enabled ? 30 : 31; in dsi_sync_vc_vp()
2309 r = -EIO; in dsi_sync_vc_vp()
2329 struct dsi_data *dsi = dsi_get_dsidrv_data(l4_data->dsidev); in dsi_packet_sent_handler_l4()
2330 const int channel = dsi->update_channel; in dsi_packet_sent_handler_l4()
2332 if (REG_GET(l4_data->dsidev, DSI_VC_CTRL(channel), 5, 5) == 0) in dsi_packet_sent_handler_l4()
2333 complete(l4_data->completion); in dsi_packet_sent_handler_l4()
2355 r = -EIO; in dsi_sync_vc_l4()
2380 switch (dsi->vc[channel].source) { in dsi_sync_vc()
2387 return -EINVAL; in dsi_sync_vc()
2404 return -EIO; in dsi_vc_enable()
2438 dsi->vc[channel].source = DSI_VC_SOURCE_L4; in dsi_vc_initial_config()
2446 if (dsi->vc[channel].source == source) in dsi_vc_config_source()
2458 return -EIO; in dsi_vc_config_source()
2472 dsi->vc[channel].source = source; in dsi_vc_config_source()
2498 if (dsi->vm_timings.ddr_clk_always_on && enable) in dsi_vc_enable_hs()
2535 DSSERR("\t\tECC Error, single-bit (corrected)\n"); in dsi_show_rx_ack_with_err()
2537 DSSERR("\t\tECC Error, multi-bit (not corrected)\n"); in dsi_show_rx_ack_with_err()
2586 if (dsi->debug_write || dsi->debug_read) in dsi_vc_send_bta()
2629 r = -EIO; in dsi_vc_send_bta_sync()
2636 r = -EIO; in dsi_vc_send_bta_sync()
2658 data_id = data_type | dsi->vc[channel].vc_id << 6; in dsi_vc_write_long_header()
2689 if (dsi->debug_write) in dsi_vc_send_long()
2693 if (dsi->vc[channel].tx_fifo_size * 32 * 4 < len + 4) { in dsi_vc_send_long()
2695 return -EINVAL; in dsi_vc_send_long()
2704 if (dsi->debug_write) in dsi_vc_send_long()
2719 if (dsi->debug_write) in dsi_vc_send_long()
2752 if (dsi->debug_write) in dsi_vc_send_short()
2761 return -EINVAL; in dsi_vc_send_short()
2764 data_id = data_type | dsi->vc[channel].vc_id << 6; in dsi_vc_send_short()
2847 r = -EIO; in dsi_vc_write_common()
2878 if (dsi->debug_read) in dsi_vc_dcs_send_read_request()
2900 if (dsi->debug_read) in dsi_vc_generic_send_read_request()
2915 return -EINVAL; in dsi_vc_generic_send_read_request()
2939 r = -EIO; in dsi_vc_read_rx_fifo()
2944 if (dsi->debug_read) in dsi_vc_read_rx_fifo()
2950 r = -EIO; in dsi_vc_read_rx_fifo()
2957 if (dsi->debug_read) in dsi_vc_read_rx_fifo()
2963 r = -EIO; in dsi_vc_read_rx_fifo()
2974 if (dsi->debug_read) in dsi_vc_read_rx_fifo()
2980 r = -EIO; in dsi_vc_read_rx_fifo()
2993 if (dsi->debug_read) in dsi_vc_read_rx_fifo()
2999 r = -EIO; in dsi_vc_read_rx_fifo()
3008 if (dsi->debug_read) in dsi_vc_read_rx_fifo()
3026 r = -EIO; in dsi_vc_read_rx_fifo()
3057 r = -EIO; in dsi_vc_dcs_read()
3087 r = -EIO; in dsi_vc_generic_read()
3114 WARN_ON(dsi->ulps_enabled); in dsi_enter_ulps()
3116 if (dsi->ulps_enabled) in dsi_enter_ulps()
3140 return -EIO; in dsi_enter_ulps()
3145 return -EIO; in dsi_enter_ulps()
3155 for (i = 0; i < dsi->num_lanes_supported; ++i) { in dsi_enter_ulps()
3156 if (dsi->lanes[i].function == DSI_LANE_UNUSED) in dsi_enter_ulps()
3170 r = -EIO; in dsi_enter_ulps()
3187 dsi->ulps_enabled = true; in dsi_enter_ulps()
3310 if (dsi->mode == OMAP_DSS_DSI_VIDEO_MODE) { in dsi_config_vp_num_line_buffers()
3311 int bpp = dsi_get_pixel_size(dsi->pix_fmt); in dsi_config_vp_num_line_buffers()
3312 struct omap_video_timings *timings = &dsi->timings; in dsi_config_vp_num_line_buffers()
3317 if (dsi->line_buffer_size <= timings->x_res * bpp / 8) in dsi_config_vp_num_line_buffers()
3336 if (dsi->vm_timings.trans_mode == OMAP_DSS_DSI_PULSE_MODE) in dsi_config_vp_sync_events()
3355 int blanking_mode = dsi->vm_timings.blanking_mode; in dsi_config_blanking_modes()
3356 int hfp_blanking_mode = dsi->vm_timings.hfp_blanking_mode; in dsi_config_blanking_modes()
3357 int hbp_blanking_mode = dsi->vm_timings.hbp_blanking_mode; in dsi_config_blanking_modes()
3358 int hsa_blanking_mode = dsi->vm_timings.hsa_blanking_mode; in dsi_config_blanking_modes()
3402 return blank > transition ? blank - transition : 0; in dsi_compute_interleave_hs()
3425 tlp_avail = thsbyte_clk * (blank - trans_lp); in dsi_compute_interleave_lp()
3429 lp_inter = ((tlp_avail - 8 * thsbyte_clk - 5 * tdsi_fclk) / ttxclkesc - in dsi_compute_interleave_lp()
3444 struct omap_video_timings *timings = &dsi->timings; in dsi_config_cmd_mode_interleaving()
3445 int bpp = dsi_get_pixel_size(dsi->pix_fmt); in dsi_config_cmd_mode_interleaving()
3446 int ndl = dsi->num_lanes_used - 1; in dsi_config_cmd_mode_interleaving()
3447 int dsi_fclk_hsdiv = dsi->user_dsi_cinfo.mX[HSDIV_DSI] + 1; in dsi_config_cmd_mode_interleaving()
3485 width_bytes = DIV_ROUND_UP(timings->x_res * bpp, 8); in dsi_config_cmd_mode_interleaving()
3574 switch (dsi_get_pixel_size(dsi->pix_fmt)) { in dsi_proto_config()
3586 return -EINVAL; in dsi_proto_config()
3608 if (dsi->mode == OMAP_DSS_DSI_VIDEO_MODE) { in dsi_proto_config()
3632 int ndl = dsi->num_lanes_used - 1; in dsi_proto_timings()
3638 ths_zero = ths_prepare_ths_zero - ths_prepare; in dsi_proto_timings()
3685 if (dsi->mode == OMAP_DSS_DSI_VIDEO_MODE) { in dsi_proto_timings()
3687 int hsa = dsi->vm_timings.hsa; in dsi_proto_timings()
3688 int hfp = dsi->vm_timings.hfp; in dsi_proto_timings()
3689 int hbp = dsi->vm_timings.hbp; in dsi_proto_timings()
3690 int vsa = dsi->vm_timings.vsa; in dsi_proto_timings()
3691 int vfp = dsi->vm_timings.vfp; in dsi_proto_timings()
3692 int vbp = dsi->vm_timings.vbp; in dsi_proto_timings()
3693 int window_sync = dsi->vm_timings.window_sync; in dsi_proto_timings()
3695 struct omap_video_timings *timings = &dsi->timings; in dsi_proto_timings()
3696 int bpp = dsi_get_pixel_size(dsi->pix_fmt); in dsi_proto_timings()
3699 hsync_end = dsi->vm_timings.trans_mode == OMAP_DSS_DSI_PULSE_MODE; in dsi_proto_timings()
3703 width_bytes = DIV_ROUND_UP(timings->x_res * bpp, 8); in dsi_proto_timings()
3712 vsa, timings->y_res); in dsi_proto_timings()
3728 r = FLD_MOD(r, timings->y_res, 14, 0); /* VACT */ in dsi_proto_timings()
3753 num_pins = pin_cfg->num_pins; in dsi_configure_pins()
3754 pins = pin_cfg->pins; in dsi_configure_pins()
3756 if (num_pins < 4 || num_pins > dsi->num_lanes_supported * 2 in dsi_configure_pins()
3758 return -EINVAL; in dsi_configure_pins()
3772 if (dx < 0 || dx >= dsi->num_lanes_supported * 2) in dsi_configure_pins()
3773 return -EINVAL; in dsi_configure_pins()
3775 if (dy < 0 || dy >= dsi->num_lanes_supported * 2) in dsi_configure_pins()
3776 return -EINVAL; in dsi_configure_pins()
3779 if (dy != dx - 1) in dsi_configure_pins()
3780 return -EINVAL; in dsi_configure_pins()
3784 return -EINVAL; in dsi_configure_pins()
3795 memcpy(dsi->lanes, lanes, sizeof(dsi->lanes)); in dsi_configure_pins()
3796 dsi->num_lanes_used = num_lanes; in dsi_configure_pins()
3805 struct omap_overlay_manager *mgr = dsi->output.manager; in dsi_enable_video_output()
3806 int bpp = dsi_get_pixel_size(dsi->pix_fmt); in dsi_enable_video_output()
3807 struct omap_dss_device *out = &dsi->output; in dsi_enable_video_output()
3812 if (out->manager == NULL) { in dsi_enable_video_output()
3814 return -ENODEV; in dsi_enable_video_output()
3821 if (dsi->mode == OMAP_DSS_DSI_VIDEO_MODE) { in dsi_enable_video_output()
3822 switch (dsi->pix_fmt) { in dsi_enable_video_output()
3836 r = -EINVAL; in dsi_enable_video_output()
3846 word_count = DIV_ROUND_UP(dsi->timings.x_res * bpp, 8); in dsi_enable_video_output()
3862 if (dsi->mode == OMAP_DSS_DSI_VIDEO_MODE) { in dsi_enable_video_output()
3876 struct omap_overlay_manager *mgr = dsi->output.manager; in dsi_disable_video_output()
3878 if (dsi->mode == OMAP_DSS_DSI_VIDEO_MODE) { in dsi_disable_video_output()
3897 struct omap_overlay_manager *mgr = dsi->output.manager; in dsi_update_screen_dispc()
3906 const unsigned channel = dsi->update_channel; in dsi_update_screen_dispc()
3907 const unsigned line_buf_size = dsi->line_buffer_size; in dsi_update_screen_dispc()
3908 u16 w = dsi->timings.x_res; in dsi_update_screen_dispc()
3909 u16 h = dsi->timings.y_res; in dsi_update_screen_dispc()
3915 bytespp = dsi_get_pixel_size(dsi->pix_fmt) / 8; in dsi_update_screen_dispc()
3939 if (dsi->te_enabled) in dsi_update_screen_dispc()
3945 /* We put SIDLEMODE to no-idle for the duration of the transfer, in dsi_update_screen_dispc()
3955 r = schedule_delayed_work(&dsi->framedone_timeout_work, in dsi_update_screen_dispc()
3959 dss_mgr_set_timings(mgr, &dsi->timings); in dsi_update_screen_dispc()
3963 if (dsi->te_enabled) { in dsi_update_screen_dispc()
3971 mod_timer(&dsi->te_timer, jiffies + msecs_to_jiffies(250)); in dsi_update_screen_dispc()
3987 /* SIDLEMODE back to smart-idle */ in dsi_handle_framedone()
3990 if (dsi->te_enabled) { in dsi_handle_framedone()
3995 dsi->framedone_callback(error, dsi->framedone_data); in dsi_handle_framedone()
4014 dsi_handle_framedone(dsi->pdev, -ETIMEDOUT); in dsi_framedone_timeout_work_callback()
4027 cancel_delayed_work(&dsi->framedone_timeout_work); in dsi_framedone_irq_callback()
4040 dsi->update_channel = channel; in dsi_update()
4042 dsi->framedone_callback = callback; in dsi_update()
4043 dsi->framedone_data = data; in dsi_update()
4046 dsi->update_bytes = dsi->timings.x_res * dsi->timings.y_res * in dsi_update()
4047 dsi_get_pixel_size(dsi->pix_fmt) / 8; in dsi_update()
4065 dispc_cinfo.lck_div = dsi->user_dispc_cinfo.lck_div; in dsi_configure_dispc_clocks()
4066 dispc_cinfo.pck_div = dsi->user_dispc_cinfo.pck_div; in dsi_configure_dispc_clocks()
4074 dsi->mgr_config.clock_info = dispc_cinfo; in dsi_configure_dispc_clocks()
4085 dss_select_lcd_clk_source(mgr->id, dsi->module_id == 0 ? in dsi_display_init_dispc()
4089 if (dsi->mode == OMAP_DSS_DSI_CMD_MODE) { in dsi_display_init_dispc()
4097 dsi->mgr_config.stallmode = true; in dsi_display_init_dispc()
4098 dsi->mgr_config.fifohandcheck = true; in dsi_display_init_dispc()
4100 dsi->mgr_config.stallmode = false; in dsi_display_init_dispc()
4101 dsi->mgr_config.fifohandcheck = false; in dsi_display_init_dispc()
4108 dsi->timings.interlace = false; in dsi_display_init_dispc()
4109 dsi->timings.hsync_level = OMAPDSS_SIG_ACTIVE_HIGH; in dsi_display_init_dispc()
4110 dsi->timings.vsync_level = OMAPDSS_SIG_ACTIVE_HIGH; in dsi_display_init_dispc()
4111 dsi->timings.data_pclk_edge = OMAPDSS_DRIVE_SIG_RISING_EDGE; in dsi_display_init_dispc()
4112 dsi->timings.de_level = OMAPDSS_SIG_ACTIVE_HIGH; in dsi_display_init_dispc()
4113 dsi->timings.sync_pclk_edge = OMAPDSS_DRIVE_SIG_FALLING_EDGE; in dsi_display_init_dispc()
4115 dss_mgr_set_timings(mgr, &dsi->timings); in dsi_display_init_dispc()
4121 dsi->mgr_config.io_pad_mode = DSS_IO_PAD_MODE_BYPASS; in dsi_display_init_dispc()
4122 dsi->mgr_config.video_port_width = in dsi_display_init_dispc()
4123 dsi_get_pixel_size(dsi->pix_fmt); in dsi_display_init_dispc()
4124 dsi->mgr_config.lcden_sig_polarity = 0; in dsi_display_init_dispc()
4126 dss_mgr_set_lcd_config(mgr, &dsi->mgr_config); in dsi_display_init_dispc()
4130 if (dsi->mode == OMAP_DSS_DSI_CMD_MODE) in dsi_display_init_dispc()
4134 dss_select_lcd_clk_source(mgr->id, OMAP_DSS_CLK_SRC_FCK); in dsi_display_init_dispc()
4143 if (dsi->mode == OMAP_DSS_DSI_CMD_MODE) in dsi_display_uninit_dispc()
4147 dss_select_lcd_clk_source(mgr->id, OMAP_DSS_CLK_SRC_FCK); in dsi_display_uninit_dispc()
4156 cinfo = dsi->user_dsi_cinfo; in dsi_configure_dsi_clocks()
4158 r = dss_pll_set_config(&dsi->pll, &cinfo); in dsi_configure_dsi_clocks()
4172 r = dss_pll_enable(&dsi->pll); in dsi_display_init_dsi()
4180 dss_select_dsi_clk_source(dsi->module_id, dsi->module_id == 0 ? in dsi_display_init_dsi()
4214 dss_select_dsi_clk_source(dsi->module_id, OMAP_DSS_CLK_SRC_FCK); in dsi_display_init_dsi()
4216 dss_pll_disable(&dsi->pll); in dsi_display_init_dsi()
4226 if (enter_ulps && !dsi->ulps_enabled) in dsi_display_uninit_dsi()
4236 dss_select_dsi_clk_source(dsi->module_id, OMAP_DSS_CLK_SRC_FCK); in dsi_display_uninit_dsi()
4251 mutex_lock(&dsi->lock); in dsi_display_enable()
4263 mutex_unlock(&dsi->lock); in dsi_display_enable()
4270 mutex_unlock(&dsi->lock); in dsi_display_enable()
4285 mutex_lock(&dsi->lock); in dsi_display_disable()
4296 mutex_unlock(&dsi->lock); in dsi_display_disable()
4304 dsi->te_enabled = enable; in dsi_enable_te()
4312 unsigned long byteclk = t->hsclk / 4; in print_dsi_vm()
4315 wc = DIV_ROUND_UP(t->hact * t->bitspp, 8); in print_dsi_vm()
4316 pps = DIV_ROUND_UP(wc + 6, t->ndl); /* pixel packet size */ in print_dsi_vm()
4317 bl = t->hss + t->hsa + t->hse + t->hbp + t->hfp; in print_dsi_vm()
4326 t->hss, t->hsa, t->hse, t->hbp, pps, t->hfp, in print_dsi_vm()
4328 TO_DSI_T(t->hss), in print_dsi_vm()
4329 TO_DSI_T(t->hsa), in print_dsi_vm()
4330 TO_DSI_T(t->hse), in print_dsi_vm()
4331 TO_DSI_T(t->hbp), in print_dsi_vm()
4333 TO_DSI_T(t->hfp), in print_dsi_vm()
4344 unsigned long pck = t->pixelclock; in print_dispc_vm()
4347 hact = t->x_res; in print_dispc_vm()
4348 bl = t->hsw + t->hbp + t->hfp; in print_dispc_vm()
4357 t->hsw, t->hbp, hact, t->hfp, in print_dispc_vm()
4359 TO_DISPC_T(t->hsw), in print_dispc_vm()
4360 TO_DISPC_T(t->hbp), in print_dispc_vm()
4362 TO_DISPC_T(t->hfp), in print_dispc_vm()
4374 unsigned long byteclk = t->hsclk / 4; in print_dsi_dispc_vm()
4379 dsi_tput = (u64)byteclk * t->ndl * 8; in print_dsi_dispc_vm()
4380 pck = (u32)div64_u64(dsi_tput, t->bitspp); in print_dsi_dispc_vm()
4381 dsi_hact = DIV_ROUND_UP(DIV_ROUND_UP(t->hact * t->bitspp, 8) + 6, t->ndl); in print_dsi_dispc_vm()
4382 dsi_htot = t->hss + t->hsa + t->hse + t->hbp + dsi_hact + t->hfp; in print_dsi_dispc_vm()
4385 vm.hsw = div64_u64((u64)(t->hsa + t->hse) * pck, byteclk); in print_dsi_dispc_vm()
4386 vm.hbp = div64_u64((u64)t->hbp * pck, byteclk); in print_dsi_dispc_vm()
4387 vm.hfp = div64_u64((u64)t->hfp * pck, byteclk); in print_dsi_dispc_vm()
4388 vm.x_res = t->hact; in print_dsi_dispc_vm()
4398 struct omap_video_timings *t = &ctx->dispc_vm; in dsi_cm_calc_dispc_cb()
4400 ctx->dispc_cinfo.lck_div = lckd; in dsi_cm_calc_dispc_cb()
4401 ctx->dispc_cinfo.pck_div = pckd; in dsi_cm_calc_dispc_cb()
4402 ctx->dispc_cinfo.lck = lck; in dsi_cm_calc_dispc_cb()
4403 ctx->dispc_cinfo.pck = pck; in dsi_cm_calc_dispc_cb()
4405 *t = *ctx->config->timings; in dsi_cm_calc_dispc_cb()
4406 t->pixelclock = pck; in dsi_cm_calc_dispc_cb()
4407 t->x_res = ctx->config->timings->x_res; in dsi_cm_calc_dispc_cb()
4408 t->y_res = ctx->config->timings->y_res; in dsi_cm_calc_dispc_cb()
4409 t->hsw = t->hfp = t->hbp = t->vsw = 1; in dsi_cm_calc_dispc_cb()
4410 t->vfp = t->vbp = 0; in dsi_cm_calc_dispc_cb()
4420 ctx->dsi_cinfo.mX[HSDIV_DISPC] = m_dispc; in dsi_cm_calc_hsdiv_cb()
4421 ctx->dsi_cinfo.clkout[HSDIV_DISPC] = dispc; in dsi_cm_calc_hsdiv_cb()
4423 return dispc_div_calc(dispc, ctx->req_pck_min, ctx->req_pck_max, in dsi_cm_calc_hsdiv_cb()
4432 ctx->dsi_cinfo.n = n; in dsi_cm_calc_pll_cb()
4433 ctx->dsi_cinfo.m = m; in dsi_cm_calc_pll_cb()
4434 ctx->dsi_cinfo.fint = fint; in dsi_cm_calc_pll_cb()
4435 ctx->dsi_cinfo.clkdco = clkdco; in dsi_cm_calc_pll_cb()
4437 return dss_pll_hsdiv_calc(ctx->pll, clkdco, ctx->req_pck_min, in dsi_cm_calc_pll_cb()
4451 clkin = clk_get_rate(dsi->pll.clkin); in dsi_cm_calc()
4452 bitspp = dsi_get_pixel_size(cfg->pixel_format); in dsi_cm_calc()
4453 ndl = dsi->num_lanes_used - 1; in dsi_cm_calc()
4461 pck = cfg->timings->pixelclock; in dsi_cm_calc()
4466 ctx->dsidev = dsi->pdev; in dsi_cm_calc()
4467 ctx->pll = &dsi->pll; in dsi_cm_calc()
4468 ctx->config = cfg; in dsi_cm_calc()
4469 ctx->req_pck_min = pck; in dsi_cm_calc()
4470 ctx->req_pck_nom = pck; in dsi_cm_calc()
4471 ctx->req_pck_max = pck * 3 / 2; in dsi_cm_calc()
4473 pll_min = max(cfg->hs_clk_min * 4, txbyteclk * 4 * 4); in dsi_cm_calc()
4474 pll_max = cfg->hs_clk_max * 4; in dsi_cm_calc()
4476 return dss_pll_calc(ctx->pll, clkin, in dsi_cm_calc()
4483 struct dsi_data *dsi = dsi_get_dsidrv_data(ctx->dsidev); in dsi_vm_calc_blanking()
4484 const struct omap_dss_dsi_config *cfg = ctx->config; in dsi_vm_calc_blanking()
4485 int bitspp = dsi_get_pixel_size(cfg->pixel_format); in dsi_vm_calc_blanking()
4486 int ndl = dsi->num_lanes_used - 1; in dsi_vm_calc_blanking()
4487 unsigned long hsclk = ctx->dsi_cinfo.clkdco / 4; in dsi_vm_calc_blanking()
4503 req_vm = cfg->timings; in dsi_vm_calc_blanking()
4504 req_pck_min = ctx->req_pck_min; in dsi_vm_calc_blanking()
4505 req_pck_max = ctx->req_pck_max; in dsi_vm_calc_blanking()
4506 req_pck_nom = ctx->req_pck_nom; in dsi_vm_calc_blanking()
4508 dispc_pck = ctx->dispc_cinfo.pck; in dsi_vm_calc_blanking()
4511 xres = req_vm->x_res; in dsi_vm_calc_blanking()
4513 panel_hbl = req_vm->hfp + req_vm->hbp + req_vm->hsw; in dsi_vm_calc_blanking()
4522 if (dsi->line_buffer_size < xres * bitspp / 8) { in dsi_vm_calc_blanking()
4534 /* When non-burst mode, DSI tput must be below max requirement. */ in dsi_vm_calc_blanking()
4535 if (cfg->trans_mode != OMAP_DSS_DSI_BURST_MODE) { in dsi_vm_calc_blanking()
4542 if (cfg->trans_mode == OMAP_DSS_DSI_PULSE_MODE) { in dsi_vm_calc_blanking()
4543 if (ndl == 3 && req_vm->hsw == 0) in dsi_vm_calc_blanking()
4559 dsi_hbl = dsi_htot - dsi_hact; in dsi_vm_calc_blanking()
4568 dispc_hbl = dispc_htot - xres; in dsi_vm_calc_blanking()
4572 dsi_vm = &ctx->dsi_vm; in dsi_vm_calc_blanking()
4575 dsi_vm->hsclk = hsclk; in dsi_vm_calc_blanking()
4577 dsi_vm->ndl = ndl; in dsi_vm_calc_blanking()
4578 dsi_vm->bitspp = bitspp; in dsi_vm_calc_blanking()
4580 if (cfg->trans_mode != OMAP_DSS_DSI_PULSE_MODE) { in dsi_vm_calc_blanking()
4582 } else if (ndl == 3 && req_vm->hsw == 0) { in dsi_vm_calc_blanking()
4585 hsa = div64_u64((u64)req_vm->hsw * byteclk, req_pck_nom); in dsi_vm_calc_blanking()
4586 hsa = max(hsa - hse, 1); in dsi_vm_calc_blanking()
4589 hbp = div64_u64((u64)req_vm->hbp * byteclk, req_pck_nom); in dsi_vm_calc_blanking()
4592 hfp = dsi_hbl - (hss + hsa + hse + hbp); in dsi_vm_calc_blanking()
4597 t = 1 - hfp; in dsi_vm_calc_blanking()
4598 hbp = max(hbp - t, 1); in dsi_vm_calc_blanking()
4599 hfp = dsi_hbl - (hss + hsa + hse + hbp); in dsi_vm_calc_blanking()
4603 t = 1 - hfp; in dsi_vm_calc_blanking()
4604 hsa = max(hsa - t, 1); in dsi_vm_calc_blanking()
4605 hfp = dsi_hbl - (hss + hsa + hse + hbp); in dsi_vm_calc_blanking()
4612 dsi_vm->hss = hss; in dsi_vm_calc_blanking()
4613 dsi_vm->hsa = hsa; in dsi_vm_calc_blanking()
4614 dsi_vm->hse = hse; in dsi_vm_calc_blanking()
4615 dsi_vm->hbp = hbp; in dsi_vm_calc_blanking()
4616 dsi_vm->hact = xres; in dsi_vm_calc_blanking()
4617 dsi_vm->hfp = hfp; in dsi_vm_calc_blanking()
4619 dsi_vm->vsa = req_vm->vsw; in dsi_vm_calc_blanking()
4620 dsi_vm->vbp = req_vm->vbp; in dsi_vm_calc_blanking()
4621 dsi_vm->vact = req_vm->y_res; in dsi_vm_calc_blanking()
4622 dsi_vm->vfp = req_vm->vfp; in dsi_vm_calc_blanking()
4624 dsi_vm->trans_mode = cfg->trans_mode; in dsi_vm_calc_blanking()
4626 dsi_vm->blanking_mode = 0; in dsi_vm_calc_blanking()
4627 dsi_vm->hsa_blanking_mode = 1; in dsi_vm_calc_blanking()
4628 dsi_vm->hfp_blanking_mode = 1; in dsi_vm_calc_blanking()
4629 dsi_vm->hbp_blanking_mode = 1; in dsi_vm_calc_blanking()
4631 dsi_vm->ddr_clk_always_on = cfg->ddr_clk_always_on; in dsi_vm_calc_blanking()
4632 dsi_vm->window_sync = 4; in dsi_vm_calc_blanking()
4636 dispc_vm = &ctx->dispc_vm; in dsi_vm_calc_blanking()
4638 dispc_vm->pixelclock = dispc_pck; in dsi_vm_calc_blanking()
4640 if (cfg->trans_mode == OMAP_DSS_DSI_PULSE_MODE) { in dsi_vm_calc_blanking()
4641 hsa = div64_u64((u64)req_vm->hsw * dispc_pck, in dsi_vm_calc_blanking()
4648 hbp = div64_u64((u64)req_vm->hbp * dispc_pck, req_pck_nom); in dsi_vm_calc_blanking()
4651 hfp = dispc_hbl - hsa - hbp; in dsi_vm_calc_blanking()
4656 t = 1 - hfp; in dsi_vm_calc_blanking()
4657 hbp = max(hbp - t, 1); in dsi_vm_calc_blanking()
4658 hfp = dispc_hbl - hsa - hbp; in dsi_vm_calc_blanking()
4662 t = 1 - hfp; in dsi_vm_calc_blanking()
4663 hsa = max(hsa - t, 1); in dsi_vm_calc_blanking()
4664 hfp = dispc_hbl - hsa - hbp; in dsi_vm_calc_blanking()
4671 dispc_vm->hfp = hfp; in dsi_vm_calc_blanking()
4672 dispc_vm->hsw = hsa; in dsi_vm_calc_blanking()
4673 dispc_vm->hbp = hbp; in dsi_vm_calc_blanking()
4684 ctx->dispc_cinfo.lck_div = lckd; in dsi_vm_calc_dispc_cb()
4685 ctx->dispc_cinfo.pck_div = pckd; in dsi_vm_calc_dispc_cb()
4686 ctx->dispc_cinfo.lck = lck; in dsi_vm_calc_dispc_cb()
4687 ctx->dispc_cinfo.pck = pck; in dsi_vm_calc_dispc_cb()
4693 print_dispc_vm("dispc", &ctx->dispc_vm); in dsi_vm_calc_dispc_cb()
4694 print_dsi_vm("dsi ", &ctx->dsi_vm); in dsi_vm_calc_dispc_cb()
4695 print_dispc_vm("req ", ctx->config->timings); in dsi_vm_calc_dispc_cb()
4696 print_dsi_dispc_vm("act ", &ctx->dsi_vm); in dsi_vm_calc_dispc_cb()
4708 ctx->dsi_cinfo.mX[HSDIV_DISPC] = m_dispc; in dsi_vm_calc_hsdiv_cb()
4709 ctx->dsi_cinfo.clkout[HSDIV_DISPC] = dispc; in dsi_vm_calc_hsdiv_cb()
4716 if (ctx->config->trans_mode == OMAP_DSS_DSI_BURST_MODE) in dsi_vm_calc_hsdiv_cb()
4717 pck_max = ctx->req_pck_max + 10000000; in dsi_vm_calc_hsdiv_cb()
4719 pck_max = ctx->req_pck_max; in dsi_vm_calc_hsdiv_cb()
4721 return dispc_div_calc(dispc, ctx->req_pck_min, pck_max, in dsi_vm_calc_hsdiv_cb()
4730 ctx->dsi_cinfo.n = n; in dsi_vm_calc_pll_cb()
4731 ctx->dsi_cinfo.m = m; in dsi_vm_calc_pll_cb()
4732 ctx->dsi_cinfo.fint = fint; in dsi_vm_calc_pll_cb()
4733 ctx->dsi_cinfo.clkdco = clkdco; in dsi_vm_calc_pll_cb()
4735 return dss_pll_hsdiv_calc(ctx->pll, clkdco, ctx->req_pck_min, in dsi_vm_calc_pll_cb()
4744 const struct omap_video_timings *t = cfg->timings; in dsi_vm_calc()
4748 int ndl = dsi->num_lanes_used - 1; in dsi_vm_calc()
4749 int bitspp = dsi_get_pixel_size(cfg->pixel_format); in dsi_vm_calc()
4752 clkin = clk_get_rate(dsi->pll.clkin); in dsi_vm_calc()
4755 ctx->dsidev = dsi->pdev; in dsi_vm_calc()
4756 ctx->pll = &dsi->pll; in dsi_vm_calc()
4757 ctx->config = cfg; in dsi_vm_calc()
4760 ctx->req_pck_min = t->pixelclock - 1000; in dsi_vm_calc()
4761 ctx->req_pck_nom = t->pixelclock; in dsi_vm_calc()
4762 ctx->req_pck_max = t->pixelclock + 1000; in dsi_vm_calc()
4764 byteclk_min = div64_u64((u64)ctx->req_pck_min * bitspp, ndl * 8); in dsi_vm_calc()
4765 pll_min = max(cfg->hs_clk_min * 4, byteclk_min * 4 * 4); in dsi_vm_calc()
4767 if (cfg->trans_mode == OMAP_DSS_DSI_BURST_MODE) { in dsi_vm_calc()
4768 pll_max = cfg->hs_clk_max * 4; in dsi_vm_calc()
4771 byteclk_max = div64_u64((u64)ctx->req_pck_max * bitspp, in dsi_vm_calc()
4777 return dss_pll_calc(ctx->pll, clkin, in dsi_vm_calc()
4791 mutex_lock(&dsi->lock); in dsi_set_config()
4793 dsi->pix_fmt = config->pixel_format; in dsi_set_config()
4794 dsi->mode = config->mode; in dsi_set_config()
4796 if (config->mode == OMAP_DSS_DSI_VIDEO_MODE) in dsi_set_config()
4803 r = -EINVAL; in dsi_set_config()
4809 r = dsi_lp_clock_calc(ctx.dsi_cinfo.clkout[HSDIV_DSI], in dsi_set_config()
4810 config->lp_clk_min, config->lp_clk_max, &dsi->user_lp_cinfo); in dsi_set_config()
4816 dsi->user_dsi_cinfo = ctx.dsi_cinfo; in dsi_set_config()
4817 dsi->user_dispc_cinfo = ctx.dispc_cinfo; in dsi_set_config()
4819 dsi->timings = ctx.dispc_vm; in dsi_set_config()
4820 dsi->vm_timings = ctx.dsi_vm; in dsi_set_config()
4822 mutex_unlock(&dsi->lock); in dsi_set_config()
4826 mutex_unlock(&dsi->lock); in dsi_set_config()
4887 for (i = 0; i < ARRAY_SIZE(dsi->vc); i++) { in dsi_request_vc()
4888 if (!dsi->vc[i].dssdev) { in dsi_request_vc()
4889 dsi->vc[i].dssdev = dssdev; in dsi_request_vc()
4895 DSSERR("cannot get VC for display %s", dssdev->name); in dsi_request_vc()
4896 return -ENOSPC; in dsi_request_vc()
4906 return -EINVAL; in dsi_set_vc_id()
4911 return -EINVAL; in dsi_set_vc_id()
4914 if (dsi->vc[channel].dssdev != dssdev) { in dsi_set_vc_id()
4916 dssdev->name); in dsi_set_vc_id()
4917 return -EINVAL; in dsi_set_vc_id()
4920 dsi->vc[channel].vc_id = vc_id; in dsi_set_vc_id()
4931 dsi->vc[channel].dssdev == dssdev) { in dsi_release_vc()
4932 dsi->vc[channel].dssdev = NULL; in dsi_release_vc()
4933 dsi->vc[channel].vc_id = 0; in dsi_release_vc()
4943 clk = devm_clk_get(&dsidev->dev, "fck"); in dsi_get_clocks()
4949 dsi->dss_clk = clk; in dsi_get_clocks()
4965 mgr = omap_dss_get_overlay_manager(dssdev->dispc_channel); in dsi_connect()
4967 return -ENODEV; in dsi_connect()
4976 dssdev->name); in dsi_connect()
4987 WARN_ON(dst != dssdev->dst); in dsi_disconnect()
4989 if (dst != dssdev->dst) in dsi_disconnect()
4994 if (dssdev->manager) in dsi_disconnect()
4995 dss_mgr_disconnect(dssdev->manager, dssdev); in dsi_disconnect()
5040 struct omap_dss_device *out = &dsi->output; in dsi_init_output()
5042 out->dev = &dsidev->dev; in dsi_init_output()
5043 out->id = dsi->module_id == 0 ? in dsi_init_output()
5046 out->output_type = OMAP_DISPLAY_TYPE_DSI; in dsi_init_output()
5047 out->name = dsi->module_id == 0 ? "dsi.0" : "dsi.1"; in dsi_init_output()
5048 out->dispc_channel = dsi_get_channel(dsi->module_id); in dsi_init_output()
5049 out->ops.dsi = &dsi_ops; in dsi_init_output()
5050 out->owner = THIS_MODULE; in dsi_init_output()
5058 struct omap_dss_device *out = &dsi->output; in dsi_uninit_output()
5065 struct device_node *node = pdev->dev.of_node; in dsi_probe_of()
5080 dev_err(&pdev->dev, "failed to find lane data\n"); in dsi_probe_of()
5081 r = -EINVAL; in dsi_probe_of()
5088 num_pins > dsi->num_lanes_supported * 2) { in dsi_probe_of()
5089 dev_err(&pdev->dev, "bad number of lanes\n"); in dsi_probe_of()
5090 r = -EINVAL; in dsi_probe_of()
5096 dev_err(&pdev->dev, "failed to read lane data\n"); in dsi_probe_of()
5104 r = dsi_configure_pins(&dsi->output, &pin_cfg); in dsi_probe_of()
5106 dev_err(&pdev->dev, "failed to configure pins"); in dsi_probe_of()
5126 .n_max = (1 << 7) - 1,
5127 .m_max = (1 << 11) - 1,
5128 .mX_max = (1 << 4) - 1,
5151 .n_max = (1 << 8) - 1,
5152 .m_max = (1 << 12) - 1,
5153 .mX_max = (1 << 5) - 1,
5176 .n_max = (1 << 8) - 1,
5177 .m_max = (1 << 12) - 1,
5178 .mX_max = (1 << 5) - 1,
5203 struct dss_pll *pll = &dsi->pll; in dsi_init_pll_data()
5207 clk = devm_clk_get(&dsidev->dev, "sys_clk"); in dsi_init_pll_data()
5213 pll->name = dsi->module_id == 0 ? "dsi0" : "dsi1"; in dsi_init_pll_data()
5214 pll->id = dsi->module_id == 0 ? DSS_PLL_DSI1 : DSS_PLL_DSI2; in dsi_init_pll_data()
5215 pll->clkin = clk; in dsi_init_pll_data()
5216 pll->base = dsi->pll_base; in dsi_init_pll_data()
5223 pll->hw = &dss_omap3_dsi_pll_hw; in dsi_init_pll_data()
5229 pll->hw = &dss_omap4_dsi_pll_hw; in dsi_init_pll_data()
5233 pll->hw = &dss_omap5_dsi_pll_hw; in dsi_init_pll_data()
5237 return -ENODEV; in dsi_init_pll_data()
5240 pll->ops = &dsi_pll_ops; in dsi_init_pll_data()
5260 dsi = devm_kzalloc(&dsidev->dev, sizeof(*dsi), GFP_KERNEL); in dsi_bind()
5262 return -ENOMEM; in dsi_bind()
5264 dsi->pdev = dsidev; in dsi_bind()
5267 spin_lock_init(&dsi->irq_lock); in dsi_bind()
5268 spin_lock_init(&dsi->errors_lock); in dsi_bind()
5269 dsi->errors = 0; in dsi_bind()
5272 spin_lock_init(&dsi->irq_stats_lock); in dsi_bind()
5273 dsi->irq_stats.last_reset = jiffies; in dsi_bind()
5276 mutex_init(&dsi->lock); in dsi_bind()
5277 sema_init(&dsi->bus_lock, 1); in dsi_bind()
5279 INIT_DEFERRABLE_WORK(&dsi->framedone_timeout_work, in dsi_bind()
5283 timer_setup(&dsi->te_timer, dsi_te_timeout, 0); in dsi_bind()
5291 return -EINVAL; in dsi_bind()
5294 temp_res.start = res->start; in dsi_bind()
5295 temp_res.end = temp_res.start + DSI_PROTO_SZ - 1; in dsi_bind()
5301 dsi->proto_base = devm_ioremap(&dsidev->dev, res->start, in dsi_bind()
5303 if (!dsi->proto_base) { in dsi_bind()
5305 return -ENOMEM; in dsi_bind()
5313 return -EINVAL; in dsi_bind()
5316 temp_res.start = res->start + DSI_PHY_OFFSET; in dsi_bind()
5317 temp_res.end = temp_res.start + DSI_PHY_SZ - 1; in dsi_bind()
5321 dsi->phy_base = devm_ioremap(&dsidev->dev, res->start, in dsi_bind()
5323 if (!dsi->phy_base) { in dsi_bind()
5325 return -ENOMEM; in dsi_bind()
5333 return -EINVAL; in dsi_bind()
5336 temp_res.start = res->start + DSI_PLL_OFFSET; in dsi_bind()
5337 temp_res.end = temp_res.start + DSI_PLL_SZ - 1; in dsi_bind()
5341 dsi->pll_base = devm_ioremap(&dsidev->dev, res->start, in dsi_bind()
5343 if (!dsi->pll_base) { in dsi_bind()
5345 return -ENOMEM; in dsi_bind()
5348 dsi->irq = platform_get_irq(dsi->pdev, 0); in dsi_bind()
5349 if (dsi->irq < 0) { in dsi_bind()
5351 return -ENODEV; in dsi_bind()
5354 r = devm_request_irq(&dsidev->dev, dsi->irq, omap_dsi_irq_handler, in dsi_bind()
5355 IRQF_SHARED, dev_name(&dsidev->dev), dsi->pdev); in dsi_bind()
5361 if (dsidev->dev.of_node) { in dsi_bind()
5365 match = of_match_node(dsi_of_match, dsidev->dev.of_node); in dsi_bind()
5368 return -ENODEV; in dsi_bind()
5371 d = match->data; in dsi_bind()
5373 while (d->address != 0 && d->address != dsi_mem->start) in dsi_bind()
5376 if (d->address == 0) { in dsi_bind()
5378 return -ENODEV; in dsi_bind()
5381 dsi->module_id = d->id; in dsi_bind()
5383 dsi->module_id = dsidev->id; in dsi_bind()
5387 for (i = 0; i < ARRAY_SIZE(dsi->vc); i++) { in dsi_bind()
5388 dsi->vc[i].source = DSI_VC_SOURCE_L4; in dsi_bind()
5389 dsi->vc[i].dssdev = NULL; in dsi_bind()
5390 dsi->vc[i].vc_id = 0; in dsi_bind()
5399 pm_runtime_enable(&dsidev->dev); in dsi_bind()
5406 dev_dbg(&dsidev->dev, "OMAP DSI rev %d.%d\n", in dsi_bind()
5413 dsi->num_lanes_supported = 1 + REG_GET(dsidev, DSI_GNQ, 11, 9); in dsi_bind()
5415 dsi->num_lanes_supported = 3; in dsi_bind()
5417 dsi->line_buffer_size = dsi_get_line_buf_size(dsidev); in dsi_bind()
5421 if (dsidev->dev.of_node) { in dsi_bind()
5428 r = of_platform_populate(dsidev->dev.of_node, NULL, NULL, in dsi_bind()
5429 &dsidev->dev); in dsi_bind()
5436 if (dsi->module_id == 0) in dsi_bind()
5438 else if (dsi->module_id == 1) in dsi_bind()
5442 if (dsi->module_id == 0) in dsi_bind()
5444 else if (dsi->module_id == 1) in dsi_bind()
5455 pm_runtime_disable(&dsidev->dev); in dsi_bind()
5464 of_platform_depopulate(&dsidev->dev); in dsi_unbind()
5466 WARN_ON(dsi->scp_clk_refcount > 0); in dsi_unbind()
5468 dss_pll_unregister(&dsi->pll); in dsi_unbind()
5472 pm_runtime_disable(&dsidev->dev); in dsi_unbind()
5474 if (dsi->vdds_dsi_reg != NULL && dsi->vdds_dsi_enabled) { in dsi_unbind()
5475 regulator_disable(dsi->vdds_dsi_reg); in dsi_unbind()
5476 dsi->vdds_dsi_enabled = false; in dsi_unbind()
5487 return component_add(&pdev->dev, &dsi_component_ops); in dsi_probe()
5492 component_del(&pdev->dev, &dsi_component_ops); in dsi_remove()
5501 dsi->is_enabled = false; in dsi_runtime_suspend()
5505 synchronize_irq(dsi->irq); in dsi_runtime_suspend()
5522 dsi->is_enabled = true; in dsi_runtime_resume()
5552 { .compatible = "ti,omap3-dsi", .data = dsi_of_data_omap3, },
5553 { .compatible = "ti,omap4-dsi", .data = dsi_of_data_omap4, },
5554 { .compatible = "ti,omap5-dsi", .data = dsi_of_data_omap5, },