101 			outreg(disp, GC_L0PAL0 + (regno * 4), val);  in mb862xxfb_setcolreg()
220 	outreg(disp, GC_DCM1, reg);  in mb862xxfb_set_par()
227 	outreg(disp, GC_DCM1, reg);  in mb862xxfb_set_par()
235 	outreg(disp, GC_L0M, reg);  in mb862xxfb_set_par()
239 		outreg(disp, GC_L0EM, reg | GC_L0EM_L0EC_24);  in mb862xxfb_set_par()
241 	outreg(disp, GC_WY_WX, 0);  in mb862xxfb_set_par()
243 	outreg(disp, GC_WH_WW, reg);  in mb862xxfb_set_par()
244 	outreg(disp, GC_L0OA0, 0);  in mb862xxfb_set_par()
245 	outreg(disp, GC_L0DA0, 0);  in mb862xxfb_set_par()
246 	outreg(disp, GC_L0DY_L0DX, 0);  in mb862xxfb_set_par()
247 	outreg(disp, GC_L0WY_L0WX, 0);  in mb862xxfb_set_par()
248 	outreg(disp, GC_L0WH_L0WW, reg);  in mb862xxfb_set_par()
253 	outreg(disp, GC_CPM_CUTC, reg);  in mb862xxfb_set_par()
257 	outreg(disp, GC_HDB_HDP, reg);  in mb862xxfb_set_par()
259 	outreg(disp, GC_VDP_VSP, reg);  in mb862xxfb_set_par()
262 	outreg(disp, GC_VSW_HSW_HSP, reg);  in mb862xxfb_set_par()
263 	outreg(disp, GC_HTP, pack(h_total(&fbi->var) - 1, 0));  in mb862xxfb_set_par()
264 	outreg(disp, GC_VTR, pack(v_total(&fbi->var) - 1, 0));  in mb862xxfb_set_par()
270 	outreg(disp, GC_DCM1, reg);  in mb862xxfb_set_par()
281 	outreg(disp, GC_L0WY_L0WX, reg);  in mb862xxfb_pan()
284 	outreg(disp, GC_L0WH_L0WW, reg);  in mb862xxfb_pan()
299 		outreg(disp, GC_DCM1, reg);  in mb862xxfb_blank()
304 		outreg(disp, GC_DCM1, reg);  in mb862xxfb_blank()
336 			outreg(cap, GC_CAP_CSC,  in mb862xxfb_ioctl()
344 			outreg(cap, GC_CAP_CSC,  in mb862xxfb_ioctl()
347 			outreg(cap, GC_CAP_CMSS,  in mb862xxfb_ioctl()
349 			outreg(cap, GC_CAP_CMDS,  in mb862xxfb_ioctl()
356 			outreg(cap, GC_CAP_CBM,  in mb862xxfb_ioctl()
360 			outreg(cap, GC_CAP_CBM,  in mb862xxfb_ioctl()
364 		outreg(disp, GC_L1EM, l1em);  in mb862xxfb_ioctl()
369 			outreg(disp, GC_L1DA, par->cap_buf);  in mb862xxfb_ioctl()
370 			outreg(cap, GC_CAP_IMG_START,  in mb862xxfb_ioctl()
372 			outreg(cap, GC_CAP_IMG_END,  in mb862xxfb_ioctl()
374 			outreg(disp, GC_L1M, GC_L1M_16 | GC_L1M_YC | GC_L1M_CS |  in mb862xxfb_ioctl()
376 			outreg(disp, GC_L1WY_L1WX,  in mb862xxfb_ioctl()
378 			outreg(disp, GC_L1WH_L1WW,  in mb862xxfb_ioctl()
380 			outreg(disp, GC_DLS, 1);  in mb862xxfb_ioctl()
381 			outreg(cap, GC_CAP_VCM,  in mb862xxfb_ioctl()
383 			outreg(disp, GC_DCM1, inreg(disp, GC_DCM1) |  in mb862xxfb_ioctl()
386 			outreg(cap, GC_CAP_VCM,  in mb862xxfb_ioctl()
388 			outreg(disp, GC_DCM1,  in mb862xxfb_ioctl()
395 			outreg(cap, GC_CAP_VCM,  in mb862xxfb_ioctl()
398 			outreg(cap, GC_CAP_VCM,  in mb862xxfb_ioctl()
538 	outreg(cap, GC_CAP_CBM, GC_CBM_OO | GC_CBM_CBST |  in mb862xxfb_init_fbinfo()
540 	outreg(cap, GC_CAP_CBOA, par->cap_buf);  in mb862xxfb_init_fbinfo()
541 	outreg(cap, GC_CAP_CBLA, par->cap_buf + par->cap_len);  in mb862xxfb_init_fbinfo()
605 		outreg(ctrl, 0x0, reg_ist);  in mb862xx_intr()
616 		outreg(host, GC_IST, ~reg_ist);  in mb862xx_intr()
660 		outreg(host, GC_CCF, ccf);  in mb862xx_gdc_init()
662 		outreg(host, GC_MMR, mmr);  in mb862xx_gdc_init()
667 	outreg(host, GC_IST, 0);  in mb862xx_gdc_init()
668 	outreg(host, GC_IMASK, GC_INT_EN);  in mb862xx_gdc_init()
772 	outreg(host, GC_IMASK, 0);  in of_platform_mb862xx_probe()
799 	outreg(disp, GC_DCM1, reg);  in of_platform_mb862xx_remove()
802 	outreg(host, GC_IMASK, 0);  in of_platform_mb862xx_remove()
880 			outreg(host, GC_CCF, GC_CCF_CGE_166 | GC_CCF_COT_133);  in coralp_init()
882 			outreg(host, GC_MMR, GC_MMR_CORALP_EVB_VAL);  in coralp_init()
886 		outreg(host, GC_IST, 0);  in coralp_init()
903 	outreg(dram_ctrl, GC_DCTL_IOCONT1_IOCONT0, GC_EVB_DCTL_IOCONT1_IOCONT0);  in init_dram_ctrl()
906 	outreg(dram_ctrl, GC_DCTL_MODE_ADD, GC_EVB_DCTL_MODE_ADD);  in init_dram_ctrl()
907 	outreg(dram_ctrl, GC_DCTL_SETTIME1_EMODE, GC_EVB_DCTL_SETTIME1_EMODE);  in init_dram_ctrl()
908 	outreg(dram_ctrl, GC_DCTL_REFRESH_SETTIME2,  in init_dram_ctrl()
910 	outreg(dram_ctrl, GC_DCTL_RSV2_RSV1, GC_EVB_DCTL_RSV2_RSV1);  in init_dram_ctrl()
911 	outreg(dram_ctrl, GC_DCTL_DDRIF2_DDRIF1, GC_EVB_DCTL_DDRIF2_DDRIF1);  in init_dram_ctrl()
912 	outreg(dram_ctrl, GC_DCTL_RSV0_STATES, GC_EVB_DCTL_RSV0_STATES);  in init_dram_ctrl()
922 	outreg(dram_ctrl, GC_DCTL_MODE_ADD, GC_EVB_DCTL_MODE_ADD_AFT_RST);  in init_dram_ctrl()
923 	outreg(dram_ctrl, GC_DCTL_RSV0_STATES, GC_EVB_DCTL_RSV0_STATES_AFT_RST);  in init_dram_ctrl()
945 	outreg(ctrl, GC_CTRL_CLK_ENABLE, reg);  in carmine_init()
955 	outreg(ctrl, GC_CTRL_CLK_ENABLE, reg);  in carmine_init()
961 	outreg(ctrl, GC_CTRL_INT_MASK, 0);  in carmine_init()
965 	outreg(ctrl, GC_CTRL_CLK_ENABLE, 0);  in carmine_init()
1112 		outreg(ctrl, GC_CTRL_INT_MASK, GC_CARMINE_INT_EN);  in mb862xx_pci_probe()
1114 		outreg(host, GC_IMASK, GC_INT_EN);  in mb862xx_pci_probe()
1147 	outreg(disp, GC_DCM1, reg);  in mb862xx_pci_remove()
1150 		outreg(ctrl, GC_CTRL_INT_MASK, 0);  in mb862xx_pci_remove()
1151 		outreg(ctrl, GC_CTRL_CLK_ENABLE, 0);  in mb862xx_pci_remove()
1153 		outreg(host, GC_IMASK, 0);  in mb862xx_pci_remove()