138 	0,0,		/* virtual -> visible no offset */
140 	0,		/* greyscale ? */
141 	{0,0,0},	/* R */
142 	{0,0,0},	/* G */
143 	{0,0,0},	/* B */
144 	{0,0,0},	/* transparency */
145 	0,		/* standard pixel format */
150 	96L,2L,~0,	/* No sync info */
171 					mga_outl(0x3C2C, pos);  in update_crtc2()
172 					mga_outl(0x3C28, pos + minfo->fbcon.var.xres_virtual * minfo->fbcon.var.bits_per_pixel / 8);  in update_crtc2()
174 					mga_outl(0x3C28, pos);  in update_crtc2()
183 	if (minfo->crtc1.panpos >= 0) {  in matroxfb_crtc1_panpos()
189 		if (panpos >= 0) {  in matroxfb_crtc1_panpos()
194 			mga_setr(M_EXTVGA_INDEX, 0x00, panpos);  in matroxfb_crtc1_panpos()
195 			if (extvga_reg != 0x00) {  in matroxfb_crtc1_panpos()
206 	int handled = 0;  in matrox_irq()
211 	if (status & 0x20) {  in matrox_irq()
212 		mga_outl(M_ICLEAR, 0x20);  in matrox_irq()
218 	if (status & 0x200) {  in matrox_irq()
219 		mga_outl(M_ICLEAR, 0x200);  in matrox_irq()
232 		bm = 0x220;  in matroxfb_enable_irq()
234 		bm = 0x020;  in matroxfb_enable_irq()
236 	if (!test_and_set_bit(0, &minfo->irq_flags)) {  in matroxfb_enable_irq()
239 			clear_bit(0, &minfo->irq_flags);  in matroxfb_enable_irq()
254 	return 0;  in matroxfb_enable_irq()
259 	if (test_and_clear_bit(0, &minfo->irq_flags)) {  in matroxfb_disable_irq()
263 			mga_outl(M_IEN, mga_inl(M_IEN) & ~0x220);  in matroxfb_disable_irq()
265 			mga_outl(M_IEN, mga_inl(M_IEN) & ~0x20);  in matroxfb_disable_irq()
277 		case 0:  in matroxfb_wait_for_sync()
289 	ret = matroxfb_enable_irq(minfo, 0);  in matroxfb_wait_for_sync()
296 	if (ret < 0) {  in matroxfb_wait_for_sync()
299 	if (ret == 0) {  in matroxfb_wait_for_sync()
303 	return 0;  in matroxfb_wait_for_sync()
328 	p0 = minfo->hw.CRTC[0x0D] = pos & 0xFF;  in matrox_pan_var()
329 	p1 = minfo->hw.CRTC[0x0C] = (pos & 0xFF00) >> 8;  in matrox_pan_var()
330 …p2 = minfo->hw.CRTCEXT[0] = (minfo->hw.CRTCEXT[0] & 0xB0) | ((pos >> 16) & 0x0F) | ((pos >> 14) & …  in matrox_pan_var()
334 	vbl = (var->activate & FB_ACTIVATE_VBL) && (matroxfb_enable_irq(minfo, 0) == 0);  in matrox_pan_var()
339 	mga_setr(M_CRTC_INDEX, 0x0D, p0);  in matrox_pan_var()
340 	mga_setr(M_CRTC_INDEX, 0x0C, p1);  in matrox_pan_var()
342 		mga_setr(M_EXTVGA_INDEX, 0x08, p3);  in matrox_pan_var()
348 		mga_setr(M_EXTVGA_INDEX, 0x00, p2);  in matrox_pan_var()
400 	return(0);  in matroxfb_open()
410 		if (0 == --minfo->userusecount) {  in matroxfb_release()
415 		matroxfb_remove(minfo, 0);  in matroxfb_release()
417 	return(0);  in matroxfb_release()
427 	return 0;  in matroxfb_pan_display()
457 		case 0:		return xres;  in matroxfb_test_and_set_rounding()
545 		{ 8,{ 0,8},{0,8},{0,8},{ 0,0},MX_VISUAL_PSEUDOCOLOR},  in matroxfb_decode_var()
546 		{15,{10,5},{5,5},{0,5},{15,1},MX_VISUAL_DIRECTCOLOR},  in matroxfb_decode_var()
547 		{16,{11,5},{5,6},{0,5},{ 0,0},MX_VISUAL_DIRECTCOLOR},  in matroxfb_decode_var()
548 		{24,{16,8},{8,8},{0,8},{ 0,0},MX_VISUAL_DIRECTCOLOR},  in matroxfb_decode_var()
549 		{32,{16,8},{8,8},{0,8},{24,8},MX_VISUAL_DIRECTCOLOR}  in matroxfb_decode_var()
567 	*ydstorg = 0;  in matroxfb_decode_var()
583 	if (!minfo->capable.cross4MB && (memlen > 0x400000)) {  in matroxfb_decode_var()
597 			*ydstorg = m2 = 0x400000 % m2;  in matroxfb_decode_var()
641 	return 0;  in matroxfb_decode_var()
656 	 *  != 0 for invalid regno.  in matroxfb_setcolreg()
703 	return 0;  in matroxfb_setcolreg()
715 	fix->ywrapstep = 0;  in matroxfb_init_fix()
743 	if ((err = matroxfb_decode_var(minfo, var, &visual, &cmap_len, &ydstorg)) != 0)  in matroxfb_check_var()
745 	return 0;  in matroxfb_check_var()
764 	if ((err = matroxfb_decode_var(minfo, var, &visual, &cmap_len, &ydstorg)) != 0)  in matroxfb_set_par()
770 	minfo->fbcon.fix.type_aux = 0;  in matroxfb_set_par()
792 				case  0:	mt.delay = 31 + 0; break;  in matroxfb_set_par()
802 			for (out = 0; out < MATROXFB_MAX_OUTPUTS; out++) {  in matroxfb_set_par()
815 			hw->CRTC[0x0D] = pos & 0xFF;  in matroxfb_set_par()
816 			hw->CRTC[0x0C] = (pos & 0xFF00) >> 8;  in matroxfb_set_par()
817 			hw->CRTCEXT[0] = (hw->CRTCEXT[0] & 0xF0) | ((pos >> 16) & 0x0F) | ((pos >> 14) & 0x40);  in matroxfb_set_par()
822 			for (out = 0; out < MATROXFB_MAX_OUTPUTS; out++) {  in matroxfb_set_par()
828 			for (out = 0; out < MATROXFB_MAX_OUTPUTS; out++) {  in matroxfb_set_par()
839 	return 0;  in matroxfb_set_par()
847 	matroxfb_enable_irq(minfo, 0);  in matroxfb_get_vblank()
848 	memset(vblank, 0, sizeof(*vblank));  in matroxfb_get_vblank()
862 	if (test_bit(0, &minfo->irq_flags)) {  in matroxfb_get_vblank()
868 	return 0;  in matroxfb_get_vblank()
898 				return 0;  in matroxfb_ioctl()
925 						val = 0;  in matroxfb_ioctl()
957 				return 0;  in matroxfb_ioctl()
975 					val = 0;  in matroxfb_ioctl()
982 				return 0;  in matroxfb_ioctl()
992 				for (i = 0; i < 32; i++) {  in matroxfb_ioctl()
1011 						for (i = 0; i < MATROXFB_MAX_OUTPUTS; i++) {  in matroxfb_ioctl()
1018 				changes = 0;  in matroxfb_ioctl()
1019 				for (i = 0; i < MATROXFB_MAX_OUTPUTS; i++) {  in matroxfb_ioctl()
1031 					return 0;  in matroxfb_ioctl()
1033 				return 0;  in matroxfb_ioctl()
1037 				u_int32_t conn = 0;  in matroxfb_ioctl()
1040 				for (i = 0; i < MATROXFB_MAX_OUTPUTS; i++) {  in matroxfb_ioctl()
1047 				return 0;  in matroxfb_ioctl()
1051 				u_int32_t conn = 0;  in matroxfb_ioctl()
1054 				for (i = 0; i < MATROXFB_MAX_OUTPUTS; i++) {  in matroxfb_ioctl()
1072 				return 0;  in matroxfb_ioctl()
1076 				u_int32_t conn = 0;  in matroxfb_ioctl()
1079 				for (i = 0; i < MATROXFB_MAX_OUTPUTS; i++) {  in matroxfb_ioctl()
1086 				return 0;  in matroxfb_ioctl()
1092 				memset(&r, 0, sizeof(r));  in matroxfb_ioctl()
1096 				r.version = KERNEL_VERSION(1,0,0);  in matroxfb_ioctl()
1100 				return 0;  in matroxfb_ioctl()
1120 				if (err >= 0 &&  in matroxfb_ioctl()
1142 				if (err >= 0 &&  in matroxfb_ioctl()
1170 /* 0 unblank, 1 blank, 2 no vsync, 3 no hsync, 4 off */
1185 	case FB_BLANK_NORMAL:  seq = 0x20; crtc = 0x00; break; /* works ??? */  in matroxfb_blank()
1186 	case FB_BLANK_VSYNC_SUSPEND:  seq = 0x20; crtc = 0x10; break;  in matroxfb_blank()
1187 	case FB_BLANK_HSYNC_SUSPEND:  seq = 0x20; crtc = 0x20; break;  in matroxfb_blank()
1188 	case FB_BLANK_POWERDOWN:  seq = 0x20; crtc = 0x30; break;  in matroxfb_blank()
1189 	default: seq = 0x00; crtc = 0x00; break;  in matroxfb_blank()
1195 	mga_outb(M_SEQ_DATA, (mga_inb(M_SEQ_DATA) & ~0x20) | seq);  in matroxfb_blank()
1197 	mga_outb(M_EXTVGA_DATA, (mga_inb(M_EXTVGA_DATA) & ~0x30) | crtc);  in matroxfb_blank()
1200 	return 0;  in matroxfb_blank()
1219 #define RSDepth(X)	(((X) >> 8) & 0x0F)
1220 #define RS8bpp		0x1
1221 #define RS15bpp		0x2
1222 #define RS16bpp		0x3
1223 #define RS32bpp		0x4
1224 #define RS4bpp		0x5
1225 #define RS24bpp		0x6
1226 #define RSText		0x7
1227 #define RSText8		0x8
1230 	{ {  0, 8, 0}, { 0, 8, 0}, { 0, 8, 0}, {  0, 0, 0},  8 },
1231 	{ { 10, 5, 0}, { 5, 5, 0}, { 0, 5, 0}, { 15, 1, 0}, 16 },
1232 	{ { 11, 5, 0}, { 5, 6, 0}, { 0, 5, 0}, {  0, 0, 0}, 16 },
1233 	{ { 16, 8, 0}, { 8, 8, 0}, { 0, 8, 0}, { 24, 8, 0}, 32 },
1234 	{ {  0, 8, 0}, { 0, 8, 0}, { 0, 8, 0}, {  0, 0, 0},  4 },
1235 	{ { 16, 8, 0}, { 8, 8, 0}, { 0, 8, 0}, {  0, 0, 0}, 24 },
1236 	{ {  0, 6, 0}, { 0, 6, 0}, { 0, 6, 0}, {  0, 0, 0},  0 },	/* textmode with (default) VGA8x16 */
1237 	{ {  0, 6, 0}, { 0, 6, 0}, { 0, 6, 0}, {  0, 0, 0},  0 },	/* textmode hardwired to VGA8x8 */
1242 static int option_precise_width = 1;	/* cannot be changed, option_precise_width==0 must imply noacc…
1257 static unsigned int vesa = ~0;		/* "matroxfb:vesa:xxxxx" */
1261 static unsigned int upper = ~0;		/* "matroxfb:upper:xxxxx" */
1262 static unsigned int lower = ~0;		/* "matroxfb:lower:xxxxx" */
1264 static unsigned int left = ~0;		/* "matroxfb:left:xxxxx" */
1265 static unsigned int right = ~0;		/* "matroxfb:right:xxxxx" */
1294 	maxSize &= ~0x1FFFFF;	/* must be X*2MB (really it must be 2 or X*4MB) */  in matroxfb_getmemory()
1296 	if (maxSize < 0x0200000) return 0;  in matroxfb_getmemory()
1297 	if (maxSize > 0x2000000) maxSize = 0x2000000;  in matroxfb_getmemory()
1299 	mga_outb(M_EXTVGA_INDEX, 0x03);  in matroxfb_getmemory()
1301 	mga_outb(M_EXTVGA_DATA, orig | 0x80);  in matroxfb_getmemory()
1304 	for (offs = 0x100000; offs < maxSize; offs += 0x200000)  in matroxfb_getmemory()
1306 	for (offs = 0x100000; offs < maxSize; offs += 0x200000)  in matroxfb_getmemory()
1307 		mga_writeb(vm, offs, 0x02);  in matroxfb_getmemory()
1308 	mga_outb(M_CACHEFLUSH, 0x00);  in matroxfb_getmemory()
1309 	for (offs = 0x100000; offs < maxSize; offs += 0x200000) {  in matroxfb_getmemory()
1310 		if (mga_readb(vm, offs) != 0x02)  in matroxfb_getmemory()
1312 		mga_writeb(vm, offs, mga_readb(vm, offs) - 0x02);  in matroxfb_getmemory()
1317 	for (offs2 = 0x100000; offs2 < maxSize; offs2 += 0x200000)  in matroxfb_getmemory()
1320 	mga_outb(M_EXTVGA_INDEX, 0x03);  in matroxfb_getmemory()
1323 	*realSize = offs - 0x100000;  in matroxfb_getmemory()
1325 	minfo->interleave = !(!isMillenium(minfo) || ((offs - 0x100000) & 0x3FFFFF));  in matroxfb_getmemory()
1338 	.maxvram = 0x0800000,
1339 	.maxdisplayable = 0x0800000,
1345 	.maxvram = 0x1000000,
1346 	.maxdisplayable = 0x0800000,
1352 	.maxvram = 0x1000000,
1353 	.maxdisplayable = 0x0800000,
1360 	.maxvram = 0x0800000,
1361 	.maxdisplayable = 0x0800000,
1368 	.maxvram = 0x0800000,
1369 	.maxdisplayable = 0x0800000,
1375 	.maxvram = 0x1000000,
1376 	.maxdisplayable = 0x1000000,
1381 	.maxvram = 0x100000,
1382 	.maxdisplayable = 0x800000,
1389 	.maxvram = 0x2000000,
1390 	.maxdisplayable = 0x1000000,
1396 #define DEVF_VIDEO64BIT		0x0001
1397 #define	DEVF_SWAPS		0x0002
1398 #define DEVF_SRCORG		0x0004
1399 #define DEVF_DUALHEAD		0x0008
1400 #define DEVF_CROSS4MB		0x0010
1401 #define DEVF_TEXT4B		0x0020
1402 /* #define DEVF_recycled	0x0040	*/
1403 /* #define DEVF_recycled	0x0080	*/
1404 #define DEVF_SUPPORT32MB	0x0100
1405 #define DEVF_ANY_VXRES		0x0200
1406 #define DEVF_TEXT16B		0x0400
1407 #define DEVF_CRTC2		0x0800
1408 #define DEVF_MAVEN_CAPABLE	0x1000
1409 #define DEVF_PANELLINK_CAPABLE	0x2000
1410 #define DEVF_G450DAC		0x4000
1430 	{PCI_VENDOR_ID_MATROX,	PCI_DEVICE_ID_MATROX_MIL,	0xFF,
1431 		0,			0,
1437 	{PCI_VENDOR_ID_MATROX,	PCI_DEVICE_ID_MATROX_MIL_2,	0xFF,
1438 		0,			0,
1444 	{PCI_VENDOR_ID_MATROX,	PCI_DEVICE_ID_MATROX_MIL_2_AGP,	0xFF,
1445 		0,			0,
1453 	{PCI_VENDOR_ID_MATROX,	PCI_DEVICE_ID_MATROX_MYS,	0x02,
1454 		0,			0,
1460 	{PCI_VENDOR_ID_MATROX,	PCI_DEVICE_ID_MATROX_MYS,	0xFF,
1461 		0,			0,
1467 	{PCI_VENDOR_ID_MATROX,	PCI_DEVICE_ID_MATROX_MYS_AGP,	0x02,
1468 		0,			0,
1474 	{PCI_VENDOR_ID_MATROX,	PCI_DEVICE_ID_MATROX_MYS_AGP,	0xFF,
1475 		0,			0,
1483 	{PCI_VENDOR_ID_MATROX,	PCI_DEVICE_ID_MATROX_G100_MM,	0xFF,
1484 		0,			0,
1490 	{PCI_VENDOR_ID_MATROX,	PCI_DEVICE_ID_MATROX_G100_AGP,	0xFF,
1491 		0,			0,
1497 	{PCI_VENDOR_ID_MATROX,	PCI_DEVICE_ID_MATROX_G200_PCI,	0xFF,
1498 		0,			0,
1504 	{PCI_VENDOR_ID_MATROX,	0x0532,	0xFF,
1505 		0,			0,
1511 	{PCI_VENDOR_ID_MATROX,	PCI_DEVICE_ID_MATROX_G200_AGP,	0xFF,
1518 	{PCI_VENDOR_ID_MATROX,	PCI_DEVICE_ID_MATROX_G200_AGP,	0xFF,
1525 	{PCI_VENDOR_ID_MATROX,	PCI_DEVICE_ID_MATROX_G200_AGP,	0xFF,
1532 	{PCI_VENDOR_ID_MATROX,	PCI_DEVICE_ID_MATROX_G200_AGP,	0xFF,
1539 	{PCI_VENDOR_ID_MATROX,	PCI_DEVICE_ID_MATROX_G200_AGP,	0xFF,
1546 	{PCI_VENDOR_ID_MATROX,	PCI_DEVICE_ID_MATROX_G200_AGP,	0xFF,
1547 		0,			0,
1553 	{PCI_VENDOR_ID_MATROX,	PCI_DEVICE_ID_MATROX_G400,	0x80,
1560 	{PCI_VENDOR_ID_MATROX,	PCI_DEVICE_ID_MATROX_G400,	0x80,
1561 		0,			0,
1567 	{PCI_VENDOR_ID_MATROX,	PCI_DEVICE_ID_MATROX_G400,	0xFF,
1568 		0,			0,
1574 	{PCI_VENDOR_ID_MATROX,	PCI_DEVICE_ID_MATROX_G550,	0xFF,
1575 		0,			0,
1582 	{0,			0,				0xFF,
1583 		0,			0,
1584 		0,
1585 		0,
1586 		0,
1594 	0, FB_VMODE_NONINTERLACED
1597 static int hotplug = 0;
1605 	minfo->outputs[0].default_src = MATROXFB_SRC_CRTC1;  in setDefaultOutputs()
1613 	for (i = 0; i < MATROXFB_MAX_OUTPUTS; i++) {  in setDefaultOutputs()
1616 		if (c == 0) {  in setDefaultOutputs()
1619 		if (c == '0') {  in setDefaultOutputs()
1631 	outputs[0] = 0;  in setDefaultOutputs()
1636 	unsigned long ctrlptr_phys = 0;  in initMatrox2()
1637 	unsigned long video_base_phys = 0;  in initMatrox2()
1673 	minfo->devflags.support32MB = (b->flags & DEVF_SUPPORT32MB) != 0;  in initMatrox2()
1675 	minfo->devflags.crtc2 = (b->flags & DEVF_CRTC2) != 0;  in initMatrox2()
1676 	minfo->devflags.maven_capable = (b->flags & DEVF_MAVEN_CAPABLE) != 0;  in initMatrox2()
1677 	minfo->devflags.dualhead = (b->flags & DEVF_DUALHEAD) != 0;  in initMatrox2()
1679 	minfo->devflags.g450dac = (b->flags & DEVF_G450DAC) != 0;  in initMatrox2()
1691 	if (minfo->capable.cross4MB < 0)  in initMatrox2()
1695 		video_base_phys = pci_resource_start(minfo->pcidev, 0);  in initMatrox2()
1698 		ctrlptr_phys = pci_resource_start(minfo->pcidev, 0);  in initMatrox2()
1721 	if (mem < 0x00100000) mem *= 1024;  in initMatrox2()
1747 		mga_option &= 0x7FFFFFFF; /* clear BIG_ENDIAN */  in initMatrox2()
1752 			if (!(mga_option & 0x20000000) && !minfo->devflags.nopciretry) {  in initMatrox2()
1755 			mga_option |= 0x20000000;  in initMatrox2()
1764 		pci_write_config_dword(minfo->pcidev, PCI_MGA_INDEX, 0x00003C00);  in initMatrox2()
1778 	minfo->devflags.ydstorg = 0;  in initMatrox2()
1789 		request_region(0x3C0, 32, "matrox");  in initMatrox2()
1793 	minfo->fbcon.monspecs.hfmin = 0;  in initMatrox2()
1795 	minfo->fbcon.monspecs.vfmin = 0;  in initMatrox2()
1797 	minfo->fbcon.monspecs.dpms = 0;	/* TBD */  in initMatrox2()
1805 	vesafb_defined.vmode = 0;  in initMatrox2()
1825 		fb_find_mode(&vesafb_defined, &minfo->fbcon, videomode[0] ? videomode : NULL,  in initMatrox2()
1826 			NULL, 0, &defaultmode, vesafb_defined.bits_per_pixel);  in initMatrox2()
1835 	if (left != ~0)  in initMatrox2()
1837 	if (right != ~0)  in initMatrox2()
1839 	if (upper != ~0)  in initMatrox2()
1841 	if (lower != ~0)  in initMatrox2()
1849 	else if (vesafb_defined.sync == ~0) {  in initMatrox2()
1850 		vesafb_defined.sync = 0;  in initMatrox2()
1864 			if ((tmp < fh) || (fh == 0)) fh = tmp;  in initMatrox2()
1869 			if ((tmp < maxclk) || (maxclk == 0)) maxclk = tmp;  in initMatrox2()
1891 		if (default_vmode <= 0 || default_vmode > VMODE_MAX)  in initMatrox2()
1901 			var.xoffset = var.yoffset = 0;  in initMatrox2()
1929 	printk(KERN_INFO "matroxfb: framebuffer at 0x%lX, mapped to 0x%p, size %d\n",  in initMatrox2()
1932 /* We do not have to set currcon to 0... register_framebuffer do it for us on first console  in initMatrox2()
1933  * and we do not want currcon == 0 for subsequent framebuffers */  in initMatrox2()
1936 	if (register_framebuffer(&minfo->fbcon) < 0) {  in initMatrox2()
1951 	return 0;  in initMatrox2()
1985 	return 0;  in matroxfb_register_driver()
1995 		for (i = 0; i < minfo->drivers_count; ) {  in matroxfb_unregister_driver()
2009 	int i = 0;  in matroxfb_register_device()
2031 	for (i = 0; i < minfo->drivers_count; i++) {  in matroxfb_unregister_device()
2063 	if (dev > 0) {  in matroxfb_probe()
2078 	minfo->dead = 0;  in matroxfb_probe()
2079 	minfo->usecount = 0;  in matroxfb_probe()
2080 	minfo->userusecount = 0;  in matroxfb_probe()
2086 		noinit = 0;  in matroxfb_probe()
2094 		noinit = 0;  in matroxfb_probe()
2098 		minfo->devflags.noinit = 0;  in matroxfb_probe()
2112 	minfo->irq_flags = 0;  in matroxfb_probe()
2120 		return 0;  in matroxfb_probe()
2136 		PCI_ANY_ID,	PCI_ANY_ID,	0, 0, 0},
2138 		PCI_ANY_ID,	PCI_ANY_ID,	0, 0, 0},
2140 		PCI_ANY_ID,	PCI_ANY_ID,	0, 0, 0},
2144 		PCI_ANY_ID,	PCI_ANY_ID,	0, 0, 0},
2148 		PCI_ANY_ID,	PCI_ANY_ID,	0, 0, 0},
2150 		PCI_ANY_ID,	PCI_ANY_ID,	0, 0, 0},
2152 		PCI_ANY_ID,	PCI_ANY_ID,	0, 0, 0},
2153 	{PCI_VENDOR_ID_MATROX,	0x0532,
2154 		PCI_ANY_ID,	PCI_ANY_ID,	0, 0, 0},
2156 		PCI_ANY_ID,	PCI_ANY_ID,	0, 0, 0},
2158 		PCI_ANY_ID,	PCI_ANY_ID,	0, 0, 0},
2160 		PCI_ANY_ID,	PCI_ANY_ID,	0, 0, 0},
2162 	{0,			0,
2163 		0,		0,		0, 0, 0}
2178 #define RSResolution(X)	((X) & 0x0F)
2210 	{    0,    0,  ~0, ~0, ~0, ~0,   0, 0,  0 }
2216 	{    ~0, RSCreate(RSNoxNo,     RS8bpp ) },
2217 	{ 0x101, RSCreate(RS640x480,   RS8bpp ) },
2218 	{ 0x100, RSCreate(RS640x400,   RS8bpp ) },
2219 	{ 0x180, RSCreate(RS768x576,   RS8bpp ) },
2220 	{ 0x103, RSCreate(RS800x600,   RS8bpp ) },
2221 	{ 0x188, RSCreate(RS960x720,   RS8bpp ) },
2222 	{ 0x105, RSCreate(RS1024x768,  RS8bpp ) },
2223 	{ 0x190, RSCreate(RS1152x864,  RS8bpp ) },
2224 	{ 0x107, RSCreate(RS1280x1024, RS8bpp ) },
2225 	{ 0x198, RSCreate(RS1408x1056, RS8bpp ) },
2226 	{ 0x11C, RSCreate(RS1600x1200, RS8bpp ) },
2227 	{ 0x110, RSCreate(RS640x480,   RS15bpp) },
2228 	{ 0x181, RSCreate(RS768x576,   RS15bpp) },
2229 	{ 0x113, RSCreate(RS800x600,   RS15bpp) },
2230 	{ 0x189, RSCreate(RS960x720,   RS15bpp) },
2231 	{ 0x116, RSCreate(RS1024x768,  RS15bpp) },
2232 	{ 0x191, RSCreate(RS1152x864,  RS15bpp) },
2233 	{ 0x119, RSCreate(RS1280x1024, RS15bpp) },
2234 	{ 0x199, RSCreate(RS1408x1056, RS15bpp) },
2235 	{ 0x11D, RSCreate(RS1600x1200, RS15bpp) },
2236 	{ 0x111, RSCreate(RS640x480,   RS16bpp) },
2237 	{ 0x182, RSCreate(RS768x576,   RS16bpp) },
2238 	{ 0x114, RSCreate(RS800x600,   RS16bpp) },
2239 	{ 0x18A, RSCreate(RS960x720,   RS16bpp) },
2240 	{ 0x117, RSCreate(RS1024x768,  RS16bpp) },
2241 	{ 0x192, RSCreate(RS1152x864,  RS16bpp) },
2242 	{ 0x11A, RSCreate(RS1280x1024, RS16bpp) },
2243 	{ 0x19A, RSCreate(RS1408x1056, RS16bpp) },
2244 	{ 0x11E, RSCreate(RS1600x1200, RS16bpp) },
2245 	{ 0x1B2, RSCreate(RS640x480,   RS24bpp) },
2246 	{ 0x184, RSCreate(RS768x576,   RS24bpp) },
2247 	{ 0x1B5, RSCreate(RS800x600,   RS24bpp) },
2248 	{ 0x18C, RSCreate(RS960x720,   RS24bpp) },
2249 	{ 0x1B8, RSCreate(RS1024x768,  RS24bpp) },
2250 	{ 0x194, RSCreate(RS1152x864,  RS24bpp) },
2251 	{ 0x1BB, RSCreate(RS1280x1024, RS24bpp) },
2252 	{ 0x19C, RSCreate(RS1408x1056, RS24bpp) },
2253 	{ 0x1BF, RSCreate(RS1600x1200, RS24bpp) },
2254 	{ 0x112, RSCreate(RS640x480,   RS32bpp) },
2255 	{ 0x183, RSCreate(RS768x576,   RS32bpp) },
2256 	{ 0x115, RSCreate(RS800x600,   RS32bpp) },
2257 	{ 0x18B, RSCreate(RS960x720,   RS32bpp) },
2258 	{ 0x118, RSCreate(RS1024x768,  RS32bpp) },
2259 	{ 0x193, RSCreate(RS1152x864,  RS32bpp) },
2260 	{ 0x11B, RSCreate(RS1280x1024, RS32bpp) },
2261 	{ 0x19B, RSCreate(RS1408x1056, RS32bpp) },
2262 	{ 0x11F, RSCreate(RS1600x1200, RS32bpp) },
2263 	{ 0x010, RSCreate(RS640x350,   RS4bpp ) },
2264 	{ 0x012, RSCreate(RS640x480,   RS4bpp ) },
2265 	{ 0x102, RSCreate(RS800x600,   RS4bpp ) },
2266 	{ 0x104, RSCreate(RS1024x768,  RS4bpp ) },
2267 	{ 0x106, RSCreate(RS1280x1024, RS4bpp ) },
2268 	{     0, 0				}};
2278 	if (vesa != ~0)  in matroxfb_init_params()
2279 		vesa &= 0x1DFF;		/* mask out clearscreen, acceleration and so on */  in matroxfb_init_params()
2286 		printk(KERN_ERR "Invalid vesa mode 0x%04X\n", vesa);  in matroxfb_init_params()
2291 		if (left == ~0)  in matroxfb_init_params()
2295 		if (right == ~0)  in matroxfb_init_params()
2299 		if (upper == ~0)  in matroxfb_init_params()
2303 		if (lower == ~0)  in matroxfb_init_params()
2339 		return 0;  in matroxfb_setup()
2347 			dev = simple_strtoul(this_opt+4, NULL, 0);  in matroxfb_setup()
2349 			switch (simple_strtoul(this_opt+6, NULL, 0)) {  in matroxfb_setup()
2350 				case 0: depth = RSText; break;  in matroxfb_setup()
2361 			xres = simple_strtoul(this_opt+5, NULL, 0);  in matroxfb_setup()
2363 			yres = simple_strtoul(this_opt+5, NULL, 0);  in matroxfb_setup()
2365 			vslen = simple_strtoul(this_opt+6, NULL, 0);  in matroxfb_setup()
2367 			hslen = simple_strtoul(this_opt+6, NULL, 0);  in matroxfb_setup()
2369 			left = simple_strtoul(this_opt+5, NULL, 0);  in matroxfb_setup()
2371 			right = simple_strtoul(this_opt+6, NULL, 0);  in matroxfb_setup()
2373 			upper = simple_strtoul(this_opt+6, NULL, 0);  in matroxfb_setup()
2375 			lower = simple_strtoul(this_opt+6, NULL, 0);  in matroxfb_setup()
2377 			pixclock = simple_strtoul(this_opt+9, NULL, 0);  in matroxfb_setup()
2379 			sync = simple_strtoul(this_opt+5, NULL, 0);  in matroxfb_setup()
2381 			vesa = simple_strtoul(this_opt+5, NULL, 0);  in matroxfb_setup()
2383 			maxclk = simple_strtoul(this_opt+7, NULL, 0);  in matroxfb_setup()
2385 			fh = simple_strtoul(this_opt+3, NULL, 0);  in matroxfb_setup()
2387 			fv = simple_strtoul(this_opt+3, NULL, 0);  in matroxfb_setup()
2389 			mem = simple_strtoul(this_opt+4, NULL, 0);  in matroxfb_setup()
2395 			dfp_type = simple_strtoul(this_opt+4, NULL, 0);  in matroxfb_setup()
2400 			unsigned int vmode = simple_strtoul(this_opt+6, NULL, 0);  in matroxfb_setup()
2401 			if (vmode > 0 && vmode <= VMODE_MAX)  in matroxfb_setup()
2404 			unsigned int cmode = simple_strtoul(this_opt+6, NULL, 0);  in matroxfb_setup()
2406 				case 0:  in matroxfb_setup()
2424 			disabled = 0;  in matroxfb_setup()
2428 			sgram = 0;  in matroxfb_setup()
2430 			memtype = simple_strtoul(this_opt+8, NULL, 0);  in matroxfb_setup()
2435 				value = 0;  in matroxfb_setup()
2467 	return 0;  in matroxfb_setup()
2470 static int __initdata initialized = 0;
2475 	int err = 0;  in matroxfb_init()
2502 module_param(mem, int, 0);
2504 module_param(disabled, int, 0);
2505 MODULE_PARM_DESC(disabled, "Disabled (0 or 1=disabled) (default=0)");
2506 module_param(noaccel, int, 0);
2507 MODULE_PARM_DESC(noaccel, "Do not use accelerating engine (0 or 1=disabled) (default=0)");
2508 module_param(nopan, int, 0);
2509 MODULE_PARM_DESC(nopan, "Disable pan on startup (0 or 1=disabled) (default=0)");
2510 module_param(no_pci_retry, int, 0);
2511 MODULE_PARM_DESC(no_pci_retry, "PCI retries enabled (0 or 1=disabled) (default=0)");
2512 module_param(novga, int, 0);
2513 MODULE_PARM_DESC(novga, "VGA I/O (0x3C0-0x3DF) disabled (0 or 1=disabled) (default=0)");
2514 module_param(nobios, int, 0);
2515 MODULE_PARM_DESC(nobios, "Disables ROM BIOS (0 or 1=disabled) (default=do not change BIOS state)");
2516 module_param(noinit, int, 0);
2517 …t, "Disables W/SG/SD-RAM and bus interface initialization (0 or 1=do not initialize) (default=0)");
2518 module_param(memtype, int, 0);
2519 …r G200/G400 (see Documentation/fb/matroxfb.rst for explanation) (default=3 for G200, 0 for G400)");
2520 module_param(mtrr, int, 0);
2521 MODULE_PARM_DESC(mtrr, "This speeds up video memory accesses (0=disabled or 1) (default=1)");
2522 module_param(sgram, int, 0);
2523 …_PARM_DESC(sgram, "Indicates that G100/G200/G400 has SGRAM memory (0=SDRAM, 1=SGRAM) (default=0)");
2524 module_param(inv24, int, 0);
2526 module_param(inverse, int, 0);
2527 MODULE_PARM_DESC(inverse, "Inverse (0 or 1) (default=0)");
2528 module_param(dev, int, 0);
2529 MODULE_PARM_DESC(dev, "Multihead support, attach to device ID (0..N) (default=all working)");
2530 module_param(vesa, int, 0);
2531 MODULE_PARM_DESC(vesa, "Startup videomode (0x000-0x1FF) (default=0x101)");
2532 module_param(xres, int, 0);
2534 module_param(yres, int, 0);
2536 module_param(upper, int, 0);
2538 module_param(lower, int, 0);
2540 module_param(vslen, int, 0);
2542 module_param(left, int, 0);
2544 module_param(right, int, 0);
2546 module_param(hslen, int, 0);
2548 module_param(pixclock, int, 0);
2550 module_param(sync, int, 0);
2552 module_param(depth, int, 0);
2553 MODULE_PARM_DESC(depth, "Color depth (0=text,8,15,16,24,32) (default=vesa)");
2554 module_param(maxclk, int, 0);
2555 MODULE_PARM_DESC(maxclk, "Startup maximal clock, 0-999MHz, 1000-999999kHz, 1000000-INF Hz");
2556 module_param(fh, int, 0);
2557 MODULE_PARM_DESC(fh, "Startup horizontal frequency, 0-999kHz, 1000-INF Hz");
2558 module_param(fv, int, 0);
2559 MODULE_PARM_DESC(fv, "Startup vertical frequency, 0-INF Hz\n"
2561 module_param(grayscale, int, 0);
2563 module_param(cross4MB, int, 0);
2565 module_param(dfp, int, 0);
2566 …SC(dfp, "Specifies whether to use digital flat panel interface of G200/G400 (0 or 1) (default=0)");
2567 module_param(dfp_type, int, 0);
2568 MODULE_PARM_DESC(dfp_type, "Specifies DFP interface type (0 to 255) (default=read from hardware)");
2569 module_param_string(outputs, outputs, sizeof(outputs), 0);
2570 …RTC is mapped to which output (string of up to three letters, consisting of 0 (disabled), 1 (CRTC1…
2572 module_param_named(vmode, default_vmode, int, 0);
2574 module_param_named(cmode, default_cmode, int, 0);
2585 	if (depth == 0)  in matroxfb_init()
2605 	return 0;  in matroxfb_init()