Lines Matching refs:p_setd
392 static inline void p_setd(struct perm_bits *p, int off, u32 virt, u32 write) in p_setd() function
678 p_setd(perm, PCI_BASE_ADDRESS_0, ALL_VIRT, ALL_WRITE); in init_pci_cap_basic_perm()
679 p_setd(perm, PCI_BASE_ADDRESS_1, ALL_VIRT, ALL_WRITE); in init_pci_cap_basic_perm()
680 p_setd(perm, PCI_BASE_ADDRESS_2, ALL_VIRT, ALL_WRITE); in init_pci_cap_basic_perm()
681 p_setd(perm, PCI_BASE_ADDRESS_3, ALL_VIRT, ALL_WRITE); in init_pci_cap_basic_perm()
682 p_setd(perm, PCI_BASE_ADDRESS_4, ALL_VIRT, ALL_WRITE); in init_pci_cap_basic_perm()
683 p_setd(perm, PCI_BASE_ADDRESS_5, ALL_VIRT, ALL_WRITE); in init_pci_cap_basic_perm()
684 p_setd(perm, PCI_ROM_ADDRESS, ALL_VIRT, ALL_WRITE); in init_pci_cap_basic_perm()
778 p_setd(perm, PCI_PM_CTRL, in init_pci_cap_pm_perm()
849 p_setd(perm, PCI_VPD_DATA, ALL_VIRT, ALL_WRITE); in init_pci_cap_vpd_perm()
864 p_setd(perm, PCI_X_ECC_CSR, NO_VIRT, ALL_WRITE); in init_pci_cap_pcix_perm()
1014 p_setd(perm, 0, ALL_VIRT, NO_WRITE); in init_pci_ext_cap_err_perm()
1034 p_setd(perm, PCI_ERR_UNCOR_STATUS, NO_VIRT, mask); in init_pci_ext_cap_err_perm()
1035 p_setd(perm, PCI_ERR_UNCOR_MASK, NO_VIRT, mask); in init_pci_ext_cap_err_perm()
1036 p_setd(perm, PCI_ERR_UNCOR_SEVER, NO_VIRT, mask); in init_pci_ext_cap_err_perm()
1046 p_setd(perm, PCI_ERR_COR_STATUS, NO_VIRT, mask); in init_pci_ext_cap_err_perm()
1047 p_setd(perm, PCI_ERR_COR_MASK, NO_VIRT, mask); in init_pci_ext_cap_err_perm()
1051 p_setd(perm, PCI_ERR_CAP, NO_VIRT, mask); in init_pci_ext_cap_err_perm()
1061 p_setd(perm, 0, ALL_VIRT, NO_WRITE); in init_pci_ext_cap_pwr_perm()
1209 p_setd(perm, PCI_MSI_ADDRESS_LO, ALL_VIRT, ALL_WRITE); in init_pci_cap_msi_perm()
1211 p_setd(perm, PCI_MSI_ADDRESS_HI, ALL_VIRT, ALL_WRITE); in init_pci_cap_msi_perm()
1214 p_setd(perm, PCI_MSI_MASK_64, NO_VIRT, ALL_WRITE); in init_pci_cap_msi_perm()
1215 p_setd(perm, PCI_MSI_PENDING_64, NO_VIRT, ALL_WRITE); in init_pci_cap_msi_perm()
1220 p_setd(perm, PCI_MSI_MASK_32, NO_VIRT, ALL_WRITE); in init_pci_cap_msi_perm()
1221 p_setd(perm, PCI_MSI_PENDING_32, NO_VIRT, ALL_WRITE); in init_pci_cap_msi_perm()