120 #define	ALL_WRITE	0xFFFFFFFFU  macro
667 	p_setw(perm, PCI_COMMAND, PCI_COMMAND_INTX_DISABLE, (u16)ALL_WRITE);  in init_pci_cap_basic_perm()
673 	p_setb(perm, PCI_CACHE_LINE_SIZE, NO_VIRT, (u8)ALL_WRITE);  in init_pci_cap_basic_perm()
674 	p_setb(perm, PCI_LATENCY_TIMER, NO_VIRT, (u8)ALL_WRITE);  in init_pci_cap_basic_perm()
675 	p_setb(perm, PCI_BIST, NO_VIRT, (u8)ALL_WRITE);  in init_pci_cap_basic_perm()
678 	p_setd(perm, PCI_BASE_ADDRESS_0, ALL_VIRT, ALL_WRITE);  in init_pci_cap_basic_perm()
679 	p_setd(perm, PCI_BASE_ADDRESS_1, ALL_VIRT, ALL_WRITE);  in init_pci_cap_basic_perm()
680 	p_setd(perm, PCI_BASE_ADDRESS_2, ALL_VIRT, ALL_WRITE);  in init_pci_cap_basic_perm()
681 	p_setd(perm, PCI_BASE_ADDRESS_3, ALL_VIRT, ALL_WRITE);  in init_pci_cap_basic_perm()
682 	p_setd(perm, PCI_BASE_ADDRESS_4, ALL_VIRT, ALL_WRITE);  in init_pci_cap_basic_perm()
683 	p_setd(perm, PCI_BASE_ADDRESS_5, ALL_VIRT, ALL_WRITE);  in init_pci_cap_basic_perm()
684 	p_setd(perm, PCI_ROM_ADDRESS, ALL_VIRT, ALL_WRITE);  in init_pci_cap_basic_perm()
690 	p_setb(perm, PCI_INTERRUPT_LINE, (u8)ALL_VIRT, (u8)ALL_WRITE);  in init_pci_cap_basic_perm()
848 	p_setw(perm, PCI_VPD_ADDR, (u16)ALL_VIRT, (u16)ALL_WRITE);  in init_pci_cap_vpd_perm()
849 	p_setd(perm, PCI_VPD_DATA, ALL_VIRT, ALL_WRITE);  in init_pci_cap_vpd_perm()
863 	p_setw(perm, PCI_X_CMD, NO_VIRT, (u16)ALL_WRITE);  in init_pci_cap_pcix_perm()
864 	p_setd(perm, PCI_X_ECC_CSR, NO_VIRT, ALL_WRITE);  in init_pci_cap_pcix_perm()
1064 	p_setb(perm, PCI_PWR_DATA, NO_VIRT, (u8)ALL_WRITE);  in init_pci_ext_cap_pwr_perm()
1208 	p_setb(perm, PCI_MSI_FLAGS, (u8)ALL_VIRT, (u8)ALL_WRITE);  in init_pci_cap_msi_perm()
1209 	p_setd(perm, PCI_MSI_ADDRESS_LO, ALL_VIRT, ALL_WRITE);  in init_pci_cap_msi_perm()
1211 		p_setd(perm, PCI_MSI_ADDRESS_HI, ALL_VIRT, ALL_WRITE);  in init_pci_cap_msi_perm()
1212 		p_setw(perm, PCI_MSI_DATA_64, (u16)ALL_VIRT, (u16)ALL_WRITE);  in init_pci_cap_msi_perm()
1214 			p_setd(perm, PCI_MSI_MASK_64, NO_VIRT, ALL_WRITE);  in init_pci_cap_msi_perm()
1215 			p_setd(perm, PCI_MSI_PENDING_64, NO_VIRT, ALL_WRITE);  in init_pci_cap_msi_perm()
1218 		p_setw(perm, PCI_MSI_DATA_32, (u16)ALL_VIRT, (u16)ALL_WRITE);  in init_pci_cap_msi_perm()
1220 			p_setd(perm, PCI_MSI_MASK_32, NO_VIRT, ALL_WRITE);  in init_pci_cap_msi_perm()
1221 			p_setd(perm, PCI_MSI_PENDING_32, NO_VIRT, ALL_WRITE);  in init_pci_cap_msi_perm()