Lines Matching +full:set +full:- +full:of +full:- +full:ports
1 // SPDX-License-Identifier: GPL-2.0
17 #include "xhci-trace.h"
23 /* Default sublink speed attribute of each lane */
53 bos->bLength = USB_DT_BOS_SIZE; in xhci_create_usb3x_bos_desc()
54 bos->bDescriptorType = USB_DT_BOS; in xhci_create_usb3x_bos_desc()
55 bos->wTotalLength = cpu_to_le16(USB_DT_BOS_SIZE + in xhci_create_usb3x_bos_desc()
57 bos->bNumDeviceCaps = 1; in xhci_create_usb3x_bos_desc()
60 for (i = 0; i < xhci->num_port_caps; i++) { in xhci_create_usb3x_bos_desc()
61 u8 major = xhci->port_caps[i].maj_rev; in xhci_create_usb3x_bos_desc()
62 u8 minor = xhci->port_caps[i].min_rev; in xhci_create_usb3x_bos_desc()
67 port_cap = &xhci->port_caps[i]; in xhci_create_usb3x_bos_desc()
72 if (port_cap->psi_count) { in xhci_create_usb3x_bos_desc()
75 for (i = 0; i < port_cap->psi_count; i++) { in xhci_create_usb3x_bos_desc()
76 if ((port_cap->psi[i] & PLT_MASK) == PLT_SYM) in xhci_create_usb3x_bos_desc()
80 ssac = port_cap->psi_count + num_sym_ssa - 1; in xhci_create_usb3x_bos_desc()
81 ssic = port_cap->psi_uid_count - 1; in xhci_create_usb3x_bos_desc()
88 ssic = (ssac + 1) / 2 - 1; in xhci_create_usb3x_bos_desc()
91 bos->bNumDeviceCaps++; in xhci_create_usb3x_bos_desc()
92 bos->wTotalLength = cpu_to_le16(USB_DT_BOS_SIZE + in xhci_create_usb3x_bos_desc()
102 ss_cap->bLength = USB_DT_USB_SS_CAP_SIZE; in xhci_create_usb3x_bos_desc()
103 ss_cap->bDescriptorType = USB_DT_DEVICE_CAPABILITY; in xhci_create_usb3x_bos_desc()
104 ss_cap->bDevCapabilityType = USB_SS_CAP_TYPE; in xhci_create_usb3x_bos_desc()
105 ss_cap->bmAttributes = 0; /* set later */ in xhci_create_usb3x_bos_desc()
106 ss_cap->wSpeedSupported = cpu_to_le16(USB_5GBPS_OPERATION); in xhci_create_usb3x_bos_desc()
107 ss_cap->bFunctionalitySupport = USB_LOW_SPEED_OPERATION; in xhci_create_usb3x_bos_desc()
108 ss_cap->bU1devExitLat = 0; /* set later */ in xhci_create_usb3x_bos_desc()
109 ss_cap->bU2DevExitLat = 0; /* set later */ in xhci_create_usb3x_bos_desc()
111 reg = readl(&xhci->cap_regs->hcc_params); in xhci_create_usb3x_bos_desc()
113 ss_cap->bmAttributes |= USB_LTM_SUPPORT; in xhci_create_usb3x_bos_desc()
115 if ((xhci->quirks & XHCI_LPM_SUPPORT)) { in xhci_create_usb3x_bos_desc()
116 reg = readl(&xhci->cap_regs->hcs_params3); in xhci_create_usb3x_bos_desc()
117 ss_cap->bU1devExitLat = HCS_U1_LATENCY(reg); in xhci_create_usb3x_bos_desc()
118 ss_cap->bU2DevExitLat = cpu_to_le16(HCS_U2_LATENCY(reg)); in xhci_create_usb3x_bos_desc()
121 if (wLength < le16_to_cpu(bos->wTotalLength)) in xhci_create_usb3x_bos_desc()
125 return le16_to_cpu(bos->wTotalLength); in xhci_create_usb3x_bos_desc()
129 ssp_cap->bLength = USB_DT_USB_SSP_CAP_SIZE(ssac); in xhci_create_usb3x_bos_desc()
130 ssp_cap->bDescriptorType = USB_DT_DEVICE_CAPABILITY; in xhci_create_usb3x_bos_desc()
131 ssp_cap->bDevCapabilityType = USB_SSP_CAP_TYPE; in xhci_create_usb3x_bos_desc()
132 ssp_cap->bReserved = 0; in xhci_create_usb3x_bos_desc()
133 ssp_cap->wReserved = 0; in xhci_create_usb3x_bos_desc()
134 ssp_cap->bmAttributes = in xhci_create_usb3x_bos_desc()
138 if (!port_cap->psi_count) { in xhci_create_usb3x_bos_desc()
140 ssp_cap->bmSublinkSpeedAttr[i] = in xhci_create_usb3x_bos_desc()
148 for (i = 0; i < port_cap->psi_count; i++) { in xhci_create_usb3x_bos_desc()
159 psi = port_cap->psi[i]; in xhci_create_usb3x_bos_desc()
169 /* Shift to Gbps and set SSP Link Protocol if 10Gpbs */ in xhci_create_usb3x_bos_desc()
178 /* Some host controllers don't set the link protocol for SSP */ in xhci_create_usb3x_bos_desc()
183 * PSIM and PSIE represent the total speed of PSI. The BOS in xhci_create_usb3x_bos_desc()
200 u32 prev = port_cap->psi[i - 1]; in xhci_create_usb3x_bos_desc()
226 ssp_cap->bmSublinkSpeedAttr[offset++] = cpu_to_le32(attr); in xhci_create_usb3x_bos_desc()
231 ssp_cap->bmSublinkSpeedAttr[offset++] = cpu_to_le32(attr); in xhci_create_usb3x_bos_desc()
236 ssp_cap->bmSublinkSpeedAttr[offset++] = cpu_to_le32(attr); in xhci_create_usb3x_bos_desc()
241 ssp_cap->bmSublinkSpeedAttr[offset++] = cpu_to_le32(attr); in xhci_create_usb3x_bos_desc()
246 ssp_cap->wFunctionalitySupport = in xhci_create_usb3x_bos_desc()
252 return le16_to_cpu(bos->wTotalLength); in xhci_create_usb3x_bos_desc()
256 struct usb_hub_descriptor *desc, int ports) in xhci_common_hub_descriptor() argument
260 desc->bHubContrCurrent = 0; in xhci_common_hub_descriptor()
262 desc->bNbrPorts = ports; in xhci_common_hub_descriptor()
264 /* Bits 1:0 - support per-port power switching, or power always on */ in xhci_common_hub_descriptor()
265 if (HCC_PPC(xhci->hcc_params)) in xhci_common_hub_descriptor()
269 /* Bit 2 - root hubs are not part of a compound device */ in xhci_common_hub_descriptor()
270 /* Bits 4:3 - individual port over current protection */ in xhci_common_hub_descriptor()
272 /* Bits 6:5 - no TTs in root ports */ in xhci_common_hub_descriptor()
273 /* Bit 7 - no port indicators */ in xhci_common_hub_descriptor()
274 desc->wHubCharacteristics = cpu_to_le16(temp); in xhci_common_hub_descriptor()
281 int ports; in xhci_usb2_hub_descriptor() local
288 rhub = &xhci->usb2_rhub; in xhci_usb2_hub_descriptor()
289 ports = rhub->num_ports; in xhci_usb2_hub_descriptor()
290 xhci_common_hub_descriptor(xhci, desc, ports); in xhci_usb2_hub_descriptor()
291 desc->bDescriptorType = USB_DT_HUB; in xhci_usb2_hub_descriptor()
292 temp = 1 + (ports / 8); in xhci_usb2_hub_descriptor()
293 desc->bDescLength = USB_DT_HUB_NONVAR_SIZE + 2 * temp; in xhci_usb2_hub_descriptor()
294 desc->bPwrOn2PwrGood = 10; /* xhci section 5.4.8 says 20ms */ in xhci_usb2_hub_descriptor()
297 * If the port doesn't exist within that byte, the bit is set to 0. in xhci_usb2_hub_descriptor()
300 for (i = 0; i < ports; i++) { in xhci_usb2_hub_descriptor()
301 portsc = readl(rhub->ports[i]->addr); in xhci_usb2_hub_descriptor()
306 /* This math is hairy because bit 0 of DeviceRemovable in xhci_usb2_hub_descriptor()
313 * ports on it. The USB 2.0 specification says that there are two in xhci_usb2_hub_descriptor()
314 * variable length fields at the end of the hub descriptor: in xhci_usb2_hub_descriptor()
316 * USB_MAXCHILDREN ports, we may need to use the DeviceRemovable array in xhci_usb2_hub_descriptor()
317 * to set PortPwrCtrlMask bits. PortPwrCtrlMask must always be set to in xhci_usb2_hub_descriptor()
319 * PortPwrCtrlMask) to 0xFF. Then we set the DeviceRemovable for each in xhci_usb2_hub_descriptor()
320 * set of ports that actually exist. in xhci_usb2_hub_descriptor()
322 memset(desc->u.hs.DeviceRemovable, 0xff, in xhci_usb2_hub_descriptor()
323 sizeof(desc->u.hs.DeviceRemovable)); in xhci_usb2_hub_descriptor()
324 memset(desc->u.hs.PortPwrCtrlMask, 0xff, in xhci_usb2_hub_descriptor()
325 sizeof(desc->u.hs.PortPwrCtrlMask)); in xhci_usb2_hub_descriptor()
327 for (i = 0; i < (ports + 1 + 7) / 8; i++) in xhci_usb2_hub_descriptor()
328 memset(&desc->u.hs.DeviceRemovable[i], port_removable[i], in xhci_usb2_hub_descriptor()
336 int ports; in xhci_usb3_hub_descriptor() local
342 rhub = &xhci->usb3_rhub; in xhci_usb3_hub_descriptor()
343 ports = rhub->num_ports; in xhci_usb3_hub_descriptor()
344 xhci_common_hub_descriptor(xhci, desc, ports); in xhci_usb3_hub_descriptor()
345 desc->bDescriptorType = USB_DT_SS_HUB; in xhci_usb3_hub_descriptor()
346 desc->bDescLength = USB_DT_SS_HUB_SIZE; in xhci_usb3_hub_descriptor()
347 desc->bPwrOn2PwrGood = 50; /* usb 3.1 may fail if less than 100ms */ in xhci_usb3_hub_descriptor()
352 desc->u.ss.bHubHdrDecLat = 0; in xhci_usb3_hub_descriptor()
353 desc->u.ss.wHubDelay = 0; in xhci_usb3_hub_descriptor()
357 for (i = 0; i < ports; i++) { in xhci_usb3_hub_descriptor()
358 portsc = readl(rhub->ports[i]->addr); in xhci_usb3_hub_descriptor()
363 desc->u.ss.DeviceRemovable = cpu_to_le16(port_removable); in xhci_usb3_hub_descriptor()
370 if (hcd->speed >= HCD_USB3) in xhci_hub_descriptor()
394 * connect status, over-current status, port speed, and device removable.
395 * connect status and port speed are also sticky - meaning they're in
414 * change bits: connect, PED, warm port reset changed (reserved zero for USB 2.0 ports),
415 * over-current, reset, link state, and L1 change
439 /* Save read-only status and port state */ in xhci_port_state_to_neutral()
445 * @port: The one-based port number from one of the two split roothubs.
456 if (!xhci->devs[i] || !xhci->devs[i]->udev) in xhci_find_slot_id_by_port()
458 speed = xhci->devs[i]->udev->speed; in xhci_find_slot_id_by_port()
459 if (((speed >= USB_SPEED_SUPER) == (hcd->speed >= HCD_USB3)) in xhci_find_slot_id_by_port()
460 && xhci->devs[i]->fake_port == port) { in xhci_find_slot_id_by_port()
473 * suspend will set to 1, if suspend bit need to set in command.
484 virt_dev = xhci->devs[slot_id]; in xhci_stop_device()
486 return -ENODEV; in xhci_stop_device()
492 return -ENOMEM; in xhci_stop_device()
494 spin_lock_irqsave(&xhci->lock, flags); in xhci_stop_device()
495 for (i = LAST_EP_INDEX; i > 0; i--) { in xhci_stop_device()
496 if (virt_dev->eps[i].ring && virt_dev->eps[i].ring->dequeue) { in xhci_stop_device()
500 ep_ctx = xhci_get_ep_ctx(xhci, virt_dev->out_ctx, i); in xhci_stop_device()
508 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_stop_device()
509 ret = -ENOMEM; in xhci_stop_device()
516 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_stop_device()
524 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_stop_device()
529 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_stop_device()
532 wait_for_completion(cmd->completion); in xhci_stop_device()
534 if (cmd->status == COMP_COMMAND_ABORTED || in xhci_stop_device()
535 cmd->status == COMP_COMMAND_RING_STOPPED) { in xhci_stop_device()
537 ret = -ETIME; in xhci_stop_device()
554 ep = &xhci->devs[slot_id]->eps[i]; in xhci_ring_device()
556 if (ep->ep_state & EP_HAS_STREAMS) { in xhci_ring_device()
557 for (s = 1; s < ep->stream_info->num_streams; s++) in xhci_ring_device()
559 } else if (ep->ring && ep->ring->dequeue) { in xhci_ring_device()
570 /* Don't allow the USB core to disable SuperSpeed ports. */ in xhci_disable_port()
571 if (hcd->speed >= HCD_USB3) { in xhci_disable_port()
577 if (xhci->quirks & XHCI_BROKEN_PORT_PED) { in xhci_disable_port()
586 xhci_dbg(xhci, "disable port %d-%d, portsc: 0x%x\n", in xhci_disable_port()
587 hcd->self.busnum, wIndex + 1, port_status); in xhci_disable_port()
611 port_change_bit = "over-current"; in xhci_clear_port_change_bit()
645 if (hcd->speed >= HCD_USB3) in xhci_get_rhub()
646 return &xhci->usb3_rhub; in xhci_get_rhub()
647 return &xhci->usb2_rhub; in xhci_get_rhub()
651 * xhci_set_port_power() must be called with xhci->lock held.
652 * It will release and re-aquire the lock while calling ACPI
657 __must_hold(&xhci->lock) in xhci_set_port_power()
664 port = rhub->ports[index]; in xhci_set_port_power()
665 temp = readl(port->addr); in xhci_set_port_power()
667 xhci_dbg(xhci, "set port power %d-%d %s, portsc: 0x%x\n", in xhci_set_port_power()
668 hcd->self.busnum, index + 1, on ? "ON" : "OFF", temp); in xhci_set_port_power()
674 writel(temp | PORT_POWER, port->addr); in xhci_set_port_power()
675 readl(port->addr); in xhci_set_port_power()
678 writel(temp & ~PORT_POWER, port->addr); in xhci_set_port_power()
681 spin_unlock_irqrestore(&xhci->lock, *flags); in xhci_set_port_power()
682 temp = usb_acpi_power_manageable(hcd->self.root_hub, in xhci_set_port_power()
685 usb_acpi_set_power_state(hcd->self.root_hub, in xhci_set_port_power()
687 spin_lock_irqsave(&xhci->lock, *flags); in xhci_set_port_power()
696 /* xhci only supports test mode for usb2 ports */ in xhci_port_set_test_mode()
697 port = xhci->usb2_rhub.ports[wIndex]; in xhci_port_set_test_mode()
698 temp = readl(port->addr + PORTPMSC); in xhci_port_set_test_mode()
700 writel(temp, port->addr + PORTPMSC); in xhci_port_set_test_mode()
701 xhci->test_mode = test_mode; in xhci_port_set_test_mode()
708 __must_hold(&xhci->lock) in xhci_enter_test_mode()
715 spin_unlock_irqrestore(&xhci->lock, *flags); in xhci_enter_test_mode()
716 for (i = 1; i <= HCS_MAX_SLOTS(xhci->hcs_params1); i++) { in xhci_enter_test_mode()
717 if (!xhci->devs[i]) in xhci_enter_test_mode()
726 spin_lock_irqsave(&xhci->lock, *flags); in xhci_enter_test_mode()
727 /* Put all ports to the Disable state by clear PP */ in xhci_enter_test_mode()
729 /* Power off USB3 ports*/ in xhci_enter_test_mode()
730 for (i = 0; i < xhci->usb3_rhub.num_ports; i++) in xhci_enter_test_mode()
732 /* Power off USB2 ports*/ in xhci_enter_test_mode()
733 for (i = 0; i < xhci->usb2_rhub.num_ports; i++) in xhci_enter_test_mode()
734 xhci_set_port_power(xhci, xhci->main_hcd, i, false, flags); in xhci_enter_test_mode()
741 pm_runtime_forbid(xhci_to_hcd(xhci)->self.controller); in xhci_enter_test_mode()
742 /* Set PORTPMSC.PTC field to enter selected test mode */ in xhci_enter_test_mode()
754 if (!xhci->test_mode) { in xhci_exit_test_mode()
758 if (xhci->test_mode == USB_TEST_FORCE_ENABLE && in xhci_exit_test_mode()
759 !(xhci->xhc_state & XHCI_STATE_HALTED)) { in xhci_exit_test_mode()
764 pm_runtime_allow(xhci_to_hcd(xhci)->self.controller); in xhci_exit_test_mode()
765 xhci->test_mode = 0; in xhci_exit_test_mode()
775 portsc = readl(port->addr); in xhci_set_link_state()
779 writel(temp, port->addr); in xhci_set_link_state()
781 xhci_dbg(xhci, "Set port %d-%d link state, portsc: 0x%x, write 0x%x", in xhci_set_link_state()
782 port->rhub->hcd->self.busnum, port->hcd_portnum + 1, in xhci_set_link_state()
791 temp = readl(port->addr); in xhci_set_remote_wake_mask()
809 writel(temp, port->addr); in xhci_set_remote_wake_mask()
818 temp = readl(port->addr); in xhci_test_and_clear_bit()
822 writel(temp, port->addr); in xhci_test_and_clear_bit()
832 /* When the CAS bit is set then warm reset in xhci_hub_report_usb3_link_state()
836 /* The CAS bit can be set while the port is in xhci_hub_report_usb3_link_state()
847 /* Return also connection bit - in xhci_hub_report_usb3_link_state()
849 * when this bit is set. in xhci_hub_report_usb3_link_state()
864 * If CAS bit isn't set but the Port is already at in xhci_hub_report_usb3_link_state()
869 * caused by a delay on the host-device negotiation. in xhci_hub_report_usb3_link_state()
871 if ((xhci->quirks & XHCI_COMP_MODE_QUIRK) && in xhci_hub_report_usb3_link_state()
883 * This Function verifies if all xhc USB3 ports have entered U0, if so,
890 u32 all_ports_seen_u0 = ((1 << xhci->usb3_rhub.num_ports) - 1); in xhci_del_comp_mod_timer()
893 if (!(xhci->quirks & XHCI_COMP_MODE_QUIRK)) in xhci_del_comp_mod_timer()
896 if ((xhci->port_status_u0 != all_ports_seen_u0) && port_in_u0) { in xhci_del_comp_mod_timer()
897 xhci->port_status_u0 |= 1 << wIndex; in xhci_del_comp_mod_timer()
898 if (xhci->port_status_u0 == all_ports_seen_u0) { in xhci_del_comp_mod_timer()
899 del_timer_sync(&xhci->comp_mode_recovery_timer); in xhci_del_comp_mod_timer()
901 "All USB3 ports have entered U0 already!"); in xhci_del_comp_mod_timer()
918 hcd = port->rhub->hcd; in xhci_handle_usb2_port_link_resume()
919 bus_state = &port->rhub->bus_state; in xhci_handle_usb2_port_link_resume()
921 wIndex = port->hcd_portnum; in xhci_handle_usb2_port_link_resume()
925 return -EINVAL; in xhci_handle_usb2_port_link_resume()
928 if (!bus_state->resume_done[wIndex]) { in xhci_handle_usb2_port_link_resume()
930 if (test_bit(wIndex, &bus_state->resuming_ports)) { in xhci_handle_usb2_port_link_resume()
944 set_bit(wIndex, &bus_state->resuming_ports); in xhci_handle_usb2_port_link_resume()
945 bus_state->resume_done[wIndex] = timeout; in xhci_handle_usb2_port_link_resume()
946 mod_timer(&hcd->rh_timer, timeout); in xhci_handle_usb2_port_link_resume()
947 usb_hcd_start_port_resume(&hcd->self, wIndex); in xhci_handle_usb2_port_link_resume()
950 } else if (time_after_eq(jiffies, bus_state->resume_done[wIndex])) { in xhci_handle_usb2_port_link_resume()
953 xhci_dbg(xhci, "resume USB2 port %d-%d\n", in xhci_handle_usb2_port_link_resume()
954 hcd->self.busnum, wIndex + 1); in xhci_handle_usb2_port_link_resume()
956 bus_state->resume_done[wIndex] = 0; in xhci_handle_usb2_port_link_resume()
957 clear_bit(wIndex, &bus_state->resuming_ports); in xhci_handle_usb2_port_link_resume()
959 set_bit(wIndex, &bus_state->rexit_ports); in xhci_handle_usb2_port_link_resume()
964 spin_unlock_irqrestore(&xhci->lock, *flags); in xhci_handle_usb2_port_link_resume()
966 &bus_state->rexit_done[wIndex], in xhci_handle_usb2_port_link_resume()
968 spin_lock_irqsave(&xhci->lock, *flags); in xhci_handle_usb2_port_link_resume()
976 return -ENODEV; in xhci_handle_usb2_port_link_resume()
980 int port_status = readl(port->addr); in xhci_handle_usb2_port_link_resume()
982 xhci_warn(xhci, "Port resume timed out, port %d-%d: 0x%x\n", in xhci_handle_usb2_port_link_resume()
983 hcd->self.busnum, wIndex + 1, port_status); in xhci_handle_usb2_port_link_resume()
985 clear_bit(wIndex, &bus_state->rexit_ports); in xhci_handle_usb2_port_link_resume()
988 usb_hcd_end_port_resume(&hcd->self, wIndex); in xhci_handle_usb2_port_link_resume()
989 bus_state->port_c_suspend |= 1 << wIndex; in xhci_handle_usb2_port_link_resume()
990 bus_state->suspended_ports &= ~(1 << wIndex); in xhci_handle_usb2_port_link_resume()
1008 /* only support rx and tx lane counts of 1 in usb3.1 spec */ in xhci_get_ext_port_status()
1028 bus_state = &port->rhub->bus_state; in xhci_get_usb3_port_status()
1029 xhci = hcd_to_xhci(port->rhub->hcd); in xhci_get_usb3_port_status()
1030 hcd = port->rhub->hcd; in xhci_get_usb3_port_status()
1032 portnum = port->hcd_portnum; in xhci_get_usb3_port_status()
1055 bus_state->suspended_ports &= ~(1 << portnum); in xhci_get_usb3_port_status()
1059 if (bus_state->port_remote_wakeup & (1 << portnum) && in xhci_get_usb3_port_status()
1062 bus_state->port_remote_wakeup &= ~(1 << portnum); in xhci_get_usb3_port_status()
1063 usb_hcd_end_port_resume(&hcd->self, portnum); in xhci_get_usb3_port_status()
1078 bus_state = &port->rhub->bus_state; in xhci_get_usb2_port_status()
1080 portnum = port->hcd_portnum; in xhci_get_usb2_port_status()
1092 if (bus_state->resume_done[portnum]) in xhci_get_usb2_port_status()
1093 usb_hcd_end_port_resume(&port->rhub->hcd->self, in xhci_get_usb2_port_status()
1095 bus_state->resume_done[portnum] = 0; in xhci_get_usb2_port_status()
1096 clear_bit(portnum, &bus_state->resuming_ports); in xhci_get_usb2_port_status()
1097 if (bus_state->suspended_ports & (1 << portnum)) { in xhci_get_usb2_port_status()
1098 bus_state->suspended_ports &= ~(1 << portnum); in xhci_get_usb2_port_status()
1099 bus_state->port_c_suspend |= 1 << portnum; in xhci_get_usb2_port_status()
1116 * - Mark a port as being done with device resume,
1118 * - Stop the Synopsys redriver Compliance Mode polling.
1119 * - Drop and reacquire the xHCI lock, in order to wait for port resume.
1125 __releases(&xhci->lock) in xhci_get_port_status()
1126 __acquires(&xhci->lock) in xhci_get_port_status()
1133 port = rhub->ports[wIndex]; in xhci_get_port_status()
1158 if (hcd->speed >= HCD_USB3) in xhci_get_port_status()
1167 if ((bus_state->resume_done[wIndex] || in xhci_get_port_status()
1168 test_bit(wIndex, &bus_state->resuming_ports)) && in xhci_get_port_status()
1171 bus_state->resume_done[wIndex] = 0; in xhci_get_port_status()
1172 clear_bit(wIndex, &bus_state->resuming_ports); in xhci_get_port_status()
1173 usb_hcd_end_port_resume(&hcd->self, wIndex); in xhci_get_port_status()
1176 if (bus_state->port_c_suspend & (1 << wIndex)) in xhci_get_port_status()
1197 struct xhci_port **ports; in xhci_hub_control() local
1200 ports = rhub->ports; in xhci_hub_control()
1201 max_ports = rhub->num_ports; in xhci_hub_control()
1202 bus_state = &rhub->bus_state; in xhci_hub_control()
1204 spin_lock_irqsave(&xhci->lock, flags); in xhci_hub_control()
1207 /* No power source, over-current reported per port */ in xhci_hub_control()
1215 if (hcd->speed >= HCD_USB3 && in xhci_hub_control()
1229 if (hcd->speed < HCD_USB3) in xhci_hub_control()
1233 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_hub_control()
1238 wIndex--; in xhci_hub_control()
1239 temp = readl(ports[wIndex]->addr); in xhci_hub_control()
1242 retval = -ENODEV; in xhci_hub_control()
1251 xhci_dbg(xhci, "Get port status %d-%d read: 0x%x, return 0x%x", in xhci_hub_control()
1252 hcd->self.busnum, wIndex + 1, temp, status); in xhci_hub_control()
1259 if (hcd->speed < HCD_USB31 || wLength != 8) { in xhci_hub_control()
1261 retval = -EINVAL; in xhci_hub_control()
1264 port_li = readl(ports[wIndex]->addr + PORTLI); in xhci_hub_control()
1276 /* The MSB of wIndex is the U1/U2 timeout */ in xhci_hub_control()
1281 wIndex--; in xhci_hub_control()
1282 temp = readl(ports[wIndex]->addr); in xhci_hub_control()
1285 retval = -ENODEV; in xhci_hub_control()
1292 temp = readl(ports[wIndex]->addr); in xhci_hub_control()
1295 xhci_set_link_state(xhci, ports[wIndex], in xhci_hub_control()
1297 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_hub_control()
1299 spin_lock_irqsave(&xhci->lock, flags); in xhci_hub_control()
1305 temp = readl(ports[wIndex]->addr); in xhci_hub_control()
1308 xhci_warn(xhci, "USB core suspending port %d-%d not in U0/U1/U2\n", in xhci_hub_control()
1309 hcd->self.busnum, wIndex + 1); in xhci_hub_control()
1320 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_hub_control()
1322 spin_lock_irqsave(&xhci->lock, flags); in xhci_hub_control()
1324 xhci_set_link_state(xhci, ports[wIndex], XDEV_U3); in xhci_hub_control()
1326 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_hub_control()
1328 spin_lock_irqsave(&xhci->lock, flags); in xhci_hub_control()
1330 temp = readl(ports[wIndex]->addr); in xhci_hub_control()
1331 bus_state->suspended_ports |= 1 << wIndex; in xhci_hub_control()
1334 temp = readl(ports[wIndex]->addr); in xhci_hub_control()
1337 xhci_dbg(xhci, "Disable port %d-%d\n", in xhci_hub_control()
1338 hcd->self.busnum, wIndex + 1); in xhci_hub_control()
1347 writel(temp | PORT_PE, ports[wIndex]->addr); in xhci_hub_control()
1348 temp = readl(ports[wIndex]->addr); in xhci_hub_control()
1354 xhci_dbg(xhci, "Enable port %d-%d\n", in xhci_hub_control()
1355 hcd->self.busnum, wIndex + 1); in xhci_hub_control()
1356 xhci_set_link_state(xhci, ports[wIndex], in xhci_hub_control()
1358 temp = readl(ports[wIndex]->addr); in xhci_hub_control()
1367 * software visible). This flag is set by writing 0xA in xhci_hub_control()
1373 * flag is set, otherwise, the compliance substate is in xhci_hub_control()
1377 if (!HCC2_CTC(xhci->hcc_params2)) { in xhci_hub_control()
1383 xhci_warn(xhci, "Can't set compliance mode when port is connected\n"); in xhci_hub_control()
1387 xhci_dbg(xhci, "Enable compliance mode transition for port %d-%d\n", in xhci_hub_control()
1388 hcd->self.busnum, wIndex + 1); in xhci_hub_control()
1389 xhci_set_link_state(xhci, ports[wIndex], in xhci_hub_control()
1392 temp = readl(ports[wIndex]->addr); in xhci_hub_control()
1397 retval = -ENODEV; in xhci_hub_control()
1400 /* Can't set port link state above '3' (U3) */ in xhci_hub_control()
1402 xhci_warn(xhci, "Cannot set port %d-%d link state %d\n", in xhci_hub_control()
1403 hcd->self.busnum, wIndex + 1, in xhci_hub_control()
1409 * set link to U0, steps depend on current link state. in xhci_hub_control()
1410 * U3: set link to U0 and wait for u3exit completion. in xhci_hub_control()
1411 * U1/U2: no PLC complete event, only set link to U0. in xhci_hub_control()
1426 reinit_completion(&bus_state->u3exit_done[wIndex]); in xhci_hub_control()
1429 xhci_set_link_state(xhci, ports[wIndex], in xhci_hub_control()
1436 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_hub_control()
1437 if (!wait_for_completion_timeout(&bus_state->u3exit_done[wIndex], in xhci_hub_control()
1439 xhci_dbg(xhci, "missing U0 port change event for port %d-%d\n", in xhci_hub_control()
1440 hcd->self.busnum, wIndex + 1); in xhci_hub_control()
1441 spin_lock_irqsave(&xhci->lock, flags); in xhci_hub_control()
1442 temp = readl(ports[wIndex]->addr); in xhci_hub_control()
1453 spin_unlock_irqrestore(&xhci->lock, in xhci_hub_control()
1456 spin_lock_irqsave(&xhci->lock, flags); in xhci_hub_control()
1458 xhci_set_link_state(xhci, ports[wIndex], USB_SS_PORT_LS_U3); in xhci_hub_control()
1459 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_hub_control()
1460 while (retries--) { in xhci_hub_control()
1462 temp = readl(ports[wIndex]->addr); in xhci_hub_control()
1466 spin_lock_irqsave(&xhci->lock, flags); in xhci_hub_control()
1467 temp = readl(ports[wIndex]->addr); in xhci_hub_control()
1468 bus_state->suspended_ports |= 1 << wIndex; in xhci_hub_control()
1473 * Turn on ports, even if there isn't per-port switching. in xhci_hub_control()
1474 * HC will report connect events even before this is set. in xhci_hub_control()
1482 writel(temp, ports[wIndex]->addr); in xhci_hub_control()
1484 temp = readl(ports[wIndex]->addr); in xhci_hub_control()
1485 xhci_dbg(xhci, "set port reset, actual port %d-%d status = 0x%x\n", in xhci_hub_control()
1486 hcd->self.busnum, wIndex + 1, temp); in xhci_hub_control()
1489 xhci_set_remote_wake_mask(xhci, ports[wIndex], in xhci_hub_control()
1491 temp = readl(ports[wIndex]->addr); in xhci_hub_control()
1492 xhci_dbg(xhci, "set port remote wake mask, actual port %d-%d status = 0x%x\n", in xhci_hub_control()
1493 hcd->self.busnum, wIndex + 1, temp); in xhci_hub_control()
1497 writel(temp, ports[wIndex]->addr); in xhci_hub_control()
1498 temp = readl(ports[wIndex]->addr); in xhci_hub_control()
1501 if (hcd->speed < HCD_USB3) in xhci_hub_control()
1503 temp = readl(ports[wIndex]->addr + PORTPMSC); in xhci_hub_control()
1506 writel(temp, ports[wIndex]->addr + PORTPMSC); in xhci_hub_control()
1509 if (hcd->speed < HCD_USB3) in xhci_hub_control()
1511 temp = readl(ports[wIndex]->addr + PORTPMSC); in xhci_hub_control()
1514 writel(temp, ports[wIndex]->addr + PORTPMSC); in xhci_hub_control()
1518 if (hcd->speed != HCD_USB2) in xhci_hub_control()
1530 temp = readl(ports[wIndex]->addr); in xhci_hub_control()
1535 wIndex--; in xhci_hub_control()
1536 temp = readl(ports[wIndex]->addr); in xhci_hub_control()
1539 retval = -ENODEV; in xhci_hub_control()
1546 temp = readl(ports[wIndex]->addr); in xhci_hub_control()
1555 set_bit(wIndex, &bus_state->resuming_ports); in xhci_hub_control()
1556 usb_hcd_start_port_resume(&hcd->self, wIndex); in xhci_hub_control()
1557 xhci_set_link_state(xhci, ports[wIndex], in xhci_hub_control()
1559 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_hub_control()
1561 spin_lock_irqsave(&xhci->lock, flags); in xhci_hub_control()
1562 xhci_set_link_state(xhci, ports[wIndex], in xhci_hub_control()
1564 clear_bit(wIndex, &bus_state->resuming_ports); in xhci_hub_control()
1565 usb_hcd_end_port_resume(&hcd->self, wIndex); in xhci_hub_control()
1567 bus_state->port_c_suspend |= 1 << wIndex; in xhci_hub_control()
1578 bus_state->port_c_suspend &= ~(1 << wIndex); in xhci_hub_control()
1588 ports[wIndex]->addr, temp); in xhci_hub_control()
1592 ports[wIndex]->addr, temp); in xhci_hub_control()
1607 retval = -EPIPE; in xhci_hub_control()
1609 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_hub_control()
1614 * Returns 0 if the status hasn't changed, or the number of bytes in buf.
1615 * Ports are 0-indexed from the HCD point of view,
1616 * and 1-indexed from the USB core pointer of view.
1632 struct xhci_port **ports; in xhci_hub_status_data() local
1635 ports = rhub->ports; in xhci_hub_status_data()
1636 max_ports = rhub->num_ports; in xhci_hub_status_data()
1637 bus_state = &rhub->bus_state; in xhci_hub_status_data()
1644 * Inform the usbcore about resume-in-progress by returning in xhci_hub_status_data()
1645 * a non-zero value even if there are no status changes. in xhci_hub_status_data()
1647 spin_lock_irqsave(&xhci->lock, flags); in xhci_hub_status_data()
1649 status = bus_state->resuming_ports; in xhci_hub_status_data()
1655 if (xhci->run_graceperiod) { in xhci_hub_status_data()
1656 if (time_before(jiffies, xhci->run_graceperiod)) in xhci_hub_status_data()
1659 xhci->run_graceperiod = 0; in xhci_hub_status_data()
1664 /* For each port, did anything change? If so, set that bit in buf. */ in xhci_hub_status_data()
1666 temp = readl(ports[i]->addr); in xhci_hub_status_data()
1669 retval = -ENODEV; in xhci_hub_status_data()
1675 (bus_state->port_c_suspend & 1 << i) || in xhci_hub_status_data()
1676 (bus_state->resume_done[i] && time_after_eq( in xhci_hub_status_data()
1677 jiffies, bus_state->resume_done[i]))) { in xhci_hub_status_data()
1688 __func__, hcd->self.busnum); in xhci_hub_status_data()
1689 clear_bit(HCD_FLAG_POLL_RH, &hcd->flags); in xhci_hub_status_data()
1691 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_hub_status_data()
1704 struct xhci_port **ports; in xhci_bus_suspend() local
1709 ports = rhub->ports; in xhci_bus_suspend()
1710 max_ports = rhub->num_ports; in xhci_bus_suspend()
1711 bus_state = &rhub->bus_state; in xhci_bus_suspend()
1712 wake_enabled = hcd->self.root_hub->do_remote_wakeup; in xhci_bus_suspend()
1714 spin_lock_irqsave(&xhci->lock, flags); in xhci_bus_suspend()
1717 if (bus_state->resuming_ports || /* USB2 */ in xhci_bus_suspend()
1718 bus_state->port_remote_wakeup) { /* USB3 */ in xhci_bus_suspend()
1719 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_bus_suspend()
1721 hcd->self.busnum); in xhci_bus_suspend()
1722 return -EBUSY; in xhci_bus_suspend()
1726 * Prepare ports for suspend, but don't write anything before all ports in xhci_bus_suspend()
1729 bus_state->bus_suspended = 0; in xhci_bus_suspend()
1731 while (port_index--) { in xhci_bus_suspend()
1735 t1 = readl(ports[port_index]->addr); in xhci_bus_suspend()
1743 if ((hcd->speed >= HCD_USB3) && retries-- && in xhci_bus_suspend()
1745 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_bus_suspend()
1747 spin_lock_irqsave(&xhci->lock, flags); in xhci_bus_suspend()
1748 xhci_dbg(xhci, "port %d-%d polling in bus suspend, waiting\n", in xhci_bus_suspend()
1749 hcd->self.busnum, port_index + 1); in xhci_bus_suspend()
1752 /* bail out if port detected a over-current condition */ in xhci_bus_suspend()
1754 bus_state->bus_suspended = 0; in xhci_bus_suspend()
1755 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_bus_suspend()
1756 xhci_dbg(xhci, "Bus suspend bailout, port over-current detected\n"); in xhci_bus_suspend()
1757 return -EBUSY; in xhci_bus_suspend()
1759 /* suspend ports in U0, or bail out for new connect changes */ in xhci_bus_suspend()
1762 bus_state->bus_suspended = 0; in xhci_bus_suspend()
1763 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_bus_suspend()
1765 return -EBUSY; in xhci_bus_suspend()
1767 xhci_dbg(xhci, "port %d-%d not suspended\n", in xhci_bus_suspend()
1768 hcd->self.busnum, port_index + 1); in xhci_bus_suspend()
1771 set_bit(port_index, &bus_state->bus_suspended); in xhci_bus_suspend()
1786 if ((xhci->quirks & XHCI_U2_DISABLE_WAKE) && in xhci_bus_suspend()
1787 (hcd->speed < HCD_USB3)) { in xhci_bus_suspend()
1788 if (usb_amd_pt_check_port(hcd->self.controller, in xhci_bus_suspend()
1800 /* write port settings, stopping and suspending ports if needed */ in xhci_bus_suspend()
1802 while (port_index--) { in xhci_bus_suspend()
1805 if (test_bit(port_index, &bus_state->bus_suspended)) { in xhci_bus_suspend()
1811 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_bus_suspend()
1813 spin_lock_irqsave(&xhci->lock, flags); in xhci_bus_suspend()
1816 writel(portsc_buf[port_index], ports[port_index]->addr); in xhci_bus_suspend()
1818 hcd->state = HC_STATE_SUSPENDED; in xhci_bus_suspend()
1819 bus_state->next_statechange = jiffies + msecs_to_jiffies(10); in xhci_bus_suspend()
1820 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_bus_suspend()
1822 if (bus_state->bus_suspended) in xhci_bus_suspend()
1829 * Workaround for missing Cold Attach Status (CAS) if device re-plugged in S3.
1831 * See Intel 100/c230 series PCH specification update Doc #332692-006 Errata #8
1837 portsc = readl(port->addr); in xhci_port_missing_cas_quirk()
1839 /* if any of these are set we are not stuck */ in xhci_port_missing_cas_quirk()
1850 writel(portsc, port->addr); in xhci_port_missing_cas_quirk()
1852 readl(port->addr); in xhci_port_missing_cas_quirk()
1867 struct xhci_port **ports; in xhci_bus_resume() local
1870 ports = rhub->ports; in xhci_bus_resume()
1871 max_ports = rhub->num_ports; in xhci_bus_resume()
1872 bus_state = &rhub->bus_state; in xhci_bus_resume()
1874 if (time_before(jiffies, bus_state->next_statechange)) in xhci_bus_resume()
1877 spin_lock_irqsave(&xhci->lock, flags); in xhci_bus_resume()
1879 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_bus_resume()
1880 return -ESHUTDOWN; in xhci_bus_resume()
1884 temp = readl(&xhci->op_regs->command); in xhci_bus_resume()
1886 writel(temp, &xhci->op_regs->command); in xhci_bus_resume()
1888 /* bus specific resume for ports we suspended at bus_suspend */ in xhci_bus_resume()
1889 if (hcd->speed >= HCD_USB3) in xhci_bus_resume()
1895 while (port_index--) { in xhci_bus_resume()
1896 portsc = readl(ports[port_index]->addr); in xhci_bus_resume()
1898 /* warm reset CAS limited ports stuck in polling/compliance */ in xhci_bus_resume()
1899 if ((xhci->quirks & XHCI_MISSING_CAS) && in xhci_bus_resume()
1900 (hcd->speed >= HCD_USB3) && in xhci_bus_resume()
1901 xhci_port_missing_cas_quirk(ports[port_index])) { in xhci_bus_resume()
1902 xhci_dbg(xhci, "reset stuck port %d-%d\n", in xhci_bus_resume()
1903 hcd->self.busnum, port_index + 1); in xhci_bus_resume()
1904 clear_bit(port_index, &bus_state->bus_suspended); in xhci_bus_resume()
1908 if (test_bit(port_index, &bus_state->bus_suspended)) in xhci_bus_resume()
1921 &bus_state->bus_suspended); in xhci_bus_resume()
1924 /* disable wake for all ports, write new link state if needed */ in xhci_bus_resume()
1926 writel(portsc, ports[port_index]->addr); in xhci_bus_resume()
1930 if (hcd->speed < HCD_USB3) { in xhci_bus_resume()
1931 if (bus_state->bus_suspended) { in xhci_bus_resume()
1932 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_bus_resume()
1934 spin_lock_irqsave(&xhci->lock, flags); in xhci_bus_resume()
1936 for_each_set_bit(port_index, &bus_state->bus_suspended, in xhci_bus_resume()
1939 xhci_test_and_clear_bit(xhci, ports[port_index], in xhci_bus_resume()
1941 xhci_set_link_state(xhci, ports[port_index], XDEV_U0); in xhci_bus_resume()
1946 for_each_set_bit(port_index, &bus_state->bus_suspended, BITS_PER_LONG) { in xhci_bus_resume()
1947 sret = xhci_handshake(ports[port_index]->addr, PORT_PLC, in xhci_bus_resume()
1950 xhci_warn(xhci, "port %d-%d resume PLC timeout\n", in xhci_bus_resume()
1951 hcd->self.busnum, port_index + 1); in xhci_bus_resume()
1954 xhci_test_and_clear_bit(xhci, ports[port_index], PORT_PLC); in xhci_bus_resume()
1959 (void) readl(&xhci->op_regs->command); in xhci_bus_resume()
1961 bus_state->next_statechange = jiffies + msecs_to_jiffies(5); in xhci_bus_resume()
1962 /* re-enable irqs */ in xhci_bus_resume()
1963 temp = readl(&xhci->op_regs->command); in xhci_bus_resume()
1965 writel(temp, &xhci->op_regs->command); in xhci_bus_resume()
1966 temp = readl(&xhci->op_regs->command); in xhci_bus_resume()
1968 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_bus_resume()
1977 return rhub->bus_state.resuming_ports; /* USB2 ports only */ in xhci_get_resuming_ports()