Lines Matching full:ports
256 struct usb_hub_descriptor *desc, int ports) in xhci_common_hub_descriptor() argument
262 desc->bNbrPorts = ports; in xhci_common_hub_descriptor()
272 /* Bits 6:5 - no TTs in root ports */ in xhci_common_hub_descriptor()
281 int ports; in xhci_usb2_hub_descriptor() local
289 ports = rhub->num_ports; in xhci_usb2_hub_descriptor()
290 xhci_common_hub_descriptor(xhci, desc, ports); in xhci_usb2_hub_descriptor()
292 temp = 1 + (ports / 8); in xhci_usb2_hub_descriptor()
300 for (i = 0; i < ports; i++) { in xhci_usb2_hub_descriptor()
301 portsc = readl(rhub->ports[i]->addr); in xhci_usb2_hub_descriptor()
313 * ports on it. The USB 2.0 specification says that there are two in xhci_usb2_hub_descriptor()
316 * USB_MAXCHILDREN ports, we may need to use the DeviceRemovable array in xhci_usb2_hub_descriptor()
320 * set of ports that actually exist. in xhci_usb2_hub_descriptor()
327 for (i = 0; i < (ports + 1 + 7) / 8; i++) in xhci_usb2_hub_descriptor()
336 int ports; in xhci_usb3_hub_descriptor() local
343 ports = rhub->num_ports; in xhci_usb3_hub_descriptor()
344 xhci_common_hub_descriptor(xhci, desc, ports); in xhci_usb3_hub_descriptor()
357 for (i = 0; i < ports; i++) { in xhci_usb3_hub_descriptor()
358 portsc = readl(rhub->ports[i]->addr); in xhci_usb3_hub_descriptor()
414 * change bits: connect, PED, warm port reset changed (reserved zero for USB 2.0 ports),
570 /* Don't allow the USB core to disable SuperSpeed ports. */ in xhci_disable_port()
664 port = rhub->ports[index]; in xhci_set_port_power()
696 /* xhci only supports test mode for usb2 ports */ in xhci_port_set_test_mode()
697 port = xhci->usb2_rhub.ports[wIndex]; in xhci_port_set_test_mode()
727 /* Put all ports to the Disable state by clear PP */ in xhci_enter_test_mode()
729 /* Power off USB3 ports*/ in xhci_enter_test_mode()
732 /* Power off USB2 ports*/ in xhci_enter_test_mode()
883 * This Function verifies if all xhc USB3 ports have entered U0, if so,
901 "All USB3 ports have entered U0 already!"); in xhci_del_comp_mod_timer()
1133 port = rhub->ports[wIndex]; in xhci_get_port_status()
1197 struct xhci_port **ports; in xhci_hub_control() local
1200 ports = rhub->ports; in xhci_hub_control()
1239 temp = readl(ports[wIndex]->addr); in xhci_hub_control()
1264 port_li = readl(ports[wIndex]->addr + PORTLI); in xhci_hub_control()
1282 temp = readl(ports[wIndex]->addr); in xhci_hub_control()
1292 temp = readl(ports[wIndex]->addr); in xhci_hub_control()
1295 xhci_set_link_state(xhci, ports[wIndex], in xhci_hub_control()
1305 temp = readl(ports[wIndex]->addr); in xhci_hub_control()
1324 xhci_set_link_state(xhci, ports[wIndex], XDEV_U3); in xhci_hub_control()
1330 temp = readl(ports[wIndex]->addr); in xhci_hub_control()
1334 temp = readl(ports[wIndex]->addr); in xhci_hub_control()
1347 writel(temp | PORT_PE, ports[wIndex]->addr); in xhci_hub_control()
1348 temp = readl(ports[wIndex]->addr); in xhci_hub_control()
1356 xhci_set_link_state(xhci, ports[wIndex], in xhci_hub_control()
1358 temp = readl(ports[wIndex]->addr); in xhci_hub_control()
1389 xhci_set_link_state(xhci, ports[wIndex], in xhci_hub_control()
1392 temp = readl(ports[wIndex]->addr); in xhci_hub_control()
1429 xhci_set_link_state(xhci, ports[wIndex], in xhci_hub_control()
1442 temp = readl(ports[wIndex]->addr); in xhci_hub_control()
1458 xhci_set_link_state(xhci, ports[wIndex], USB_SS_PORT_LS_U3); in xhci_hub_control()
1462 temp = readl(ports[wIndex]->addr); in xhci_hub_control()
1467 temp = readl(ports[wIndex]->addr); in xhci_hub_control()
1473 * Turn on ports, even if there isn't per-port switching. in xhci_hub_control()
1482 writel(temp, ports[wIndex]->addr); in xhci_hub_control()
1484 temp = readl(ports[wIndex]->addr); in xhci_hub_control()
1489 xhci_set_remote_wake_mask(xhci, ports[wIndex], in xhci_hub_control()
1491 temp = readl(ports[wIndex]->addr); in xhci_hub_control()
1497 writel(temp, ports[wIndex]->addr); in xhci_hub_control()
1498 temp = readl(ports[wIndex]->addr); in xhci_hub_control()
1503 temp = readl(ports[wIndex]->addr + PORTPMSC); in xhci_hub_control()
1506 writel(temp, ports[wIndex]->addr + PORTPMSC); in xhci_hub_control()
1511 temp = readl(ports[wIndex]->addr + PORTPMSC); in xhci_hub_control()
1514 writel(temp, ports[wIndex]->addr + PORTPMSC); in xhci_hub_control()
1530 temp = readl(ports[wIndex]->addr); in xhci_hub_control()
1536 temp = readl(ports[wIndex]->addr); in xhci_hub_control()
1546 temp = readl(ports[wIndex]->addr); in xhci_hub_control()
1557 xhci_set_link_state(xhci, ports[wIndex], in xhci_hub_control()
1562 xhci_set_link_state(xhci, ports[wIndex], in xhci_hub_control()
1588 ports[wIndex]->addr, temp); in xhci_hub_control()
1592 ports[wIndex]->addr, temp); in xhci_hub_control()
1615 * Ports are 0-indexed from the HCD point of view,
1632 struct xhci_port **ports; in xhci_hub_status_data() local
1635 ports = rhub->ports; in xhci_hub_status_data()
1666 temp = readl(ports[i]->addr); in xhci_hub_status_data()
1704 struct xhci_port **ports; in xhci_bus_suspend() local
1709 ports = rhub->ports; in xhci_bus_suspend()
1726 * Prepare ports for suspend, but don't write anything before all ports in xhci_bus_suspend()
1735 t1 = readl(ports[port_index]->addr); in xhci_bus_suspend()
1759 /* suspend ports in U0, or bail out for new connect changes */ in xhci_bus_suspend()
1800 /* write port settings, stopping and suspending ports if needed */ in xhci_bus_suspend()
1816 writel(portsc_buf[port_index], ports[port_index]->addr); in xhci_bus_suspend()
1867 struct xhci_port **ports; in xhci_bus_resume() local
1870 ports = rhub->ports; in xhci_bus_resume()
1888 /* bus specific resume for ports we suspended at bus_suspend */ in xhci_bus_resume()
1896 portsc = readl(ports[port_index]->addr); in xhci_bus_resume()
1898 /* warm reset CAS limited ports stuck in polling/compliance */ in xhci_bus_resume()
1901 xhci_port_missing_cas_quirk(ports[port_index])) { in xhci_bus_resume()
1924 /* disable wake for all ports, write new link state if needed */ in xhci_bus_resume()
1926 writel(portsc, ports[port_index]->addr); in xhci_bus_resume()
1939 xhci_test_and_clear_bit(xhci, ports[port_index], in xhci_bus_resume()
1941 xhci_set_link_state(xhci, ports[port_index], XDEV_U0); in xhci_bus_resume()
1947 sret = xhci_handshake(ports[port_index]->addr, PORT_PLC, in xhci_bus_resume()
1954 xhci_test_and_clear_bit(xhci, ports[port_index], PORT_PLC); in xhci_bus_resume()
1977 return rhub->bus_state.resuming_ports; /* USB2 ports only */ in xhci_get_resuming_ports()