45 	if (dev->id.revision == 2 && dev->bus->chip_id == 0x5354) {  in ssb_hcd_5354wa()
47 		ssb_write32(dev, 0x894, 0x00fe00fe);  in ssb_hcd_5354wa()
50 		ssb_write32(dev, 0x89c, ssb_read32(dev, 0x89c) | 0x1);  in ssb_hcd_5354wa()
65 		ssb_write32(dev, 0x200, 0x7ff);  in ssb_hcd_usb20wa()
68 		ssb_write32(dev, 0x400, ssb_read32(dev, 0x400) & ~8);  in ssb_hcd_usb20wa()
69 		ssb_read32(dev, 0x400);  in ssb_hcd_usb20wa()
72 		ssb_write32(dev, 0x304, ssb_read32(dev, 0x304) & ~0x100);  in ssb_hcd_usb20wa()
73 		ssb_read32(dev, 0x304);  in ssb_hcd_usb20wa()
84 	u32 flags = 0;  in ssb_hcd_init_chip()
109 	memset(hci_res, 0, sizeof(hci_res));  in ssb_hcd_create_pdev()
111 	hci_res[0].start = addr;  in ssb_hcd_create_pdev()
112 	hci_res[0].end = hci_res[0].start + len - 1;  in ssb_hcd_create_pdev()
113 	hci_res[0].flags = IORESOURCE_MEM;  in ssb_hcd_create_pdev()
119 					"ehci-platform" , 0);  in ssb_hcd_create_pdev()
159 	chipid_top = (dev->bus->chip_id & 0xFF00);  in ssb_hcd_probe()
160 	if (chipid_top != 0x4700 && chipid_top != 0x5300)  in ssb_hcd_probe()
182 	len = (coreid == SSB_DEV_USB20_HOST) ? 0x800 : ssb_admatch_size(tmp);  in ssb_hcd_probe()
188 		start = ssb_admatch_base(tmp) + 0x800; /* ehci core offset */  in ssb_hcd_probe()
197 	return 0;  in ssb_hcd_probe()
215 	ssb_device_disable(dev, 0);  in ssb_hcd_remove()
220 	ssb_device_disable(dev, 0);  in ssb_hcd_shutdown()
227 	ssb_device_disable(dev, 0);  in ssb_hcd_suspend()
229 	return 0;  in ssb_hcd_suspend()
238 	return 0;  in ssb_hcd_resume()