Lines Matching refs:ast_ep_write
276 #define ast_ep_write(ep, val, reg) \ macro
401 ast_ep_write(ep, EP_DMA_CTRL_RESET, AST_UDC_EP_DMA_CTRL); in ast_udc_ep_enable()
402 ast_ep_write(ep, 0, AST_UDC_EP_DMA_STS); in ast_udc_ep_enable()
403 ast_ep_write(ep, ep->descs_dma, AST_UDC_EP_DMA_BUFF); in ast_udc_ep_enable()
406 ast_ep_write(ep, EP_DMA_CTRL_IN_LONG_MODE | EP_DMA_DESC_MODE, in ast_udc_ep_enable()
412 ast_ep_write(ep, EP_DMA_CTRL_RESET, AST_UDC_EP_DMA_CTRL); in ast_udc_ep_enable()
413 ast_ep_write(ep, EP_DMA_SINGLE_STAGE, AST_UDC_EP_DMA_CTRL); in ast_udc_ep_enable()
414 ast_ep_write(ep, 0, AST_UDC_EP_DMA_STS); in ast_udc_ep_enable()
421 ast_ep_write(ep, ep_conf | EP_ENABLE, AST_UDC_EP_CONFIG); in ast_udc_ep_enable()
442 ast_ep_write(ep, 0, AST_UDC_EP_CONFIG); in ast_udc_ep_disable()
541 ast_ep_write(ep, req->req.dma + req->req.actual, AST_UDC_EP_DMA_BUFF); in ast_udc_epn_kick()
544 ast_ep_write(ep, EP_DMA_SET_TX_SIZE(tx_len), AST_UDC_EP_DMA_STS); in ast_udc_epn_kick()
545 ast_ep_write(ep, EP_DMA_SET_TX_SIZE(tx_len) | EP_DMA_SINGLE_KICK, in ast_udc_epn_kick()
574 ast_ep_write(ep, ep->descs_wptr, AST_UDC_EP_DMA_STS); in ast_udc_epn_kick_desc()
752 ast_ep_write(ep, ctrl, AST_UDC_EP_CONFIG); in ast_udc_ep_set_halt()